[ARM] S3C maintainer updates merge branch maintainers-updates into s3c-fixes
[linux-2.6] / arch / arm / include / asm / mmu_context.h
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1da177e4 1/*
4baa9922 2 * arch/arm/include/asm/mmu_context.h
1da177e4
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3 *
4 * Copyright (C) 1996 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Changelog:
11 * 27-06-1996 RMK Created
12 */
13#ifndef __ASM_ARM_MMU_CONTEXT_H
14#define __ASM_ARM_MMU_CONTEXT_H
15
8dc39b88 16#include <linux/compiler.h>
87c52578 17#include <linux/sched.h>
4fe15ba0 18#include <asm/cacheflush.h>
46097c7d 19#include <asm/cachetype.h>
1da177e4 20#include <asm/proc-fns.h>
d6dd61c8 21#include <asm-generic/mm_hooks.h>
1da177e4 22
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23void __check_kvm_seq(struct mm_struct *mm);
24
516793c6 25#ifdef CONFIG_CPU_HAS_ASID
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26
27/*
28 * On ARMv6, we have the following structure in the Context ID:
29 *
30 * 31 7 0
31 * +-------------------------+-----------+
32 * | process ID | ASID |
33 * +-------------------------+-----------+
34 * | context ID |
35 * +-------------------------------------+
36 *
37 * The ASID is used to tag entries in the CPU caches and TLBs.
38 * The context ID is used by debuggers and trace logic, and
39 * should be unique within all running processes.
40 */
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41#define ASID_BITS 8
42#define ASID_MASK ((~0) << ASID_BITS)
43#define ASID_FIRST_VERSION (1 << ASID_BITS)
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44
45extern unsigned int cpu_last_asid;
46
47void __init_new_context(struct task_struct *tsk, struct mm_struct *mm);
48void __new_context(struct mm_struct *mm);
49
50static inline void check_context(struct mm_struct *mm)
51{
52 if (unlikely((mm->context.id ^ cpu_last_asid) >> ASID_BITS))
53 __new_context(mm);
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54
55 if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq))
56 __check_kvm_seq(mm);
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57}
58
59#define init_new_context(tsk,mm) (__init_new_context(tsk,mm),0)
60
61#else
62
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63static inline void check_context(struct mm_struct *mm)
64{
65 if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq))
66 __check_kvm_seq(mm);
67}
68
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69#define init_new_context(tsk,mm) 0
70
71#endif
72
73#define destroy_context(mm) do { } while(0)
74
75/*
76 * This is called when "tsk" is about to enter lazy TLB mode.
77 *
78 * mm: describes the currently active mm context
79 * tsk: task which is entering lazy tlb
80 * cpu: cpu number which is entering lazy tlb
81 *
82 * tsk->mm will be NULL
83 */
84static inline void
85enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
86{
87}
88
89/*
90 * This is the actual mm switch as far as the scheduler
91 * is concerned. No registers are touched. We avoid
92 * calling the CPU specific function when the mm hasn't
93 * actually changed.
94 */
95static inline void
96switch_mm(struct mm_struct *prev, struct mm_struct *next,
97 struct task_struct *tsk)
98{
002547b4 99#ifdef CONFIG_MMU
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100 unsigned int cpu = smp_processor_id();
101
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102#ifdef CONFIG_SMP
103 /* check for possible thread migration */
104 if (!cpus_empty(next->cpu_vm_mask) && !cpu_isset(cpu, next->cpu_vm_mask))
105 __flush_icache_all();
106#endif
8678c1f0 107 if (!cpu_test_and_set(cpu, next->cpu_vm_mask) || prev != next) {
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108 check_context(next);
109 cpu_switch_mm(next->pgd, next);
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110 if (cache_is_vivt())
111 cpu_clear(cpu, prev->cpu_vm_mask);
1da177e4 112 }
002547b4 113#endif
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114}
115
116#define deactivate_mm(tsk,mm) do { } while (0)
117#define activate_mm(prev,next) switch_mm(prev, next, NULL)
118
119#endif