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98658538 LY |
1 | /* |
2 | * arch/powerpc/sysdev/qe_lib/qe_io.c | |
3 | * | |
4 | * QE Parallel I/O ports configuration routines | |
5 | * | |
6 | * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved. | |
7 | * | |
8 | * Author: Li Yang <LeoLi@freescale.com> | |
9 | * Based on code from Shlomi Gridish <gridish@freescale.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License as published by the | |
13 | * Free Software Foundation; either version 2 of the License, or (at your | |
14 | * option) any later version. | |
15 | */ | |
16 | ||
98658538 LY |
17 | #include <linux/stddef.h> |
18 | #include <linux/kernel.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/errno.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/ioport.h> | |
23 | ||
24 | #include <asm/io.h> | |
25 | #include <asm/prom.h> | |
26 | #include <sysdev/fsl_soc.h> | |
27 | ||
28 | #undef DEBUG | |
29 | ||
30 | #define NUM_OF_PINS 32 | |
31 | ||
32 | struct port_regs { | |
33 | __be32 cpodr; /* Open drain register */ | |
34 | __be32 cpdata; /* Data register */ | |
35 | __be32 cpdir1; /* Direction register */ | |
36 | __be32 cpdir2; /* Direction register */ | |
37 | __be32 cppar1; /* Pin assignment register */ | |
38 | __be32 cppar2; /* Pin assignment register */ | |
39 | }; | |
40 | ||
41 | static struct port_regs *par_io = NULL; | |
42 | static int num_par_io_ports = 0; | |
43 | ||
44 | int par_io_init(struct device_node *np) | |
45 | { | |
46 | struct resource res; | |
47 | int ret; | |
48 | const u32 *num_ports; | |
49 | ||
50 | /* Map Parallel I/O ports registers */ | |
51 | ret = of_address_to_resource(np, 0, &res); | |
52 | if (ret) | |
53 | return ret; | |
54 | par_io = ioremap(res.start, res.end - res.start + 1); | |
55 | ||
56 | num_ports = get_property(np, "num-ports", NULL); | |
57 | if (num_ports) | |
58 | num_par_io_ports = *num_ports; | |
59 | ||
60 | return 0; | |
61 | } | |
62 | ||
63 | int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, | |
64 | int assignment, int has_irq) | |
65 | { | |
66 | u32 pin_mask1bit, pin_mask2bits, new_mask2bits, tmp_val; | |
67 | ||
68 | if (!par_io) | |
69 | return -1; | |
70 | ||
71 | /* calculate pin location for single and 2 bits information */ | |
72 | pin_mask1bit = (u32) (1 << (NUM_OF_PINS - (pin + 1))); | |
73 | ||
74 | /* Set open drain, if required */ | |
75 | tmp_val = in_be32(&par_io[port].cpodr); | |
76 | if (open_drain) | |
77 | out_be32(&par_io[port].cpodr, pin_mask1bit | tmp_val); | |
78 | else | |
79 | out_be32(&par_io[port].cpodr, ~pin_mask1bit & tmp_val); | |
80 | ||
81 | /* define direction */ | |
82 | tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ? | |
83 | in_be32(&par_io[port].cpdir2) : | |
84 | in_be32(&par_io[port].cpdir1); | |
85 | ||
86 | /* get all bits mask for 2 bit per port */ | |
87 | pin_mask2bits = (u32) (0x3 << (NUM_OF_PINS - | |
88 | (pin % (NUM_OF_PINS / 2) + 1) * 2)); | |
89 | ||
90 | /* Get the final mask we need for the right definition */ | |
91 | new_mask2bits = (u32) (dir << (NUM_OF_PINS - | |
92 | (pin % (NUM_OF_PINS / 2) + 1) * 2)); | |
93 | ||
94 | /* clear and set 2 bits mask */ | |
95 | if (pin > (NUM_OF_PINS / 2) - 1) { | |
96 | out_be32(&par_io[port].cpdir2, | |
97 | ~pin_mask2bits & tmp_val); | |
98 | tmp_val &= ~pin_mask2bits; | |
99 | out_be32(&par_io[port].cpdir2, new_mask2bits | tmp_val); | |
100 | } else { | |
101 | out_be32(&par_io[port].cpdir1, | |
102 | ~pin_mask2bits & tmp_val); | |
103 | tmp_val &= ~pin_mask2bits; | |
104 | out_be32(&par_io[port].cpdir1, new_mask2bits | tmp_val); | |
105 | } | |
106 | /* define pin assignment */ | |
107 | tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ? | |
108 | in_be32(&par_io[port].cppar2) : | |
109 | in_be32(&par_io[port].cppar1); | |
110 | ||
111 | new_mask2bits = (u32) (assignment << (NUM_OF_PINS - | |
112 | (pin % (NUM_OF_PINS / 2) + 1) * 2)); | |
113 | /* clear and set 2 bits mask */ | |
114 | if (pin > (NUM_OF_PINS / 2) - 1) { | |
115 | out_be32(&par_io[port].cppar2, | |
116 | ~pin_mask2bits & tmp_val); | |
117 | tmp_val &= ~pin_mask2bits; | |
118 | out_be32(&par_io[port].cppar2, new_mask2bits | tmp_val); | |
119 | } else { | |
120 | out_be32(&par_io[port].cppar1, | |
121 | ~pin_mask2bits & tmp_val); | |
122 | tmp_val &= ~pin_mask2bits; | |
123 | out_be32(&par_io[port].cppar1, new_mask2bits | tmp_val); | |
124 | } | |
125 | ||
126 | return 0; | |
127 | } | |
128 | EXPORT_SYMBOL(par_io_config_pin); | |
129 | ||
130 | int par_io_data_set(u8 port, u8 pin, u8 val) | |
131 | { | |
132 | u32 pin_mask, tmp_val; | |
133 | ||
134 | if (port >= num_par_io_ports) | |
135 | return -EINVAL; | |
136 | if (pin >= NUM_OF_PINS) | |
137 | return -EINVAL; | |
138 | /* calculate pin location */ | |
139 | pin_mask = (u32) (1 << (NUM_OF_PINS - 1 - pin)); | |
140 | ||
141 | tmp_val = in_be32(&par_io[port].cpdata); | |
142 | ||
143 | if (val == 0) /* clear */ | |
144 | out_be32(&par_io[port].cpdata, ~pin_mask & tmp_val); | |
145 | else /* set */ | |
146 | out_be32(&par_io[port].cpdata, pin_mask | tmp_val); | |
147 | ||
148 | return 0; | |
149 | } | |
150 | EXPORT_SYMBOL(par_io_data_set); | |
151 | ||
152 | int par_io_of_config(struct device_node *np) | |
153 | { | |
154 | struct device_node *pio; | |
155 | const phandle *ph; | |
156 | int pio_map_len; | |
157 | const unsigned int *pio_map; | |
158 | ||
159 | if (par_io == NULL) { | |
160 | printk(KERN_ERR "par_io not initialized \n"); | |
161 | return -1; | |
162 | } | |
163 | ||
164 | ph = get_property(np, "pio-handle", NULL); | |
165 | if (ph == 0) { | |
166 | printk(KERN_ERR "pio-handle not available \n"); | |
167 | return -1; | |
168 | } | |
169 | ||
170 | pio = of_find_node_by_phandle(*ph); | |
171 | ||
172 | pio_map = get_property(pio, "pio-map", &pio_map_len); | |
173 | if (pio_map == NULL) { | |
174 | printk(KERN_ERR "pio-map is not set! \n"); | |
175 | return -1; | |
176 | } | |
177 | pio_map_len /= sizeof(unsigned int); | |
178 | if ((pio_map_len % 6) != 0) { | |
179 | printk(KERN_ERR "pio-map format wrong! \n"); | |
180 | return -1; | |
181 | } | |
182 | ||
183 | while (pio_map_len > 0) { | |
184 | par_io_config_pin((u8) pio_map[0], (u8) pio_map[1], | |
185 | (int) pio_map[2], (int) pio_map[3], | |
186 | (int) pio_map[4], (int) pio_map[5]); | |
187 | pio_map += 6; | |
188 | pio_map_len -= 6; | |
189 | } | |
190 | of_node_put(pio); | |
191 | return 0; | |
192 | } | |
193 | EXPORT_SYMBOL(par_io_of_config); | |
194 | ||
195 | #ifdef DEBUG | |
196 | static void dump_par_io(void) | |
197 | { | |
198 | int i; | |
199 | ||
200 | printk(KERN_INFO "PAR IO registars:\n"); | |
201 | printk(KERN_INFO "Base address: 0x%08x\n", (u32) par_io); | |
202 | for (i = 0; i < num_par_io_ports; i++) { | |
203 | printk(KERN_INFO "cpodr[%d] : addr - 0x%08x, val - 0x%08x\n", | |
204 | i, (u32) & par_io[i].cpodr, | |
205 | in_be32(&par_io[i].cpodr)); | |
206 | printk(KERN_INFO "cpdata[%d]: addr - 0x%08x, val - 0x%08x\n", | |
207 | i, (u32) & par_io[i].cpdata, | |
208 | in_be32(&par_io[i].cpdata)); | |
209 | printk(KERN_INFO "cpdir1[%d]: addr - 0x%08x, val - 0x%08x\n", | |
210 | i, (u32) & par_io[i].cpdir1, | |
211 | in_be32(&par_io[i].cpdir1)); | |
212 | printk(KERN_INFO "cpdir2[%d]: addr - 0x%08x, val - 0x%08x\n", | |
213 | i, (u32) & par_io[i].cpdir2, | |
214 | in_be32(&par_io[i].cpdir2)); | |
215 | printk(KERN_INFO "cppar1[%d]: addr - 0x%08x, val - 0x%08x\n", | |
216 | i, (u32) & par_io[i].cppar1, | |
217 | in_be32(&par_io[i].cppar1)); | |
218 | printk(KERN_INFO "cppar2[%d]: addr - 0x%08x, val - 0x%08x\n", | |
219 | i, (u32) & par_io[i].cppar2, | |
220 | in_be32(&par_io[i].cppar2)); | |
221 | } | |
222 | ||
223 | } | |
224 | EXPORT_SYMBOL(dump_par_io); | |
225 | #endif /* DEBUG */ |