Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * sata_via.c - VIA Serial ATA controllers |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
1da177e4 | 6 | on emails. |
af36d7f0 JG |
7 | * |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available under NDA. | |
31 | * | |
32 | * | |
33 | * To-do list: | |
34 | * - VT6421 PATA support | |
35 | * | |
1da177e4 LT |
36 | */ |
37 | ||
38 | #include <linux/kernel.h> | |
39 | #include <linux/module.h> | |
40 | #include <linux/pci.h> | |
41 | #include <linux/init.h> | |
42 | #include <linux/blkdev.h> | |
43 | #include <linux/delay.h> | |
a9524a76 | 44 | #include <linux/device.h> |
1da177e4 LT |
45 | #include <scsi/scsi_host.h> |
46 | #include <linux/libata.h> | |
47 | #include <asm/io.h> | |
48 | ||
49 | #define DRV_NAME "sata_via" | |
8676ce07 | 50 | #define DRV_VERSION "2.0" |
1da177e4 LT |
51 | |
52 | enum board_ids_enum { | |
53 | vt6420, | |
54 | vt6421, | |
55 | }; | |
56 | ||
57 | enum { | |
58 | SATA_CHAN_ENAB = 0x40, /* SATA channel enable */ | |
59 | SATA_INT_GATE = 0x41, /* SATA interrupt gating */ | |
60 | SATA_NATIVE_MODE = 0x42, /* Native mode enable */ | |
61 | SATA_PATA_SHARING = 0x49, /* PATA/SATA sharing func ctrl */ | |
62 | ||
63 | PORT0 = (1 << 1), | |
64 | PORT1 = (1 << 0), | |
65 | ALL_PORTS = PORT0 | PORT1, | |
66 | N_PORTS = 2, | |
67 | ||
68 | NATIVE_MODE_ALL = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4), | |
69 | ||
70 | SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */ | |
71 | SATA_2DEV = (1 << 5), /* SATA is master/slave */ | |
72 | }; | |
73 | ||
74 | static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | |
75 | static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg); | |
76 | static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | |
ac2164d5 | 77 | static void vt6420_error_handler(struct ata_port *ap); |
1da177e4 | 78 | |
3b7d697d | 79 | static const struct pci_device_id svia_pci_tbl[] = { |
28a2a3f5 | 80 | { 0x1106, 0x0591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, vt6420 }, |
1da177e4 LT |
81 | { 0x1106, 0x3149, PCI_ANY_ID, PCI_ANY_ID, 0, 0, vt6420 }, |
82 | { 0x1106, 0x3249, PCI_ANY_ID, PCI_ANY_ID, 0, 0, vt6421 }, | |
83 | ||
84 | { } /* terminate list */ | |
85 | }; | |
86 | ||
87 | static struct pci_driver svia_pci_driver = { | |
88 | .name = DRV_NAME, | |
89 | .id_table = svia_pci_tbl, | |
90 | .probe = svia_init_one, | |
91 | .remove = ata_pci_remove_one, | |
92 | }; | |
93 | ||
193515d5 | 94 | static struct scsi_host_template svia_sht = { |
1da177e4 LT |
95 | .module = THIS_MODULE, |
96 | .name = DRV_NAME, | |
97 | .ioctl = ata_scsi_ioctl, | |
98 | .queuecommand = ata_scsi_queuecmd, | |
1da177e4 LT |
99 | .can_queue = ATA_DEF_QUEUE, |
100 | .this_id = ATA_SHT_THIS_ID, | |
101 | .sg_tablesize = LIBATA_MAX_PRD, | |
1da177e4 LT |
102 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
103 | .emulated = ATA_SHT_EMULATED, | |
104 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
105 | .proc_name = DRV_NAME, | |
106 | .dma_boundary = ATA_DMA_BOUNDARY, | |
107 | .slave_configure = ata_scsi_slave_config, | |
ccf68c34 | 108 | .slave_destroy = ata_scsi_slave_destroy, |
1da177e4 | 109 | .bios_param = ata_std_bios_param, |
1da177e4 LT |
110 | }; |
111 | ||
ac2164d5 TH |
112 | static const struct ata_port_operations vt6420_sata_ops = { |
113 | .port_disable = ata_port_disable, | |
114 | ||
115 | .tf_load = ata_tf_load, | |
116 | .tf_read = ata_tf_read, | |
117 | .check_status = ata_check_status, | |
118 | .exec_command = ata_exec_command, | |
119 | .dev_select = ata_std_dev_select, | |
120 | ||
121 | .bmdma_setup = ata_bmdma_setup, | |
122 | .bmdma_start = ata_bmdma_start, | |
123 | .bmdma_stop = ata_bmdma_stop, | |
124 | .bmdma_status = ata_bmdma_status, | |
125 | ||
126 | .qc_prep = ata_qc_prep, | |
127 | .qc_issue = ata_qc_issue_prot, | |
128 | .data_xfer = ata_pio_data_xfer, | |
129 | ||
130 | .freeze = ata_bmdma_freeze, | |
131 | .thaw = ata_bmdma_thaw, | |
132 | .error_handler = vt6420_error_handler, | |
133 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
134 | ||
135 | .irq_handler = ata_interrupt, | |
136 | .irq_clear = ata_bmdma_irq_clear, | |
137 | ||
138 | .port_start = ata_port_start, | |
139 | .port_stop = ata_port_stop, | |
140 | .host_stop = ata_host_stop, | |
141 | }; | |
142 | ||
143 | static const struct ata_port_operations vt6421_sata_ops = { | |
1da177e4 LT |
144 | .port_disable = ata_port_disable, |
145 | ||
146 | .tf_load = ata_tf_load, | |
147 | .tf_read = ata_tf_read, | |
148 | .check_status = ata_check_status, | |
149 | .exec_command = ata_exec_command, | |
150 | .dev_select = ata_std_dev_select, | |
151 | ||
1da177e4 LT |
152 | .bmdma_setup = ata_bmdma_setup, |
153 | .bmdma_start = ata_bmdma_start, | |
154 | .bmdma_stop = ata_bmdma_stop, | |
155 | .bmdma_status = ata_bmdma_status, | |
156 | ||
157 | .qc_prep = ata_qc_prep, | |
158 | .qc_issue = ata_qc_issue_prot, | |
a6b2c5d4 | 159 | .data_xfer = ata_pio_data_xfer, |
1da177e4 | 160 | |
40ef1d8d TH |
161 | .freeze = ata_bmdma_freeze, |
162 | .thaw = ata_bmdma_thaw, | |
163 | .error_handler = ata_bmdma_error_handler, | |
164 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
1da177e4 LT |
165 | |
166 | .irq_handler = ata_interrupt, | |
167 | .irq_clear = ata_bmdma_irq_clear, | |
168 | ||
169 | .scr_read = svia_scr_read, | |
170 | .scr_write = svia_scr_write, | |
171 | ||
172 | .port_start = ata_port_start, | |
173 | .port_stop = ata_port_stop, | |
aa8f0dc6 | 174 | .host_stop = ata_host_stop, |
1da177e4 LT |
175 | }; |
176 | ||
ac2164d5 | 177 | static struct ata_port_info vt6420_port_info = { |
1da177e4 | 178 | .sht = &svia_sht, |
40ef1d8d | 179 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, |
1da177e4 LT |
180 | .pio_mask = 0x1f, |
181 | .mwdma_mask = 0x07, | |
182 | .udma_mask = 0x7f, | |
ac2164d5 | 183 | .port_ops = &vt6420_sata_ops, |
1da177e4 LT |
184 | }; |
185 | ||
186 | MODULE_AUTHOR("Jeff Garzik"); | |
187 | MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers"); | |
188 | MODULE_LICENSE("GPL"); | |
189 | MODULE_DEVICE_TABLE(pci, svia_pci_tbl); | |
190 | MODULE_VERSION(DRV_VERSION); | |
191 | ||
192 | static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg) | |
193 | { | |
194 | if (sc_reg > SCR_CONTROL) | |
195 | return 0xffffffffU; | |
196 | return inl(ap->ioaddr.scr_addr + (4 * sc_reg)); | |
197 | } | |
198 | ||
199 | static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | |
200 | { | |
201 | if (sc_reg > SCR_CONTROL) | |
202 | return; | |
203 | outl(val, ap->ioaddr.scr_addr + (4 * sc_reg)); | |
204 | } | |
205 | ||
ac2164d5 TH |
206 | /** |
207 | * vt6420_prereset - prereset for vt6420 | |
208 | * @ap: target ATA port | |
209 | * | |
210 | * SCR registers on vt6420 are pieces of shit and may hang the | |
211 | * whole machine completely if accessed with the wrong timing. | |
212 | * To avoid such catastrophe, vt6420 doesn't provide generic SCR | |
213 | * access operations, but uses SStatus and SControl only during | |
214 | * boot probing in controlled way. | |
215 | * | |
216 | * As the old (pre EH update) probing code is proven to work, we | |
217 | * strictly follow the access pattern. | |
218 | * | |
219 | * LOCKING: | |
220 | * Kernel thread context (may sleep) | |
221 | * | |
222 | * RETURNS: | |
223 | * 0 on success, -errno otherwise. | |
224 | */ | |
225 | static int vt6420_prereset(struct ata_port *ap) | |
226 | { | |
227 | struct ata_eh_context *ehc = &ap->eh_context; | |
228 | unsigned long timeout = jiffies + (HZ * 5); | |
229 | u32 sstatus, scontrol; | |
230 | int online; | |
231 | ||
232 | /* don't do any SCR stuff if we're not loading */ | |
233 | if (!ATA_PFLAG_LOADING) | |
234 | goto skip_scr; | |
235 | ||
236 | /* Resume phy. This is the old resume sequence from | |
237 | * __sata_phy_reset(). | |
238 | */ | |
239 | svia_scr_write(ap, SCR_CONTROL, 0x300); | |
240 | svia_scr_read(ap, SCR_CONTROL); /* flush */ | |
241 | ||
242 | /* wait for phy to become ready, if necessary */ | |
243 | do { | |
244 | msleep(200); | |
245 | if ((svia_scr_read(ap, SCR_STATUS) & 0xf) != 1) | |
246 | break; | |
247 | } while (time_before(jiffies, timeout)); | |
248 | ||
249 | /* open code sata_print_link_status() */ | |
250 | sstatus = svia_scr_read(ap, SCR_STATUS); | |
251 | scontrol = svia_scr_read(ap, SCR_CONTROL); | |
252 | ||
253 | online = (sstatus & 0xf) == 0x3; | |
254 | ||
255 | ata_port_printk(ap, KERN_INFO, | |
256 | "SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n", | |
257 | online ? "up" : "down", sstatus, scontrol); | |
258 | ||
259 | /* SStatus is read one more time */ | |
260 | svia_scr_read(ap, SCR_STATUS); | |
261 | ||
262 | if (!online) { | |
263 | /* tell EH to bail */ | |
264 | ehc->i.action &= ~ATA_EH_RESET_MASK; | |
265 | return 0; | |
266 | } | |
267 | ||
268 | skip_scr: | |
269 | /* wait for !BSY */ | |
270 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
271 | ||
272 | return 0; | |
273 | } | |
274 | ||
275 | static void vt6420_error_handler(struct ata_port *ap) | |
276 | { | |
277 | return ata_bmdma_drive_eh(ap, vt6420_prereset, ata_std_softreset, | |
278 | NULL, ata_std_postreset); | |
279 | } | |
280 | ||
1da177e4 LT |
281 | static const unsigned int svia_bar_sizes[] = { |
282 | 8, 4, 8, 4, 16, 256 | |
283 | }; | |
284 | ||
285 | static const unsigned int vt6421_bar_sizes[] = { | |
286 | 16, 16, 16, 16, 32, 128 | |
287 | }; | |
288 | ||
289 | static unsigned long svia_scr_addr(unsigned long addr, unsigned int port) | |
290 | { | |
291 | return addr + (port * 128); | |
292 | } | |
293 | ||
294 | static unsigned long vt6421_scr_addr(unsigned long addr, unsigned int port) | |
295 | { | |
296 | return addr + (port * 64); | |
297 | } | |
298 | ||
299 | static void vt6421_init_addrs(struct ata_probe_ent *probe_ent, | |
300 | struct pci_dev *pdev, | |
301 | unsigned int port) | |
302 | { | |
303 | unsigned long reg_addr = pci_resource_start(pdev, port); | |
304 | unsigned long bmdma_addr = pci_resource_start(pdev, 4) + (port * 8); | |
305 | unsigned long scr_addr; | |
306 | ||
307 | probe_ent->port[port].cmd_addr = reg_addr; | |
308 | probe_ent->port[port].altstatus_addr = | |
309 | probe_ent->port[port].ctl_addr = (reg_addr + 8) | ATA_PCI_CTL_OFS; | |
310 | probe_ent->port[port].bmdma_addr = bmdma_addr; | |
311 | ||
312 | scr_addr = vt6421_scr_addr(pci_resource_start(pdev, 5), port); | |
313 | probe_ent->port[port].scr_addr = scr_addr; | |
314 | ||
315 | ata_std_ports(&probe_ent->port[port]); | |
316 | } | |
317 | ||
318 | static struct ata_probe_ent *vt6420_init_probe_ent(struct pci_dev *pdev) | |
319 | { | |
320 | struct ata_probe_ent *probe_ent; | |
ac2164d5 | 321 | struct ata_port_info *ppi = &vt6420_port_info; |
1da177e4 | 322 | |
47a86593 | 323 | probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); |
1da177e4 LT |
324 | if (!probe_ent) |
325 | return NULL; | |
326 | ||
327 | probe_ent->port[0].scr_addr = | |
328 | svia_scr_addr(pci_resource_start(pdev, 5), 0); | |
329 | probe_ent->port[1].scr_addr = | |
330 | svia_scr_addr(pci_resource_start(pdev, 5), 1); | |
331 | ||
332 | return probe_ent; | |
333 | } | |
334 | ||
335 | static struct ata_probe_ent *vt6421_init_probe_ent(struct pci_dev *pdev) | |
336 | { | |
337 | struct ata_probe_ent *probe_ent; | |
338 | unsigned int i; | |
339 | ||
340 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); | |
341 | if (!probe_ent) | |
342 | return NULL; | |
343 | ||
344 | memset(probe_ent, 0, sizeof(*probe_ent)); | |
345 | probe_ent->dev = pci_dev_to_dev(pdev); | |
346 | INIT_LIST_HEAD(&probe_ent->node); | |
347 | ||
348 | probe_ent->sht = &svia_sht; | |
40ef1d8d | 349 | probe_ent->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY; |
ac2164d5 | 350 | probe_ent->port_ops = &vt6421_sata_ops; |
1da177e4 LT |
351 | probe_ent->n_ports = N_PORTS; |
352 | probe_ent->irq = pdev->irq; | |
1d6f359a | 353 | probe_ent->irq_flags = IRQF_SHARED; |
1da177e4 LT |
354 | probe_ent->pio_mask = 0x1f; |
355 | probe_ent->mwdma_mask = 0x07; | |
356 | probe_ent->udma_mask = 0x7f; | |
357 | ||
358 | for (i = 0; i < N_PORTS; i++) | |
359 | vt6421_init_addrs(probe_ent, pdev, i); | |
360 | ||
361 | return probe_ent; | |
362 | } | |
363 | ||
364 | static void svia_configure(struct pci_dev *pdev) | |
365 | { | |
366 | u8 tmp8; | |
367 | ||
368 | pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tmp8); | |
a9524a76 | 369 | dev_printk(KERN_INFO, &pdev->dev, "routed to hard irq line %d\n", |
1da177e4 LT |
370 | (int) (tmp8 & 0xf0) == 0xf0 ? 0 : tmp8 & 0x0f); |
371 | ||
372 | /* make sure SATA channels are enabled */ | |
373 | pci_read_config_byte(pdev, SATA_CHAN_ENAB, &tmp8); | |
374 | if ((tmp8 & ALL_PORTS) != ALL_PORTS) { | |
a9524a76 JG |
375 | dev_printk(KERN_DEBUG, &pdev->dev, |
376 | "enabling SATA channels (0x%x)\n", | |
377 | (int) tmp8); | |
1da177e4 LT |
378 | tmp8 |= ALL_PORTS; |
379 | pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8); | |
380 | } | |
381 | ||
382 | /* make sure interrupts for each channel sent to us */ | |
383 | pci_read_config_byte(pdev, SATA_INT_GATE, &tmp8); | |
384 | if ((tmp8 & ALL_PORTS) != ALL_PORTS) { | |
a9524a76 JG |
385 | dev_printk(KERN_DEBUG, &pdev->dev, |
386 | "enabling SATA channel interrupts (0x%x)\n", | |
387 | (int) tmp8); | |
1da177e4 LT |
388 | tmp8 |= ALL_PORTS; |
389 | pci_write_config_byte(pdev, SATA_INT_GATE, tmp8); | |
390 | } | |
391 | ||
392 | /* make sure native mode is enabled */ | |
393 | pci_read_config_byte(pdev, SATA_NATIVE_MODE, &tmp8); | |
394 | if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) { | |
a9524a76 JG |
395 | dev_printk(KERN_DEBUG, &pdev->dev, |
396 | "enabling SATA channel native mode (0x%x)\n", | |
397 | (int) tmp8); | |
1da177e4 LT |
398 | tmp8 |= NATIVE_MODE_ALL; |
399 | pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8); | |
400 | } | |
401 | } | |
402 | ||
403 | static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |
404 | { | |
405 | static int printed_version; | |
406 | unsigned int i; | |
407 | int rc; | |
408 | struct ata_probe_ent *probe_ent; | |
409 | int board_id = (int) ent->driver_data; | |
410 | const int *bar_sizes; | |
411 | int pci_dev_busy = 0; | |
412 | u8 tmp8; | |
413 | ||
414 | if (!printed_version++) | |
a9524a76 | 415 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
1da177e4 LT |
416 | |
417 | rc = pci_enable_device(pdev); | |
418 | if (rc) | |
419 | return rc; | |
420 | ||
421 | rc = pci_request_regions(pdev, DRV_NAME); | |
422 | if (rc) { | |
423 | pci_dev_busy = 1; | |
424 | goto err_out; | |
425 | } | |
426 | ||
427 | if (board_id == vt6420) { | |
428 | pci_read_config_byte(pdev, SATA_PATA_SHARING, &tmp8); | |
429 | if (tmp8 & SATA_2DEV) { | |
a9524a76 JG |
430 | dev_printk(KERN_ERR, &pdev->dev, |
431 | "SATA master/slave not supported (0x%x)\n", | |
432 | (int) tmp8); | |
1da177e4 LT |
433 | rc = -EIO; |
434 | goto err_out_regions; | |
435 | } | |
436 | ||
437 | bar_sizes = &svia_bar_sizes[0]; | |
438 | } else { | |
439 | bar_sizes = &vt6421_bar_sizes[0]; | |
440 | } | |
441 | ||
442 | for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++) | |
443 | if ((pci_resource_start(pdev, i) == 0) || | |
444 | (pci_resource_len(pdev, i) < bar_sizes[i])) { | |
a9524a76 | 445 | dev_printk(KERN_ERR, &pdev->dev, |
e29419ff GKH |
446 | "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n", |
447 | i, | |
448 | (unsigned long long)pci_resource_start(pdev, i), | |
449 | (unsigned long long)pci_resource_len(pdev, i)); | |
1da177e4 LT |
450 | rc = -ENODEV; |
451 | goto err_out_regions; | |
452 | } | |
453 | ||
454 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
455 | if (rc) | |
456 | goto err_out_regions; | |
457 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
458 | if (rc) | |
459 | goto err_out_regions; | |
460 | ||
461 | if (board_id == vt6420) | |
462 | probe_ent = vt6420_init_probe_ent(pdev); | |
463 | else | |
464 | probe_ent = vt6421_init_probe_ent(pdev); | |
8a60a071 | 465 | |
1da177e4 | 466 | if (!probe_ent) { |
a9524a76 | 467 | dev_printk(KERN_ERR, &pdev->dev, "out of memory\n"); |
1da177e4 LT |
468 | rc = -ENOMEM; |
469 | goto err_out_regions; | |
470 | } | |
471 | ||
472 | svia_configure(pdev); | |
473 | ||
474 | pci_set_master(pdev); | |
475 | ||
476 | /* FIXME: check ata_device_add return value */ | |
477 | ata_device_add(probe_ent); | |
478 | kfree(probe_ent); | |
479 | ||
480 | return 0; | |
481 | ||
482 | err_out_regions: | |
483 | pci_release_regions(pdev); | |
484 | err_out: | |
485 | if (!pci_dev_busy) | |
486 | pci_disable_device(pdev); | |
487 | return rc; | |
488 | } | |
489 | ||
490 | static int __init svia_init(void) | |
491 | { | |
492 | return pci_module_init(&svia_pci_driver); | |
493 | } | |
494 | ||
495 | static void __exit svia_exit(void) | |
496 | { | |
497 | pci_unregister_driver(&svia_pci_driver); | |
498 | } | |
499 | ||
500 | module_init(svia_init); | |
501 | module_exit(svia_exit); | |
502 |