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1 | /* |
2 | * File: include/asm-blackfin/simple_bf533_dma.h | |
3 | * Based on: none - original work | |
4 | * Author: LG Soft India | |
5 | * Copyright (C) 2004-2005 Analog Devices Inc. | |
6 | * Created: Tue Sep 21 2004 | |
7 | * Description: This file contains the major Data structures and constants | |
8 | * used for DMA Implementation in BF533 | |
9 | * Modified: | |
10 | * | |
11 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License as published by | |
15 | * the Free Software Foundation; either version 2, or (at your option) | |
16 | * any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; see the file COPYING. | |
25 | * If not, write to the Free Software Foundation, | |
26 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
27 | */ | |
28 | ||
29 | #ifndef _BLACKFIN_DMA_H_ | |
30 | #define _BLACKFIN_DMA_H_ | |
31 | ||
32 | #include <asm/io.h> | |
33 | #include <linux/slab.h> | |
34 | #include <asm/irq.h> | |
35 | #include <asm/signal.h> | |
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36 | |
37 | #include <linux/kernel.h> | |
38 | #include <asm/mach/dma.h> | |
39 | #include <linux/mm.h> | |
40 | #include <linux/interrupt.h> | |
41 | #include <asm/blackfin.h> | |
42 | ||
43 | #define MAX_DMA_ADDRESS PAGE_OFFSET | |
44 | ||
45 | /***************************************************************************** | |
46 | * Generic DMA Declarations | |
47 | * | |
48 | ****************************************************************************/ | |
49 | enum dma_chan_status { | |
50 | DMA_CHANNEL_FREE, | |
51 | DMA_CHANNEL_REQUESTED, | |
52 | DMA_CHANNEL_ENABLED, | |
53 | }; | |
54 | ||
55 | /*------------------------- | |
56 | * config reg bits value | |
57 | *-------------------------*/ | |
58 | #define DATA_SIZE_8 0 | |
59 | #define DATA_SIZE_16 1 | |
60 | #define DATA_SIZE_32 2 | |
61 | ||
62 | #define DMA_FLOW_STOP 0 | |
63 | #define DMA_FLOW_AUTO 1 | |
64 | #define DMA_FLOW_ARRAY 4 | |
65 | #define DMA_FLOW_SMALL 6 | |
66 | #define DMA_FLOW_LARGE 7 | |
67 | ||
68 | #define DIMENSION_LINEAR 0 | |
69 | #define DIMENSION_2D 1 | |
70 | ||
71 | #define DIR_READ 0 | |
72 | #define DIR_WRITE 1 | |
73 | ||
74 | #define INTR_DISABLE 0 | |
75 | #define INTR_ON_BUF 2 | |
76 | #define INTR_ON_ROW 3 | |
77 | ||
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78 | #define DMA_NOSYNC_KEEP_DMA_BUF 0 |
79 | #define DMA_SYNC_RESTART 1 | |
80 | ||
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81 | struct dmasg { |
82 | unsigned long next_desc_addr; | |
83 | unsigned long start_addr; | |
84 | unsigned short cfg; | |
85 | unsigned short x_count; | |
86 | short x_modify; | |
87 | unsigned short y_count; | |
88 | short y_modify; | |
89 | } __attribute__((packed)); | |
90 | ||
91 | struct dma_register { | |
92 | unsigned long next_desc_ptr; /* DMA Next Descriptor Pointer register */ | |
93 | unsigned long start_addr; /* DMA Start address register */ | |
94 | ||
95 | unsigned short cfg; /* DMA Configuration register */ | |
96 | unsigned short dummy1; /* DMA Configuration register */ | |
97 | ||
98 | unsigned long reserved; | |
99 | ||
100 | unsigned short x_count; /* DMA x_count register */ | |
101 | unsigned short dummy2; | |
102 | ||
103 | short x_modify; /* DMA x_modify register */ | |
104 | unsigned short dummy3; | |
105 | ||
106 | unsigned short y_count; /* DMA y_count register */ | |
107 | unsigned short dummy4; | |
108 | ||
109 | short y_modify; /* DMA y_modify register */ | |
110 | unsigned short dummy5; | |
111 | ||
112 | unsigned long curr_desc_ptr; /* DMA Current Descriptor Pointer | |
113 | register */ | |
452af71f | 114 | unsigned long curr_addr_ptr; /* DMA Current Address Pointer |
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115 | register */ |
116 | unsigned short irq_status; /* DMA irq status register */ | |
117 | unsigned short dummy6; | |
118 | ||
119 | unsigned short peripheral_map; /* DMA peripheral map register */ | |
120 | unsigned short dummy7; | |
121 | ||
122 | unsigned short curr_x_count; /* DMA Current x-count register */ | |
123 | unsigned short dummy8; | |
124 | ||
125 | unsigned long reserved2; | |
126 | ||
127 | unsigned short curr_y_count; /* DMA Current y-count register */ | |
128 | unsigned short dummy9; | |
129 | ||
130 | unsigned long reserved3; | |
131 | ||
132 | }; | |
133 | ||
134 | typedef irqreturn_t(*dma_interrupt_t) (int irq, void *dev_id); | |
135 | ||
136 | struct dma_channel { | |
137 | struct mutex dmalock; | |
138 | char *device_id; | |
139 | enum dma_chan_status chan_status; | |
140 | struct dma_register *regs; | |
141 | struct dmasg *sg; /* large mode descriptor */ | |
142 | unsigned int ctrl_num; /* controller number */ | |
143 | dma_interrupt_t irq_callback; | |
144 | void *data; | |
145 | unsigned int dma_enable_flag; | |
146 | unsigned int loopback_flag; | |
147 | }; | |
148 | ||
149 | /******************************************************************************* | |
150 | * DMA API's | |
151 | *******************************************************************************/ | |
152 | /* functions to set register mode */ | |
153 | void set_dma_start_addr(unsigned int channel, unsigned long addr); | |
154 | void set_dma_next_desc_addr(unsigned int channel, unsigned long addr); | |
8a26ac70 | 155 | void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr); |
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156 | void set_dma_x_count(unsigned int channel, unsigned short x_count); |
157 | void set_dma_x_modify(unsigned int channel, short x_modify); | |
158 | void set_dma_y_count(unsigned int channel, unsigned short y_count); | |
159 | void set_dma_y_modify(unsigned int channel, short y_modify); | |
160 | void set_dma_config(unsigned int channel, unsigned short config); | |
161 | unsigned short set_bfin_dma_config(char direction, char flow_mode, | |
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162 | char intr_mode, char dma_mode, char width, |
163 | char syncmode); | |
1d945e2b | 164 | void set_dma_curr_addr(unsigned int channel, unsigned long addr); |
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165 | |
166 | /* get curr status for polling */ | |
167 | unsigned short get_dma_curr_irqstat(unsigned int channel); | |
168 | unsigned short get_dma_curr_xcount(unsigned int channel); | |
169 | unsigned short get_dma_curr_ycount(unsigned int channel); | |
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170 | unsigned long get_dma_next_desc_ptr(unsigned int channel); |
171 | unsigned long get_dma_curr_desc_ptr(unsigned int channel); | |
172 | unsigned long get_dma_curr_addr(unsigned int channel); | |
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173 | |
174 | /* set large DMA mode descriptor */ | |
175 | void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg); | |
176 | ||
177 | /* check if current channel is in use */ | |
178 | int dma_channel_active(unsigned int channel); | |
179 | ||
180 | /* common functions must be called in any mode */ | |
181 | void free_dma(unsigned int channel); | |
182 | int dma_channel_active(unsigned int channel); /* check if a channel is in use */ | |
183 | void disable_dma(unsigned int channel); | |
184 | void enable_dma(unsigned int channel); | |
185 | int request_dma(unsigned int channel, char *device_id); | |
186 | int set_dma_callback(unsigned int channel, dma_interrupt_t callback, | |
187 | void *data); | |
188 | void dma_disable_irq(unsigned int channel); | |
189 | void dma_enable_irq(unsigned int channel); | |
190 | void clear_dma_irqstat(unsigned int channel); | |
191 | void *dma_memcpy(void *dest, const void *src, size_t count); | |
192 | void *safe_dma_memcpy(void *dest, const void *src, size_t count); | |
193 | ||
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194 | extern int channel2irq(unsigned int channel); |
195 | extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL]; | |
196 | ||
1394f032 | 197 | #endif |