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5e1c5ff4 TL |
1 | /* |
2 | * linux/arch/arm/plat-omap/common.c | |
3 | * | |
4 | * Code common to all OMAP machines. | |
44169075 SS |
5 | * The file is created by Tony Lindgren <tony@atomide.com> |
6 | * | |
7 | * Copyright (C) 2009 Texas Instruments | |
8 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | |
5e1c5ff4 TL |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
5e1c5ff4 TL |
14 | #include <linux/module.h> |
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/delay.h> | |
5e1c5ff4 TL |
18 | #include <linux/console.h> |
19 | #include <linux/serial.h> | |
20 | #include <linux/tty.h> | |
21 | #include <linux/serial_8250.h> | |
22 | #include <linux/serial_reg.h> | |
f8ce2547 | 23 | #include <linux/clk.h> |
fced80c7 | 24 | #include <linux/io.h> |
5e1c5ff4 | 25 | |
a09e64fb | 26 | #include <mach/hardware.h> |
5e1c5ff4 TL |
27 | #include <asm/system.h> |
28 | #include <asm/pgtable.h> | |
29 | #include <asm/mach/map.h> | |
92105bb7 | 30 | #include <asm/setup.h> |
5e1c5ff4 | 31 | |
a09e64fb RK |
32 | #include <mach/common.h> |
33 | #include <mach/board.h> | |
34 | #include <mach/control.h> | |
35 | #include <mach/mux.h> | |
36 | #include <mach/fpga.h> | |
5e1c5ff4 | 37 | |
a09e64fb | 38 | #include <mach/clock.h> |
5e1c5ff4 | 39 | |
44595982 PW |
40 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
41 | # include "../mach-omap2/sdrc.h" | |
42 | #endif | |
43 | ||
5e1c5ff4 TL |
44 | #define NO_LENGTH_CHECK 0xffffffff |
45 | ||
92105bb7 TL |
46 | unsigned char omap_bootloader_tag[512]; |
47 | int omap_bootloader_tag_len; | |
5e1c5ff4 TL |
48 | |
49 | struct omap_board_config_kernel *omap_board_config; | |
92105bb7 | 50 | int omap_board_config_size; |
5e1c5ff4 TL |
51 | |
52 | static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out) | |
53 | { | |
54 | struct omap_board_config_kernel *kinfo = NULL; | |
55 | int i; | |
56 | ||
57 | #ifdef CONFIG_OMAP_BOOT_TAG | |
58 | struct omap_board_config_entry *info = NULL; | |
59 | ||
60 | if (omap_bootloader_tag_len > 4) | |
61 | info = (struct omap_board_config_entry *) omap_bootloader_tag; | |
62 | while (info != NULL) { | |
63 | u8 *next; | |
64 | ||
65 | if (info->tag == tag) { | |
66 | if (skip == 0) | |
67 | break; | |
68 | skip--; | |
69 | } | |
70 | ||
71 | if ((info->len & 0x03) != 0) { | |
72 | /* We bail out to avoid an alignment fault */ | |
73 | printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n", | |
74 | info->len, info->tag); | |
75 | return NULL; | |
76 | } | |
77 | next = (u8 *) info + sizeof(*info) + info->len; | |
78 | if (next >= omap_bootloader_tag + omap_bootloader_tag_len) | |
79 | info = NULL; | |
80 | else | |
81 | info = (struct omap_board_config_entry *) next; | |
82 | } | |
83 | if (info != NULL) { | |
84 | /* Check the length as a lame attempt to check for | |
6cbdc8c5 | 85 | * binary inconsistency. */ |
5e1c5ff4 TL |
86 | if (len != NO_LENGTH_CHECK) { |
87 | /* Word-align len */ | |
88 | if (len & 0x03) | |
89 | len = (len + 3) & ~0x03; | |
90 | if (info->len != len) { | |
91 | printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n", | |
92 | tag, len, info->len); | |
93 | return NULL; | |
94 | } | |
95 | } | |
96 | if (len_out != NULL) | |
97 | *len_out = info->len; | |
98 | return info->data; | |
99 | } | |
100 | #endif | |
101 | /* Try to find the config from the board-specific structures | |
102 | * in the kernel. */ | |
103 | for (i = 0; i < omap_board_config_size; i++) { | |
104 | if (omap_board_config[i].tag == tag) { | |
c40fae95 TL |
105 | if (skip == 0) { |
106 | kinfo = &omap_board_config[i]; | |
107 | break; | |
108 | } else { | |
109 | skip--; | |
110 | } | |
5e1c5ff4 TL |
111 | } |
112 | } | |
113 | if (kinfo == NULL) | |
114 | return NULL; | |
115 | return kinfo->data; | |
116 | } | |
117 | ||
118 | const void *__omap_get_config(u16 tag, size_t len, int nr) | |
119 | { | |
120 | return get_config(tag, len, nr, NULL); | |
121 | } | |
122 | EXPORT_SYMBOL(__omap_get_config); | |
123 | ||
124 | const void *omap_get_var_config(u16 tag, size_t *len) | |
125 | { | |
126 | return get_config(tag, NO_LENGTH_CHECK, 0, len); | |
127 | } | |
128 | EXPORT_SYMBOL(omap_get_var_config); | |
129 | ||
130 | static int __init omap_add_serial_console(void) | |
131 | { | |
1a8bfa1e TL |
132 | const struct omap_serial_console_config *con_info; |
133 | const struct omap_uart_config *uart_info; | |
134 | static char speed[11], *opt = NULL; | |
135 | int line, i, uart_idx; | |
136 | ||
137 | uart_info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); | |
138 | con_info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE, | |
139 | struct omap_serial_console_config); | |
140 | if (uart_info == NULL || con_info == NULL) | |
141 | return 0; | |
142 | ||
143 | if (con_info->console_uart == 0) | |
144 | return 0; | |
145 | ||
146 | if (con_info->console_speed) { | |
147 | snprintf(speed, sizeof(speed), "%u", con_info->console_speed); | |
148 | opt = speed; | |
149 | } | |
5e1c5ff4 | 150 | |
1a8bfa1e TL |
151 | uart_idx = con_info->console_uart - 1; |
152 | if (uart_idx >= OMAP_MAX_NR_PORTS) { | |
153 | printk(KERN_INFO "Console: external UART#%d. " | |
154 | "Not adding it as console this time.\n", | |
155 | uart_idx + 1); | |
156 | return 0; | |
157 | } | |
158 | if (!(uart_info->enabled_uarts & (1 << uart_idx))) { | |
159 | printk(KERN_ERR "Console: Selected UART#%d is " | |
160 | "not enabled for this platform\n", | |
161 | uart_idx + 1); | |
162 | return -1; | |
163 | } | |
164 | line = 0; | |
165 | for (i = 0; i < uart_idx; i++) { | |
166 | if (uart_info->enabled_uarts & (1 << i)) | |
167 | line++; | |
5e1c5ff4 | 168 | } |
1a8bfa1e | 169 | return add_preferred_console("ttyS", line, opt); |
5e1c5ff4 TL |
170 | } |
171 | console_initcall(omap_add_serial_console); | |
075192ae KH |
172 | |
173 | ||
174 | /* | |
175 | * 32KHz clocksource ... always available, on pretty most chips except | |
176 | * OMAP 730 and 1510. Other timers could be used as clocksources, with | |
177 | * higher resolution in free-running counter modes (e.g. 12 MHz xtal), | |
178 | * but systems won't necessarily want to spend resources that way. | |
179 | */ | |
180 | ||
a4ab0d83 | 181 | #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 |
075192ae | 182 | |
a4ab0d83 | 183 | #if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) |
075192ae KH |
184 | |
185 | #include <linux/clocksource.h> | |
186 | ||
a4ab0d83 TL |
187 | #ifdef CONFIG_ARCH_OMAP16XX |
188 | static cycle_t omap16xx_32k_read(struct clocksource *cs) | |
189 | { | |
190 | return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED); | |
191 | } | |
192 | #else | |
193 | #define omap16xx_32k_read NULL | |
194 | #endif | |
195 | ||
196 | #ifdef CONFIG_ARCH_OMAP2420 | |
197 | static cycle_t omap2420_32k_read(struct clocksource *cs) | |
198 | { | |
199 | return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10); | |
200 | } | |
201 | #else | |
202 | #define omap2420_32k_read NULL | |
203 | #endif | |
204 | ||
205 | #ifdef CONFIG_ARCH_OMAP2430 | |
206 | static cycle_t omap2430_32k_read(struct clocksource *cs) | |
207 | { | |
208 | return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10); | |
209 | } | |
210 | #else | |
211 | #define omap2430_32k_read NULL | |
212 | #endif | |
213 | ||
214 | #ifdef CONFIG_ARCH_OMAP34XX | |
215 | static cycle_t omap34xx_32k_read(struct clocksource *cs) | |
075192ae | 216 | { |
a4ab0d83 TL |
217 | return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10); |
218 | } | |
219 | #else | |
220 | #define omap34xx_32k_read NULL | |
221 | #endif | |
222 | ||
44169075 SS |
223 | #ifdef CONFIG_ARCH_OMAP4 |
224 | static cycle_t omap44xx_32k_read(struct clocksource *cs) | |
225 | { | |
226 | return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10); | |
227 | } | |
228 | #else | |
229 | #define omap44xx_32k_read NULL | |
230 | #endif | |
231 | ||
a4ab0d83 TL |
232 | /* |
233 | * Kernel assumes that sched_clock can be called early but may not have | |
234 | * things ready yet. | |
235 | */ | |
236 | static cycle_t omap_32k_read_dummy(struct clocksource *cs) | |
237 | { | |
238 | return 0; | |
075192ae KH |
239 | } |
240 | ||
241 | static struct clocksource clocksource_32k = { | |
242 | .name = "32k_counter", | |
243 | .rating = 250, | |
a4ab0d83 | 244 | .read = omap_32k_read_dummy, |
075192ae KH |
245 | .mask = CLOCKSOURCE_MASK(32), |
246 | .shift = 10, | |
247 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
248 | }; | |
249 | ||
f258b0c6 KH |
250 | /* |
251 | * Returns current time from boot in nsecs. It's OK for this to wrap | |
252 | * around for now, as it's just a relative time stamp. | |
253 | */ | |
254 | unsigned long long sched_clock(void) | |
255 | { | |
80ea3bac AK |
256 | unsigned long long ret; |
257 | ||
a4ab0d83 | 258 | ret = (unsigned long long)clocksource_32k.read(&clocksource_32k); |
80ea3bac AK |
259 | ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift; |
260 | return ret; | |
f258b0c6 KH |
261 | } |
262 | ||
075192ae KH |
263 | static int __init omap_init_clocksource_32k(void) |
264 | { | |
265 | static char err[] __initdata = KERN_ERR | |
266 | "%s: can't register clocksource!\n"; | |
267 | ||
44595982 PW |
268 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { |
269 | struct clk *sync_32k_ick; | |
270 | ||
a4ab0d83 TL |
271 | if (cpu_is_omap16xx()) |
272 | clocksource_32k.read = omap16xx_32k_read; | |
273 | else if (cpu_is_omap2420()) | |
274 | clocksource_32k.read = omap2420_32k_read; | |
275 | else if (cpu_is_omap2430()) | |
276 | clocksource_32k.read = omap2430_32k_read; | |
277 | else if (cpu_is_omap34xx()) | |
278 | clocksource_32k.read = omap34xx_32k_read; | |
44169075 SS |
279 | else if (cpu_is_omap44xx()) |
280 | clocksource_32k.read = omap44xx_32k_read; | |
a4ab0d83 TL |
281 | else |
282 | return -ENODEV; | |
283 | ||
44595982 PW |
284 | sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); |
285 | if (sync_32k_ick) | |
286 | clk_enable(sync_32k_ick); | |
287 | ||
075192ae KH |
288 | clocksource_32k.mult = clocksource_hz2mult(32768, |
289 | clocksource_32k.shift); | |
290 | ||
291 | if (clocksource_register(&clocksource_32k)) | |
292 | printk(err, clocksource_32k.name); | |
293 | } | |
294 | return 0; | |
295 | } | |
296 | arch_initcall(omap_init_clocksource_32k); | |
297 | ||
a4ab0d83 | 298 | #endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */ |
44595982 PW |
299 | |
300 | /* Global address base setup code */ | |
301 | ||
a58caad1 TL |
302 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
303 | ||
8f9ccfee | 304 | static void __init __omap2_set_globals(struct omap_globals *omap2_globals) |
a58caad1 | 305 | { |
0e564848 | 306 | omap2_set_globals_tap(omap2_globals); |
f2ab9977 | 307 | omap2_set_globals_sdrc(omap2_globals); |
a58caad1 TL |
308 | omap2_set_globals_control(omap2_globals); |
309 | omap2_set_globals_prcm(omap2_globals); | |
310 | } | |
311 | ||
312 | #endif | |
313 | ||
44595982 | 314 | #if defined(CONFIG_ARCH_OMAP2420) |
a58caad1 TL |
315 | |
316 | static struct omap_globals omap242x_globals = { | |
0e564848 | 317 | .class = OMAP242X_CLASS, |
e8a91c95 RK |
318 | .tap = OMAP2_IO_ADDRESS(0x48014000), |
319 | .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), | |
320 | .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), | |
321 | .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), | |
322 | .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), | |
323 | .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), | |
a58caad1 TL |
324 | }; |
325 | ||
44595982 PW |
326 | void __init omap2_set_globals_242x(void) |
327 | { | |
8f9ccfee | 328 | __omap2_set_globals(&omap242x_globals); |
44595982 PW |
329 | } |
330 | #endif | |
331 | ||
332 | #if defined(CONFIG_ARCH_OMAP2430) | |
a58caad1 TL |
333 | |
334 | static struct omap_globals omap243x_globals = { | |
0e564848 | 335 | .class = OMAP243X_CLASS, |
e8a91c95 RK |
336 | .tap = OMAP2_IO_ADDRESS(0x4900a000), |
337 | .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), | |
338 | .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), | |
339 | .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), | |
340 | .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), | |
341 | .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), | |
a58caad1 TL |
342 | }; |
343 | ||
44595982 PW |
344 | void __init omap2_set_globals_243x(void) |
345 | { | |
8f9ccfee | 346 | __omap2_set_globals(&omap243x_globals); |
44595982 PW |
347 | } |
348 | #endif | |
349 | ||
350 | #if defined(CONFIG_ARCH_OMAP3430) | |
a58caad1 TL |
351 | |
352 | static struct omap_globals omap343x_globals = { | |
0e564848 | 353 | .class = OMAP343X_CLASS, |
e8a91c95 RK |
354 | .tap = OMAP2_IO_ADDRESS(0x4830A000), |
355 | .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), | |
356 | .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), | |
357 | .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), | |
358 | .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), | |
359 | .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), | |
a58caad1 TL |
360 | }; |
361 | ||
44595982 PW |
362 | void __init omap2_set_globals_343x(void) |
363 | { | |
8f9ccfee | 364 | __omap2_set_globals(&omap343x_globals); |
44595982 PW |
365 | } |
366 | #endif | |
367 | ||
44169075 SS |
368 | #if defined(CONFIG_ARCH_OMAP4) |
369 | static struct omap_globals omap4_globals = { | |
370 | .class = OMAP443X_CLASS, | |
371 | .tap = OMAP2_IO_ADDRESS(0x4830a000), | |
372 | .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE), | |
373 | .prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE), | |
374 | .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE), | |
375 | }; | |
376 | ||
377 | void __init omap2_set_globals_443x(void) | |
378 | { | |
379 | omap2_set_globals_tap(&omap4_globals); | |
380 | omap2_set_globals_control(&omap4_globals); | |
381 | } | |
382 | #endif | |
383 |