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fabbfb9e KG |
1 | /* |
2 | * mpc83xx_wdt.c - MPC83xx watchdog userspace interface | |
3 | * | |
4 | * Authors: Dave Updegraff <dave@cray.org> | |
5 | * Kumar Gala <galak@kernel.crashing.org> | |
6 | * Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org> | |
7 | * ..and from sc520_wdt | |
8 | * | |
9 | * Note: it appears that you can only actually ENABLE or DISABLE the thing | |
10 | * once after POR. Once enabled, you cannot disable, and vice versa. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify it | |
13 | * under the terms of the GNU General Public License as published by the | |
14 | * Free Software Foundation; either version 2 of the License, or (at your | |
15 | * option) any later version. | |
16 | */ | |
17 | ||
fabbfb9e KG |
18 | #include <linux/fs.h> |
19 | #include <linux/init.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/miscdevice.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/watchdog.h> | |
25 | #include <asm/io.h> | |
26 | #include <asm/uaccess.h> | |
27 | ||
28 | struct mpc83xx_wdt { | |
29 | __be32 res0; | |
30 | __be32 swcrr; /* System watchdog control register */ | |
31 | #define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */ | |
32 | #define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */ | |
33 | #define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/ | |
34 | #define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */ | |
35 | __be32 swcnr; /* System watchdog count register */ | |
36 | u8 res1[2]; | |
37 | __be16 swsrr; /* System watchdog service register */ | |
38 | u8 res2[0xF0]; | |
39 | }; | |
40 | ||
41 | static struct mpc83xx_wdt __iomem *wd_base; | |
42 | ||
43 | static u16 timeout = 0xffff; | |
44 | module_param(timeout, ushort, 0); | |
45 | MODULE_PARM_DESC(timeout, "Watchdog timeout in ticks. (0<timeout<65536, default=65535"); | |
46 | ||
47 | static int reset = 1; | |
48 | module_param(reset, bool, 0); | |
49 | MODULE_PARM_DESC(reset, "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset"); | |
50 | ||
51 | /* | |
52 | * We always prescale, but if someone really doesn't want to they can set this | |
53 | * to 0 | |
54 | */ | |
55 | static int prescale = 1; | |
56 | static unsigned int timeout_sec; | |
57 | ||
58 | static unsigned long wdt_is_open; | |
c7dfd0cc | 59 | static DEFINE_SPINLOCK(wdt_spinlock); |
fabbfb9e KG |
60 | |
61 | static void mpc83xx_wdt_keepalive(void) | |
62 | { | |
63 | /* Ping the WDT */ | |
64 | spin_lock(&wdt_spinlock); | |
65 | out_be16(&wd_base->swsrr, 0x556c); | |
66 | out_be16(&wd_base->swsrr, 0xaa39); | |
67 | spin_unlock(&wdt_spinlock); | |
68 | } | |
69 | ||
70 | static ssize_t mpc83xx_wdt_write(struct file *file, const char __user *buf, | |
71 | size_t count, loff_t *ppos) | |
72 | { | |
73 | if (count) | |
74 | mpc83xx_wdt_keepalive(); | |
75 | return count; | |
76 | } | |
77 | ||
78 | static int mpc83xx_wdt_open(struct inode *inode, struct file *file) | |
79 | { | |
80 | u32 tmp = SWCRR_SWEN; | |
81 | if (test_and_set_bit(0, &wdt_is_open)) | |
82 | return -EBUSY; | |
83 | ||
84 | /* Once we start the watchdog we can't stop it */ | |
85 | __module_get(THIS_MODULE); | |
86 | ||
87 | /* Good, fire up the show */ | |
88 | if (prescale) | |
89 | tmp |= SWCRR_SWPR; | |
90 | if (reset) | |
91 | tmp |= SWCRR_SWRI; | |
92 | ||
93 | tmp |= timeout << 16; | |
94 | ||
95 | out_be32(&wd_base->swcrr, tmp); | |
96 | ||
97 | return nonseekable_open(inode, file); | |
98 | } | |
99 | ||
100 | static int mpc83xx_wdt_release(struct inode *inode, struct file *file) | |
101 | { | |
102 | printk(KERN_CRIT "Unexpected close, not stopping watchdog!\n"); | |
103 | mpc83xx_wdt_keepalive(); | |
104 | clear_bit(0, &wdt_is_open); | |
105 | return 0; | |
106 | } | |
107 | ||
108 | static int mpc83xx_wdt_ioctl(struct inode *inode, struct file *file, | |
109 | unsigned int cmd, unsigned long arg) | |
110 | { | |
111 | void __user *argp = (void __user *)arg; | |
112 | int __user *p = argp; | |
113 | static struct watchdog_info ident = { | |
114 | .options = WDIOF_KEEPALIVEPING, | |
115 | .firmware_version = 1, | |
116 | .identity = "MPC83xx", | |
117 | }; | |
118 | ||
119 | switch (cmd) { | |
120 | case WDIOC_GETSUPPORT: | |
121 | return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; | |
5c4eb61b WVS |
122 | case WDIOC_GETSTATUS: |
123 | case WDIOC_GETBOOTSTATUS: | |
124 | return put_user(0, p); | |
fabbfb9e KG |
125 | case WDIOC_KEEPALIVE: |
126 | mpc83xx_wdt_keepalive(); | |
127 | return 0; | |
128 | case WDIOC_GETTIMEOUT: | |
129 | return put_user(timeout_sec, p); | |
130 | default: | |
795b89d2 | 131 | return -ENOTTY; |
fabbfb9e KG |
132 | } |
133 | } | |
134 | ||
62322d25 | 135 | static const struct file_operations mpc83xx_wdt_fops = { |
fabbfb9e KG |
136 | .owner = THIS_MODULE, |
137 | .llseek = no_llseek, | |
138 | .write = mpc83xx_wdt_write, | |
139 | .ioctl = mpc83xx_wdt_ioctl, | |
140 | .open = mpc83xx_wdt_open, | |
141 | .release = mpc83xx_wdt_release, | |
142 | }; | |
143 | ||
144 | static struct miscdevice mpc83xx_wdt_miscdev = { | |
145 | .minor = WATCHDOG_MINOR, | |
146 | .name = "watchdog", | |
147 | .fops = &mpc83xx_wdt_fops, | |
148 | }; | |
149 | ||
150 | static int __devinit mpc83xx_wdt_probe(struct platform_device *dev) | |
151 | { | |
152 | struct resource *r; | |
153 | int ret; | |
154 | unsigned int *freq = dev->dev.platform_data; | |
155 | ||
156 | /* get a pointer to the register memory */ | |
157 | r = platform_get_resource(dev, IORESOURCE_MEM, 0); | |
158 | ||
159 | if (!r) { | |
160 | ret = -ENODEV; | |
161 | goto err_out; | |
162 | } | |
163 | ||
164 | wd_base = ioremap(r->start, sizeof (struct mpc83xx_wdt)); | |
165 | ||
166 | if (wd_base == NULL) { | |
167 | ret = -ENOMEM; | |
168 | goto err_out; | |
169 | } | |
170 | ||
171 | ret = misc_register(&mpc83xx_wdt_miscdev); | |
172 | if (ret) { | |
173 | printk(KERN_ERR "cannot register miscdev on minor=%d " | |
174 | "(err=%d)\n", | |
175 | WATCHDOG_MINOR, ret); | |
176 | goto err_unmap; | |
177 | } | |
178 | ||
179 | /* Calculate the timeout in seconds */ | |
180 | if (prescale) | |
181 | timeout_sec = (timeout * 0x10000) / (*freq); | |
182 | else | |
183 | timeout_sec = timeout / (*freq); | |
184 | ||
185 | printk(KERN_INFO "WDT driver for MPC83xx initialized. " | |
186 | "mode:%s timeout=%d (%d seconds)\n", | |
187 | reset ? "reset":"interrupt", timeout, timeout_sec); | |
fabbfb9e KG |
188 | return 0; |
189 | ||
190 | err_unmap: | |
191 | iounmap(wd_base); | |
192 | err_out: | |
193 | return ret; | |
194 | } | |
195 | ||
196 | static int __devexit mpc83xx_wdt_remove(struct platform_device *dev) | |
197 | { | |
198 | misc_deregister(&mpc83xx_wdt_miscdev); | |
199 | iounmap(wd_base); | |
200 | ||
201 | return 0; | |
202 | } | |
203 | ||
204 | static struct platform_driver mpc83xx_wdt_driver = { | |
205 | .probe = mpc83xx_wdt_probe, | |
206 | .remove = __devexit_p(mpc83xx_wdt_remove), | |
207 | .driver = { | |
208 | .name = "mpc83xx_wdt", | |
f37d193c | 209 | .owner = THIS_MODULE, |
fabbfb9e KG |
210 | }, |
211 | }; | |
212 | ||
213 | static int __init mpc83xx_wdt_init(void) | |
214 | { | |
215 | return platform_driver_register(&mpc83xx_wdt_driver); | |
216 | } | |
217 | ||
218 | static void __exit mpc83xx_wdt_exit(void) | |
219 | { | |
220 | platform_driver_unregister(&mpc83xx_wdt_driver); | |
221 | } | |
222 | ||
223 | module_init(mpc83xx_wdt_init); | |
224 | module_exit(mpc83xx_wdt_exit); | |
225 | ||
226 | MODULE_AUTHOR("Dave Updegraff, Kumar Gala"); | |
227 | MODULE_DESCRIPTION("Driver for watchdog timer in MPC83xx uProcessor"); | |
228 | MODULE_LICENSE("GPL"); | |
229 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | |
f37d193c | 230 | MODULE_ALIAS("platform:mpc83xx_wdt"); |