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1da177e4 LT |
1 | /* |
2 | * I/O Processor (IOP) defines and structures, mostly snagged from A/UX | |
3 | * header files. | |
4 | * | |
5 | * The original header from which this was taken is copyrighted. I've done some | |
6 | * rewriting (in fact my changes make this a bit more readable, IMHO) but some | |
7 | * more should be done. | |
8 | */ | |
9 | ||
10 | /* | |
11 | * This is the base address of the IOPs. Use this as the address of | |
12 | * a "struct iop" (see below) to see where the actual registers fall. | |
13 | */ | |
14 | ||
15 | #define SCC_IOP_BASE_IIFX (0x50F04000) | |
16 | #define ISM_IOP_BASE_IIFX (0x50F12000) | |
17 | ||
18 | #define SCC_IOP_BASE_QUADRA (0x50F0C000) | |
19 | #define ISM_IOP_BASE_QUADRA (0x50F1E000) | |
20 | ||
21 | /* IOP status/control register bits: */ | |
22 | ||
23 | #define IOP_BYPASS 0x01 /* bypass-mode hardware access */ | |
24 | #define IOP_AUTOINC 0x02 /* allow autoincrement of ramhi/lo */ | |
25 | #define IOP_RUN 0x04 /* set to 0 to reset IOP chip */ | |
26 | #define IOP_IRQ 0x08 /* generate IRQ to IOP if 1 */ | |
27 | #define IOP_INT0 0x10 /* intr priority from IOP to host */ | |
28 | #define IOP_INT1 0x20 /* intr priority from IOP to host */ | |
29 | #define IOP_HWINT 0x40 /* IRQ from hardware; bypass mode only */ | |
30 | #define IOP_DMAINACTIVE 0x80 /* no DMA request active; bypass mode only */ | |
31 | ||
32 | #define NUM_IOPS 2 | |
33 | #define NUM_IOP_CHAN 7 | |
34 | #define NUM_IOP_MSGS NUM_IOP_CHAN*8 | |
35 | #define IOP_MSG_LEN 32 | |
36 | ||
37 | /* IOP reference numbers, used by the globally-visible iop_xxx functions */ | |
38 | ||
39 | #define IOP_NUM_SCC 0 | |
40 | #define IOP_NUM_ISM 1 | |
41 | ||
42 | /* IOP channel states */ | |
43 | ||
44 | #define IOP_MSG_IDLE 0 /* idle */ | |
45 | #define IOP_MSG_NEW 1 /* new message sent */ | |
46 | #define IOP_MSG_RCVD 2 /* message received; processing */ | |
47 | #define IOP_MSG_COMPLETE 3 /* message processing complete */ | |
48 | ||
49 | /* IOP message status codes */ | |
50 | ||
51 | #define IOP_MSGSTATUS_UNUSED 0 /* Unusued message structure */ | |
52 | #define IOP_MSGSTATUS_WAITING 1 /* waiting for channel */ | |
53 | #define IOP_MSGSTATUS_SENT 2 /* message sent, awaiting reply */ | |
54 | #define IOP_MSGSTATUS_COMPLETE 3 /* message complete and reply rcvd */ | |
55 | #define IOP_MSGSTATUS_UNSOL 6 /* message is unsolicited */ | |
56 | ||
57 | /* IOP memory addresses of the members of the mac_iop_kernel structure. */ | |
58 | ||
59 | #define IOP_ADDR_MAX_SEND_CHAN 0x0200 | |
60 | #define IOP_ADDR_SEND_STATE 0x0201 | |
61 | #define IOP_ADDR_PATCH_CTRL 0x021F | |
62 | #define IOP_ADDR_SEND_MSG 0x0220 | |
63 | #define IOP_ADDR_MAX_RECV_CHAN 0x0300 | |
64 | #define IOP_ADDR_RECV_STATE 0x0301 | |
65 | #define IOP_ADDR_ALIVE 0x031F | |
66 | #define IOP_ADDR_RECV_MSG 0x0320 | |
67 | ||
68 | #ifndef __ASSEMBLY__ | |
69 | ||
70 | /* | |
71 | * IOP Control registers, staggered because in usual Apple style they were | |
72 | * too lazy to decode the A0 bit. This structure is assumed to begin at | |
73 | * one of the xxx_IOP_BASE addresses given above. | |
74 | */ | |
75 | ||
76 | struct mac_iop { | |
77 | __u8 ram_addr_hi; /* shared RAM address hi byte */ | |
78 | __u8 pad0; | |
79 | __u8 ram_addr_lo; /* shared RAM address lo byte */ | |
80 | __u8 pad1; | |
81 | __u8 status_ctrl; /* status/control register */ | |
82 | __u8 pad2[3]; | |
83 | __u8 ram_data; /* RAM data byte at ramhi/lo */ | |
84 | ||
85 | __u8 pad3[23]; | |
86 | ||
87 | /* Bypass-mode hardware access registers */ | |
88 | ||
89 | union { | |
90 | struct { /* SCC registers */ | |
91 | __u8 sccb_cmd; /* SCC B command reg */ | |
92 | __u8 pad4; | |
93 | __u8 scca_cmd; /* SCC A command reg */ | |
94 | __u8 pad5; | |
95 | __u8 sccb_data; /* SCC B data */ | |
96 | __u8 pad6; | |
97 | __u8 scca_data; /* SCC A data */ | |
98 | } scc_regs; | |
99 | ||
100 | struct { /* ISM registers */ | |
101 | __u8 wdata; /* write a data byte */ | |
102 | __u8 pad7; | |
103 | __u8 wmark; /* write a mark byte */ | |
104 | __u8 pad8; | |
105 | __u8 wcrc; /* write 2-byte crc to disk */ | |
106 | __u8 pad9; | |
107 | __u8 wparams; /* write the param regs */ | |
108 | __u8 pad10; | |
109 | __u8 wphase; /* write the phase states & dirs */ | |
110 | __u8 pad11; | |
111 | __u8 wsetup; /* write the setup register */ | |
112 | __u8 pad12; | |
113 | __u8 wzeroes; /* mode reg: 1's clr bits, 0's are x */ | |
114 | __u8 pad13; | |
115 | __u8 wones; /* mode reg: 1's set bits, 0's are x */ | |
116 | __u8 pad14; | |
117 | __u8 rdata; /* read a data byte */ | |
118 | __u8 pad15; | |
119 | __u8 rmark; /* read a mark byte */ | |
120 | __u8 pad16; | |
121 | __u8 rerror; /* read the error register */ | |
122 | __u8 pad17; | |
123 | __u8 rparams; /* read the param regs */ | |
124 | __u8 pad18; | |
125 | __u8 rphase; /* read the phase states & dirs */ | |
126 | __u8 pad19; | |
127 | __u8 rsetup; /* read the setup register */ | |
128 | __u8 pad20; | |
129 | __u8 rmode; /* read the mode register */ | |
130 | __u8 pad21; | |
131 | __u8 rhandshake; /* read the handshake register */ | |
132 | } ism_regs; | |
133 | } b; | |
134 | }; | |
135 | ||
136 | /* This structure is used to track IOP messages in the Linux kernel */ | |
137 | ||
138 | struct iop_msg { | |
139 | struct iop_msg *next; /* next message in queue or NULL */ | |
140 | uint iop_num; /* IOP number */ | |
141 | uint channel; /* channel number */ | |
142 | void *caller_priv; /* caller private data */ | |
143 | int status; /* status of this message */ | |
144 | __u8 message[IOP_MSG_LEN]; /* the message being sent/received */ | |
145 | __u8 reply[IOP_MSG_LEN]; /* the reply to the message */ | |
2850bc27 | 146 | void (*handler)(struct iop_msg *); |
1da177e4 LT |
147 | /* function to call when reply recvd */ |
148 | }; | |
149 | ||
150 | extern int iop_scc_present,iop_ism_present; | |
151 | ||
152 | extern int iop_listen(uint, uint, | |
2850bc27 | 153 | void (*handler)(struct iop_msg *), |
1da177e4 LT |
154 | const char *); |
155 | extern int iop_send_message(uint, uint, void *, uint, __u8 *, | |
2850bc27 | 156 | void (*)(struct iop_msg *)); |
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157 | extern void iop_complete_message(struct iop_msg *); |
158 | extern void iop_upload_code(uint, __u8 *, uint, __u16); | |
159 | extern void iop_download_code(uint, __u8 *, uint, __u16); | |
160 | extern __u8 *iop_compare_code(uint, __u8 *, uint, __u16); | |
161 | ||
162 | #endif /* __ASSEMBLY__ */ |