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1da177e4 LT |
1 | /* |
2 | * ip22-int.c: Routines for generic manipulation of the INT[23] ASIC | |
3 | * found on INDY and Indigo2 workstations. | |
4 | * | |
5 | * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) | |
6 | * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org) | |
7 | * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu) | |
8 | * - Indigo2 changes | |
9 | * - Interrupt handling fixes | |
10 | * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org) | |
11 | */ | |
1da177e4 LT |
12 | #include <linux/types.h> |
13 | #include <linux/init.h> | |
14 | #include <linux/kernel_stat.h> | |
1da177e4 | 15 | #include <linux/interrupt.h> |
1da177e4 | 16 | |
97dcb82d | 17 | #include <asm/irq_cpu.h> |
1da177e4 LT |
18 | #include <asm/sgi/hpc3.h> |
19 | #include <asm/sgi/ip22.h> | |
1da177e4 LT |
20 | |
21 | /* So far nothing hangs here */ | |
42a3b4f2 | 22 | #undef USE_LIO3_IRQ |
1da177e4 LT |
23 | |
24 | struct sgint_regs *sgint; | |
25 | ||
26 | static char lc0msk_to_irqnr[256]; | |
27 | static char lc1msk_to_irqnr[256]; | |
28 | static char lc2msk_to_irqnr[256]; | |
29 | static char lc3msk_to_irqnr[256]; | |
30 | ||
1da177e4 LT |
31 | extern int ip22_eisa_init(void); |
32 | ||
33 | static void enable_local0_irq(unsigned int irq) | |
34 | { | |
1da177e4 LT |
35 | /* don't allow mappable interrupt to be enabled from setup_irq, |
36 | * we have our own way to do so */ | |
37 | if (irq != SGI_MAP_0_IRQ) | |
38 | sgint->imask0 |= (1 << (irq - SGINT_LOCAL0)); | |
1da177e4 LT |
39 | } |
40 | ||
41 | static void disable_local0_irq(unsigned int irq) | |
42 | { | |
1da177e4 | 43 | sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0)); |
1da177e4 LT |
44 | } |
45 | ||
94dee171 | 46 | static struct irq_chip ip22_local0_irq_type = { |
70d21cde | 47 | .name = "IP22 local 0", |
1603b5ac AN |
48 | .ack = disable_local0_irq, |
49 | .mask = disable_local0_irq, | |
50 | .mask_ack = disable_local0_irq, | |
51 | .unmask = enable_local0_irq, | |
1da177e4 LT |
52 | }; |
53 | ||
54 | static void enable_local1_irq(unsigned int irq) | |
55 | { | |
1da177e4 LT |
56 | /* don't allow mappable interrupt to be enabled from setup_irq, |
57 | * we have our own way to do so */ | |
58 | if (irq != SGI_MAP_1_IRQ) | |
59 | sgint->imask1 |= (1 << (irq - SGINT_LOCAL1)); | |
1da177e4 LT |
60 | } |
61 | ||
14823ccb | 62 | static void disable_local1_irq(unsigned int irq) |
1da177e4 | 63 | { |
1da177e4 | 64 | sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1)); |
1da177e4 LT |
65 | } |
66 | ||
94dee171 | 67 | static struct irq_chip ip22_local1_irq_type = { |
70d21cde | 68 | .name = "IP22 local 1", |
1603b5ac AN |
69 | .ack = disable_local1_irq, |
70 | .mask = disable_local1_irq, | |
71 | .mask_ack = disable_local1_irq, | |
72 | .unmask = enable_local1_irq, | |
1da177e4 LT |
73 | }; |
74 | ||
75 | static void enable_local2_irq(unsigned int irq) | |
76 | { | |
1da177e4 LT |
77 | sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); |
78 | sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2)); | |
1da177e4 LT |
79 | } |
80 | ||
14823ccb | 81 | static void disable_local2_irq(unsigned int irq) |
1da177e4 | 82 | { |
1da177e4 LT |
83 | sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2)); |
84 | if (!sgint->cmeimask0) | |
85 | sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); | |
1da177e4 LT |
86 | } |
87 | ||
94dee171 | 88 | static struct irq_chip ip22_local2_irq_type = { |
70d21cde | 89 | .name = "IP22 local 2", |
1603b5ac AN |
90 | .ack = disable_local2_irq, |
91 | .mask = disable_local2_irq, | |
92 | .mask_ack = disable_local2_irq, | |
93 | .unmask = enable_local2_irq, | |
1da177e4 LT |
94 | }; |
95 | ||
96 | static void enable_local3_irq(unsigned int irq) | |
97 | { | |
1da177e4 LT |
98 | sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); |
99 | sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3)); | |
1da177e4 LT |
100 | } |
101 | ||
14823ccb | 102 | static void disable_local3_irq(unsigned int irq) |
1da177e4 | 103 | { |
1da177e4 LT |
104 | sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3)); |
105 | if (!sgint->cmeimask1) | |
106 | sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); | |
1da177e4 LT |
107 | } |
108 | ||
94dee171 | 109 | static struct irq_chip ip22_local3_irq_type = { |
70d21cde | 110 | .name = "IP22 local 3", |
1603b5ac AN |
111 | .ack = disable_local3_irq, |
112 | .mask = disable_local3_irq, | |
113 | .mask_ack = disable_local3_irq, | |
114 | .unmask = enable_local3_irq, | |
1da177e4 LT |
115 | }; |
116 | ||
937a8015 | 117 | static void indy_local0_irqdispatch(void) |
1da177e4 LT |
118 | { |
119 | u8 mask = sgint->istat0 & sgint->imask0; | |
120 | u8 mask2; | |
121 | int irq; | |
122 | ||
123 | if (mask & SGINT_ISTAT0_LIO2) { | |
124 | mask2 = sgint->vmeistat & sgint->cmeimask0; | |
125 | irq = lc2msk_to_irqnr[mask2]; | |
126 | } else | |
127 | irq = lc0msk_to_irqnr[mask]; | |
128 | ||
129 | /* if irq == 0, then the interrupt has already been cleared */ | |
130 | if (irq) | |
937a8015 | 131 | do_IRQ(irq); |
1da177e4 LT |
132 | } |
133 | ||
937a8015 | 134 | static void indy_local1_irqdispatch(void) |
1da177e4 LT |
135 | { |
136 | u8 mask = sgint->istat1 & sgint->imask1; | |
137 | u8 mask2; | |
138 | int irq; | |
139 | ||
140 | if (mask & SGINT_ISTAT1_LIO3) { | |
141 | mask2 = sgint->vmeistat & sgint->cmeimask1; | |
142 | irq = lc3msk_to_irqnr[mask2]; | |
143 | } else | |
144 | irq = lc1msk_to_irqnr[mask]; | |
145 | ||
146 | /* if irq == 0, then the interrupt has already been cleared */ | |
147 | if (irq) | |
937a8015 | 148 | do_IRQ(irq); |
1da177e4 LT |
149 | } |
150 | ||
937a8015 | 151 | extern void ip22_be_interrupt(int irq); |
1da177e4 | 152 | |
937a8015 | 153 | static void indy_buserror_irq(void) |
1da177e4 LT |
154 | { |
155 | int irq = SGI_BUSERR_IRQ; | |
156 | ||
157 | irq_enter(); | |
158 | kstat_this_cpu.irqs[irq]++; | |
937a8015 | 159 | ip22_be_interrupt(irq); |
1da177e4 LT |
160 | irq_exit(); |
161 | } | |
162 | ||
42a3b4f2 | 163 | static struct irqaction local0_cascade = { |
1da177e4 | 164 | .handler = no_action, |
f40298fd | 165 | .flags = IRQF_DISABLED, |
1da177e4 LT |
166 | .name = "local0 cascade", |
167 | }; | |
168 | ||
42a3b4f2 | 169 | static struct irqaction local1_cascade = { |
1da177e4 | 170 | .handler = no_action, |
f40298fd | 171 | .flags = IRQF_DISABLED, |
1da177e4 LT |
172 | .name = "local1 cascade", |
173 | }; | |
174 | ||
42a3b4f2 | 175 | static struct irqaction buserr = { |
1da177e4 | 176 | .handler = no_action, |
f40298fd | 177 | .flags = IRQF_DISABLED, |
1da177e4 LT |
178 | .name = "Bus Error", |
179 | }; | |
180 | ||
42a3b4f2 | 181 | static struct irqaction map0_cascade = { |
1da177e4 | 182 | .handler = no_action, |
f40298fd | 183 | .flags = IRQF_DISABLED, |
1da177e4 LT |
184 | .name = "mapable0 cascade", |
185 | }; | |
186 | ||
187 | #ifdef USE_LIO3_IRQ | |
42a3b4f2 | 188 | static struct irqaction map1_cascade = { |
1da177e4 | 189 | .handler = no_action, |
f40298fd | 190 | .flags = IRQF_DISABLED, |
1da177e4 LT |
191 | .name = "mapable1 cascade", |
192 | }; | |
193 | #define SGI_INTERRUPTS SGINT_END | |
194 | #else | |
195 | #define SGI_INTERRUPTS SGINT_LOCAL3 | |
196 | #endif | |
197 | ||
937a8015 | 198 | extern void indy_8254timer_irq(void); |
e4ac58af RB |
199 | |
200 | /* | |
201 | * IRQs on the INDY look basically (barring software IRQs which we don't use | |
202 | * at all) like: | |
203 | * | |
204 | * MIPS IRQ Source | |
205 | * -------- ------ | |
206 | * 0 Software (ignored) | |
207 | * 1 Software (ignored) | |
208 | * 2 Local IRQ level zero | |
209 | * 3 Local IRQ level one | |
210 | * 4 8254 Timer zero | |
211 | * 5 8254 Timer one | |
212 | * 6 Bus Error | |
213 | * 7 R4k timer (what we use) | |
214 | * | |
215 | * We handle the IRQ according to _our_ priority which is: | |
216 | * | |
217 | * Highest ---- R4k Timer | |
218 | * Local IRQ zero | |
219 | * Local IRQ one | |
220 | * Bus Error | |
221 | * 8254 Timer zero | |
222 | * Lowest ---- 8254 Timer one | |
223 | * | |
224 | * then we just return, if multiple IRQs are pending then we will just take | |
225 | * another exception, big deal. | |
226 | */ | |
227 | ||
937a8015 | 228 | asmlinkage void plat_irq_dispatch(void) |
e4ac58af | 229 | { |
119537c0 | 230 | unsigned int pending = read_c0_status() & read_c0_cause(); |
e4ac58af RB |
231 | |
232 | /* | |
233 | * First we check for r4k counter/timer IRQ. | |
234 | */ | |
235 | if (pending & CAUSEF_IP7) | |
7bcf7717 | 236 | do_IRQ(SGI_TIMER_IRQ); |
e4ac58af | 237 | else if (pending & CAUSEF_IP2) |
937a8015 | 238 | indy_local0_irqdispatch(); |
e4ac58af | 239 | else if (pending & CAUSEF_IP3) |
937a8015 | 240 | indy_local1_irqdispatch(); |
e4ac58af | 241 | else if (pending & CAUSEF_IP6) |
937a8015 | 242 | indy_buserror_irq(); |
e4ac58af | 243 | else if (pending & (CAUSEF_IP4 | CAUSEF_IP5)) |
937a8015 | 244 | indy_8254timer_irq(); |
e4ac58af RB |
245 | } |
246 | ||
1da177e4 LT |
247 | void __init arch_init_irq(void) |
248 | { | |
249 | int i; | |
250 | ||
251 | /* Init local mask --> irq tables. */ | |
252 | for (i = 0; i < 256; i++) { | |
253 | if (i & 0x80) { | |
254 | lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7; | |
255 | lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7; | |
256 | lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7; | |
257 | lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7; | |
258 | } else if (i & 0x40) { | |
259 | lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6; | |
260 | lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6; | |
261 | lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6; | |
262 | lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6; | |
263 | } else if (i & 0x20) { | |
264 | lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5; | |
265 | lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5; | |
266 | lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5; | |
267 | lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5; | |
268 | } else if (i & 0x10) { | |
269 | lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4; | |
270 | lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4; | |
271 | lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4; | |
272 | lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4; | |
273 | } else if (i & 0x08) { | |
274 | lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3; | |
275 | lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3; | |
276 | lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3; | |
277 | lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3; | |
278 | } else if (i & 0x04) { | |
279 | lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2; | |
280 | lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2; | |
281 | lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2; | |
282 | lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2; | |
283 | } else if (i & 0x02) { | |
284 | lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1; | |
285 | lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1; | |
286 | lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1; | |
287 | lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1; | |
288 | } else if (i & 0x01) { | |
289 | lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0; | |
290 | lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0; | |
291 | lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0; | |
292 | lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0; | |
293 | } else { | |
294 | lc0msk_to_irqnr[i] = 0; | |
295 | lc1msk_to_irqnr[i] = 0; | |
296 | lc2msk_to_irqnr[i] = 0; | |
297 | lc3msk_to_irqnr[i] = 0; | |
298 | } | |
299 | } | |
300 | ||
301 | /* Mask out all interrupts. */ | |
302 | sgint->imask0 = 0; | |
303 | sgint->imask1 = 0; | |
304 | sgint->cmeimask0 = 0; | |
305 | sgint->cmeimask1 = 0; | |
306 | ||
1da177e4 | 307 | /* init CPU irqs */ |
97dcb82d | 308 | mips_cpu_irq_init(); |
1da177e4 LT |
309 | |
310 | for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) { | |
94dee171 | 311 | struct irq_chip *handler; |
1da177e4 LT |
312 | |
313 | if (i < SGINT_LOCAL1) | |
314 | handler = &ip22_local0_irq_type; | |
315 | else if (i < SGINT_LOCAL2) | |
316 | handler = &ip22_local1_irq_type; | |
317 | else if (i < SGINT_LOCAL3) | |
318 | handler = &ip22_local2_irq_type; | |
319 | else | |
320 | handler = &ip22_local3_irq_type; | |
321 | ||
1417836e | 322 | set_irq_chip_and_handler(i, handler, handle_level_irq); |
1da177e4 LT |
323 | } |
324 | ||
325 | /* vector handler. this register the IRQ as non-sharable */ | |
326 | setup_irq(SGI_LOCAL_0_IRQ, &local0_cascade); | |
327 | setup_irq(SGI_LOCAL_1_IRQ, &local1_cascade); | |
328 | setup_irq(SGI_BUSERR_IRQ, &buserr); | |
329 | ||
330 | /* cascade in cascade. i love Indy ;-) */ | |
331 | setup_irq(SGI_MAP_0_IRQ, &map0_cascade); | |
332 | #ifdef USE_LIO3_IRQ | |
333 | setup_irq(SGI_MAP_1_IRQ, &map1_cascade); | |
334 | #endif | |
335 | ||
336 | #ifdef CONFIG_EISA | |
337 | if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */ | |
14823ccb | 338 | ip22_eisa_init(); |
1da177e4 LT |
339 | #endif |
340 | } |