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Merge branch 'linux-2.6'
[linux-2.6] / arch / arm / common / sa1111.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/arch/arm/mach-sa1100/sa1111.c
3 *
4 * SA1111 support
5 *
6 * Original code by John Dorsey
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This file contains all generic SA1111 support.
13 *
14 * All initialization functions provided here are intended to be called
15 * from machine specific code with proper arguments when required.
16 */
1da177e4
LT		 17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
21#include <linux/ptrace.h>
22#include <linux/errno.h>
23#include <linux/ioport.h>
d052d1be 24#include <linux/platform_device.h>
1da177e4
LT		 25#include <linux/slab.h>
26#include <linux/spinlock.h>
27#include <linux/dma-mapping.h>
97d654f8 28#include <linux/clk.h>
1da177e4
LT		 29
30#include <asm/hardware.h>
31#include <asm/mach-types.h>
32#include <asm/io.h>
33#include <asm/irq.h>
34#include <asm/mach/irq.h>
45e109d0 35#include <asm/sizes.h>
1da177e4
LT		 36
37#include <asm/hardware/sa1111.h>
38
1da177e4
LT		 39extern void __init sa1110_mb_enable(void);
40
41/*
42 * We keep the following data for the overall SA1111. Note that the
43 * struct device and struct resource are "fake"; they should be supplied
44 * by the bus above us. However, in the interests of getting all SA1111
45 * drivers converted over to the device model, we provide this as an
46 * anchor point for all the other drivers.
47 */
48struct sa1111 {
49 struct device *dev;
97d654f8 50 struct clk *clk;
1da177e4
LT		 51 unsigned long phys;
52 int irq;
53 spinlock_t lock;
54 void __iomem *base;
55};
56
57/*
58 * We _really_ need to eliminate this. Its only users
59 * are the PWM and DMA checking code.
60 */
61static struct sa1111 *g_sa1111;
62
63struct sa1111_dev_info {
64 unsigned long offset;
65 unsigned long skpcr_mask;
66 unsigned int devid;
67 unsigned int irq[6];
68};
69
70static struct sa1111_dev_info sa1111_devices[] = {
71 {
72 .offset = SA1111_USB,
73 .skpcr_mask = SKPCR_UCLKEN,
74 .devid = SA1111_DEVID_USB,
75 .irq = {
76 IRQ_USBPWR,
77 IRQ_HCIM,
78 IRQ_HCIBUFFACC,
79 IRQ_HCIRMTWKP,
80 IRQ_NHCIMFCIR,
81 IRQ_USB_PORT_RESUME
82 },
83 },
84 {
85 .offset = 0x0600,
86 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
87 .devid = SA1111_DEVID_SAC,
88 .irq = {
89 AUDXMTDMADONEA,
90 AUDXMTDMADONEB,
91 AUDRCVDMADONEA,
92 AUDRCVDMADONEB
93 },
94 },
95 {
96 .offset = 0x0800,
97 .skpcr_mask = SKPCR_SCLKEN,
98 .devid = SA1111_DEVID_SSP,
99 },
100 {
101 .offset = SA1111_KBD,
102 .skpcr_mask = SKPCR_PTCLKEN,
103 .devid = SA1111_DEVID_PS2,
104 .irq = {
105 IRQ_TPRXINT,
106 IRQ_TPTXINT
107 },
108 },
109 {
110 .offset = SA1111_MSE,
111 .skpcr_mask = SKPCR_PMCLKEN,
112 .devid = SA1111_DEVID_PS2,
113 .irq = {
114 IRQ_MSRXINT,
115 IRQ_MSTXINT
116 },
117 },
118 {
119 .offset = 0x1800,
120 .skpcr_mask = 0,
121 .devid = SA1111_DEVID_PCMCIA,
122 .irq = {
123 IRQ_S0_READY_NINT,
124 IRQ_S0_CD_VALID,
125 IRQ_S0_BVD1_STSCHG,
126 IRQ_S1_READY_NINT,
127 IRQ_S1_CD_VALID,
128 IRQ_S1_BVD1_STSCHG,
129 },
130 },
131};
132
1b12050f
RK		 133void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes)
134{
135 unsigned int sz = SZ_1M >> PAGE_SHIFT;
136
137 if (node != 0)
138 sz = 0;
139
140 size[1] = size[0] - sz;
141 size[0] = sz;
142}
143
1da177e4
LT		 144/*
145 * SA1111 interrupt support. Since clearing an IRQ while there are
146 * active IRQs causes the interrupt output to pulse, the upper levels
147 * will call us again if there are more interrupts to process.
148 */
149static void
150sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
151{
152 unsigned int stat0, stat1, i;
c4bfa28a 153 void __iomem *base = get_irq_data(irq);
1da177e4
LT		 154
155 stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
156 stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
157
158 sa1111_writel(stat0, base + SA1111_INTSTATCLR0);
159
160 desc->chip->ack(irq);
161
162 sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
163
164 if (stat0 == 0 && stat1 == 0) {
165 do_bad_IRQ(irq, desc, regs);
166 return;
167 }
168
169 for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
170 if (stat0 & 1)
c4bfa28a 171 handle_edge_irq(i, irq_desc + i, regs);
1da177e4
LT		 172
173 for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
174 if (stat1 & 1)
c4bfa28a 175 handle_edge_irq(i, irq_desc + i, regs);
1da177e4
LT		 176
177 /* For level-based interrupts */
178 desc->chip->unmask(irq);
179}
180
181#define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START))
182#define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32))
183
184static void sa1111_ack_irq(unsigned int irq)
185{
186}
187
188static void sa1111_mask_lowirq(unsigned int irq)
189{
190 void __iomem *mapbase = get_irq_chipdata(irq);
191 unsigned long ie0;
192
193 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
194 ie0 &= ~SA1111_IRQMASK_LO(irq);
195 writel(ie0, mapbase + SA1111_INTEN0);
196}
197
198static void sa1111_unmask_lowirq(unsigned int irq)
199{
200 void __iomem *mapbase = get_irq_chipdata(irq);
201 unsigned long ie0;
202
203 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
204 ie0 |= SA1111_IRQMASK_LO(irq);
205 sa1111_writel(ie0, mapbase + SA1111_INTEN0);
206}
207
208/*
209 * Attempt to re-trigger the interrupt. The SA1111 contains a register
210 * (INTSET) which claims to do this. However, in practice no amount of
211 * manipulation of INTEN and INTSET guarantees that the interrupt will
212 * be triggered. In fact, its very difficult, if not impossible to get
213 * INTSET to re-trigger the interrupt.
214 */
215static int sa1111_retrigger_lowirq(unsigned int irq)
216{
217 unsigned int mask = SA1111_IRQMASK_LO(irq);
218 void __iomem *mapbase = get_irq_chipdata(irq);
219 unsigned long ip0;
220 int i;
221
222 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
223 for (i = 0; i < 8; i++) {
224 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
225 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
226 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
227 break;
228 }
229
230 if (i == 8)
231 printk(KERN_ERR "Danger Will Robinson: failed to "
232 "re-trigger IRQ%d\n", irq);
233 return i == 8 ? -1 : 0;
234}
235
236static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
237{
238 unsigned int mask = SA1111_IRQMASK_LO(irq);
239 void __iomem *mapbase = get_irq_chipdata(irq);
240 unsigned long ip0;
241
242 if (flags == IRQT_PROBE)
243 return 0;
244
245 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
246 return -EINVAL;
247
248 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
249 if (flags & __IRQT_RISEDGE)
250 ip0 &= ~mask;
251 else
252 ip0 |= mask;
253 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
254 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
255
256 return 0;
257}
258
259static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
260{
261 unsigned int mask = SA1111_IRQMASK_LO(irq);
262 void __iomem *mapbase = get_irq_chipdata(irq);
263 unsigned long we0;
264
265 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
266 if (on)
267 we0 |= mask;
268 else
269 we0 &= ~mask;
270 sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
271
272 return 0;
273}
274
38c677cb
DB		 275static struct irq_chip sa1111_low_chip = {
276 .name = "SA1111-l",
1da177e4
LT		 277 .ack = sa1111_ack_irq,
278 .mask = sa1111_mask_lowirq,
279 .unmask = sa1111_unmask_lowirq,
280 .retrigger = sa1111_retrigger_lowirq,
7801907b
RK		 281 .set_type = sa1111_type_lowirq,
282 .set_wake = sa1111_wake_lowirq,
1da177e4
LT		 283};
284
285static void sa1111_mask_highirq(unsigned int irq)
286{
287 void __iomem *mapbase = get_irq_chipdata(irq);
288 unsigned long ie1;
289
290 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
291 ie1 &= ~SA1111_IRQMASK_HI(irq);
292 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
293}
294
295static void sa1111_unmask_highirq(unsigned int irq)
296{
297 void __iomem *mapbase = get_irq_chipdata(irq);
298 unsigned long ie1;
299
300 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
301 ie1 |= SA1111_IRQMASK_HI(irq);
302 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
303}
304
305/*
306 * Attempt to re-trigger the interrupt. The SA1111 contains a register
307 * (INTSET) which claims to do this. However, in practice no amount of
308 * manipulation of INTEN and INTSET guarantees that the interrupt will
309 * be triggered. In fact, its very difficult, if not impossible to get
310 * INTSET to re-trigger the interrupt.
311 */
312static int sa1111_retrigger_highirq(unsigned int irq)
313{
314 unsigned int mask = SA1111_IRQMASK_HI(irq);
315 void __iomem *mapbase = get_irq_chipdata(irq);
316 unsigned long ip1;
317 int i;
318
319 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
320 for (i = 0; i < 8; i++) {
321 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
322 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
323 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
324 break;
325 }
326
327 if (i == 8)
328 printk(KERN_ERR "Danger Will Robinson: failed to "
329 "re-trigger IRQ%d\n", irq);
330 return i == 8 ? -1 : 0;
331}
332
333static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
334{
335 unsigned int mask = SA1111_IRQMASK_HI(irq);
336 void __iomem *mapbase = get_irq_chipdata(irq);
337 unsigned long ip1;
338
339 if (flags == IRQT_PROBE)
340 return 0;
341
342 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
343 return -EINVAL;
344
345 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
346 if (flags & __IRQT_RISEDGE)
347 ip1 &= ~mask;
348 else
349 ip1 |= mask;
350 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
351 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
352
353 return 0;
354}
355
356static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
357{
358 unsigned int mask = SA1111_IRQMASK_HI(irq);
359 void __iomem *mapbase = get_irq_chipdata(irq);
360 unsigned long we1;
361
362 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
363 if (on)
364 we1 |= mask;
365 else
366 we1 &= ~mask;
367 sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
368
369 return 0;
370}
371
38c677cb
DB		 372static struct irq_chip sa1111_high_chip = {
373 .name = "SA1111-h",
1da177e4
LT		 374 .ack = sa1111_ack_irq,
375 .mask = sa1111_mask_highirq,
376 .unmask = sa1111_unmask_highirq,
377 .retrigger = sa1111_retrigger_highirq,
7801907b
RK		 378 .set_type = sa1111_type_highirq,
379 .set_wake = sa1111_wake_highirq,
1da177e4
LT		 380};
381
382static void sa1111_setup_irq(struct sa1111 *sachip)
383{
384 void __iomem *irqbase = sachip->base + SA1111_INTC;
385 unsigned int irq;
386
387 /*
388 * We're guaranteed that this region hasn't been taken.
389 */
390 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
391
392 /* disable all IRQs */
393 sa1111_writel(0, irqbase + SA1111_INTEN0);
394 sa1111_writel(0, irqbase + SA1111_INTEN1);
395 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
396 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
397
398 /*
399 * detect on rising edge. Note: Feb 2001 Errata for SA1111
400 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
401 */
402 sa1111_writel(0, irqbase + SA1111_INTPOL0);
403 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
404 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
405 irqbase + SA1111_INTPOL1);
406
407 /* clear all IRQs */
408 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
409 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
410
411 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
412 set_irq_chip(irq, &sa1111_low_chip);
413 set_irq_chipdata(irq, irqbase);
414 set_irq_handler(irq, do_edge_IRQ);
415 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
416 }
417
418 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
419 set_irq_chip(irq, &sa1111_high_chip);
420 set_irq_chipdata(irq, irqbase);
421 set_irq_handler(irq, do_edge_IRQ);
422 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
423 }
424
425 /*
426 * Register SA1111 interrupt
427 */
428 set_irq_type(sachip->irq, IRQT_RISING);
429 set_irq_data(sachip->irq, irqbase);
430 set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
431}
432
433/*
434 * Bring the SA1111 out of reset. This requires a set procedure:
435 * 1. nRESET asserted (by hardware)
436 * 2. CLK turned on from SA1110
437 * 3. nRESET deasserted
438 * 4. VCO turned on, PLL_BYPASS turned off
439 * 5. Wait lock time, then assert RCLKEn
440 * 7. PCR set to allow clocking of individual functions
441 *
442 * Until we've done this, the only registers we can access are:
443 * SBI_SKCR
444 * SBI_SMCR
445 * SBI_SKID
446 */
447static void sa1111_wake(struct sa1111 *sachip)
448{
449 unsigned long flags, r;
450
451 spin_lock_irqsave(&sachip->lock, flags);
452
97d654f8 453 clk_enable(sachip->clk);
1da177e4
LT		 454
455 /*
456 * Turn VCO on, and disable PLL Bypass.
457 */
458 r = sa1111_readl(sachip->base + SA1111_SKCR);
459 r &= ~SKCR_VCO_OFF;
460 sa1111_writel(r, sachip->base + SA1111_SKCR);
461 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
462 sa1111_writel(r, sachip->base + SA1111_SKCR);
463
464 /*
465 * Wait lock time. SA1111 manual _doesn't_
466 * specify a figure for this! We choose 100us.
467 */
468 udelay(100);
469
470 /*
471 * Enable RCLK. We also ensure that RDYEN is set.
472 */
473 r |= SKCR_RCLKEN | SKCR_RDYEN;
474 sa1111_writel(r, sachip->base + SA1111_SKCR);
475
476 /*
477 * Wait 14 RCLK cycles for the chip to finish coming out
478 * of reset. (RCLK=24MHz). This is 590ns.
479 */
480 udelay(1);
481
482 /*
483 * Ensure all clocks are initially off.
484 */
485 sa1111_writel(0, sachip->base + SA1111_SKPCR);
486
487 spin_unlock_irqrestore(&sachip->lock, flags);
488}
489
490#ifdef CONFIG_ARCH_SA1100
491
492static u32 sa1111_dma_mask[] = {
493 ~0,
494 ~(1 << 20),
495 ~(1 << 23),
496 ~(1 << 24),
497 ~(1 << 25),
498 ~(1 << 20),
499 ~(1 << 20),
500 0,
501};
502
503/*
504 * Configure the SA1111 shared memory controller.
505 */
506void
507sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
508 unsigned int cas_latency)
509{
510 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
511
512 if (cas_latency == 3)
513 smcr |= SMCR_CLAT;
514
515 sa1111_writel(smcr, sachip->base + SA1111_SMCR);
516
517 /*
518 * Now clear the bits in the DMA mask to work around the SA1111
519 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
520 * Chip Specification Update, June 2000, Erratum #7).
521 */
522 if (sachip->dev->dma_mask)
523 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
524
525 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
526}
527
528#endif
529
530static void sa1111_dev_release(struct device *_dev)
531{
532 struct sa1111_dev *dev = SA1111_DEV(_dev);
533
534 release_resource(&dev->res);
535 kfree(dev);
536}
537
538static int
539sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
540 struct sa1111_dev_info *info)
541{
542 struct sa1111_dev *dev;
543 int ret;
544
d2a02b93 545 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
1da177e4
LT		 546 if (!dev) {
547 ret = -ENOMEM;
548 goto out;
549 }
1da177e4
LT		 550
551 snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id),
552 "%4.4lx", info->offset);
553
554 dev->devid = info->devid;
555 dev->dev.parent = sachip->dev;
556 dev->dev.bus = &sa1111_bus_type;
557 dev->dev.release = sa1111_dev_release;
558 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
559 dev->res.start = sachip->phys + info->offset;
560 dev->res.end = dev->res.start + 511;
561 dev->res.name = dev->dev.bus_id;
562 dev->res.flags = IORESOURCE_MEM;
563 dev->mapbase = sachip->base + info->offset;
564 dev->skpcr_mask = info->skpcr_mask;
565 memmove(dev->irq, info->irq, sizeof(dev->irq));
566
567 ret = request_resource(parent, &dev->res);
568 if (ret) {
569 printk("SA1111: failed to allocate resource for %s\n",
570 dev->res.name);
571 kfree(dev);
572 goto out;
573 }
574
575
576 ret = device_register(&dev->dev);
577 if (ret) {
578 release_resource(&dev->res);
579 kfree(dev);
580 goto out;
581 }
582
583 /*
584 * If the parent device has a DMA mask associated with it,
585 * propagate it down to the children.
586 */
587 if (sachip->dev->dma_mask) {
588 dev->dma_mask = *sachip->dev->dma_mask;
589 dev->dev.dma_mask = &dev->dma_mask;
590
591 if (dev->dma_mask != 0xffffffffUL) {
592 ret = dmabounce_register_dev(&dev->dev, 1024, 4096);
593 if (ret) {
594 printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id);
595 device_unregister(&dev->dev);
596 }
597 }
598 }
599
600out:
601 return ret;
602}
603
604/**
605 * sa1111_probe - probe for a single SA1111 chip.
606 * @phys_addr: physical address of device.
607 *
608 * Probe for a SA1111 chip. This must be called
609 * before any other SA1111-specific code.
610 *
611 * Returns:
612 * %-ENODEV device not found.
613 * %-EBUSY physical address already marked in-use.
614 * %0 successful.
615 */
616static int
617__sa1111_probe(struct device *me, struct resource *mem, int irq)
618{
619 struct sa1111 *sachip;
620 unsigned long id;
416112f8 621 unsigned int has_devs;
1da177e4
LT		 622 int i, ret = -ENODEV;
623
d2a02b93 624 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
1da177e4
LT		 625 if (!sachip)
626 return -ENOMEM;
627
97d654f8
RK		 628 sachip->clk = clk_get(me, "GPIO27_CLK");
629 if (!sachip->clk) {
630 ret = PTR_ERR(sachip->clk);
631 goto err_free;
632 }
633
1da177e4
LT		 634 spin_lock_init(&sachip->lock);
635
636 sachip->dev = me;
637 dev_set_drvdata(sachip->dev, sachip);
638
639 sachip->phys = mem->start;
640 sachip->irq = irq;
641
642 /*
643 * Map the whole region. This also maps the
644 * registers for our children.
645 */
646 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
647 if (!sachip->base) {
648 ret = -ENOMEM;
97d654f8 649 goto err_clkput;
1da177e4
LT		 650 }
651
652 /*
653 * Probe for the chip. Only touch the SBI registers.
654 */
655 id = sa1111_readl(sachip->base + SA1111_SKID);
656 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
657 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
658 ret = -ENODEV;
97d654f8 659 goto err_unmap;
1da177e4
LT		 660 }
661
662 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
663 "silicon revision %lx, metal revision %lx\n",
664 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
665
666 /*
667 * We found it. Wake the chip up, and initialise.
668 */
669 sa1111_wake(sachip);
670
671#ifdef CONFIG_ARCH_SA1100
416112f8
DB		 672 {
673 unsigned int val;
674
1da177e4
LT		 675 /*
676 * The SDRAM configuration of the SA1110 and the SA1111 must
677 * match. This is very important to ensure that SA1111 accesses
678 * don't corrupt the SDRAM. Note that this ungates the SA1111's
679 * MBGNT signal, so we must have called sa1110_mb_disable()
680 * beforehand.
681 */
682 sa1111_configure_smc(sachip, 1,
683 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
684 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
685
686 /*
687 * We only need to turn on DCLK whenever we want to use the
688 * DMA. It can otherwise be held firmly in the off position.
689 * (currently, we always enable it.)
690 */
691 val = sa1111_readl(sachip->base + SA1111_SKPCR);
692 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
693
694 /*
695 * Enable the SA1110 memory bus request and grant signals.
696 */
697 sa1110_mb_enable();
416112f8 698 }
1da177e4
LT		 699#endif
700
701 /*
702 * The interrupt controller must be initialised before any
703 * other device to ensure that the interrupts are available.
704 */
705 if (sachip->irq != NO_IRQ)
706 sa1111_setup_irq(sachip);
707
708 g_sa1111 = sachip;
709
710 has_devs = ~0;
711 if (machine_is_assabet() || machine_is_jornada720() ||
712 machine_is_badge4())
713 has_devs &= ~(1 << 4);
714 else
715 has_devs &= ~(1 << 1);
716
717 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
718 if (has_devs & (1 << i))
719 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
720
721 return 0;
722
97d654f8 723 err_unmap:
1da177e4 724 iounmap(sachip->base);
97d654f8
RK		 725 err_clkput:
726 clk_put(sachip->clk);
727 err_free:
1da177e4
LT		 728 kfree(sachip);
729 return ret;
730}
731
522c37b9
RK		 732static int sa1111_remove_one(struct device *dev, void *data)
733{
734 device_unregister(dev);
735 return 0;
736}
737
1da177e4
LT		 738static void __sa1111_remove(struct sa1111 *sachip)
739{
1da177e4
LT		 740 void __iomem *irqbase = sachip->base + SA1111_INTC;
741
522c37b9 742 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
1da177e4
LT		 743
744 /* disable all IRQs */
745 sa1111_writel(0, irqbase + SA1111_INTEN0);
746 sa1111_writel(0, irqbase + SA1111_INTEN1);
747 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
748 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
749
97d654f8
RK		 750 clk_disable(sachip->clk);
751
1da177e4
LT		 752 if (sachip->irq != NO_IRQ) {
753 set_irq_chained_handler(sachip->irq, NULL);
754 set_irq_data(sachip->irq, NULL);
755
756 release_mem_region(sachip->phys + SA1111_INTC, 512);
757 }
758
759 iounmap(sachip->base);
97d654f8 760 clk_put(sachip->clk);
1da177e4
LT		 761 kfree(sachip);
762}
763
764/*
765 * According to the "Intel StrongARM SA-1111 Microprocessor Companion
766 * Chip Specification Update" (June 2000), erratum #7, there is a
767 * significant bug in the SA1111 SDRAM shared memory controller. If
768 * an access to a region of memory above 1MB relative to the bank base,
769 * it is important that address bit 10 _NOT_ be asserted. Depending
770 * on the configuration of the RAM, bit 10 may correspond to one
771 * of several different (processor-relative) address bits.
772 *
773 * This routine only identifies whether or not a given DMA address
774 * is susceptible to the bug.
775 *
776 * This should only get called for sa1111_device types due to the
777 * way we configure our device dma_masks.
778 */
779int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
780{
781 /*
782 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
783 * User's Guide" mentions that jumpers R51 and R52 control the
784 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
785 * SDRAM bank 1 on Neponset). The default configuration selects
786 * Assabet, so any address in bank 1 is necessarily invalid.
787 */
788 return ((machine_is_assabet() || machine_is_pfs168()) &&
789 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000));
790}
791
792struct sa1111_save_data {
793 unsigned int skcr;
794 unsigned int skpcr;
795 unsigned int skcdr;
796 unsigned char skaud;
797 unsigned char skpwm0;
798 unsigned char skpwm1;
799
800 /*
801 * Interrupt controller
802 */
803 unsigned int intpol0;
804 unsigned int intpol1;
805 unsigned int inten0;
806 unsigned int inten1;
807 unsigned int wakepol0;
808 unsigned int wakepol1;
809 unsigned int wakeen0;
810 unsigned int wakeen1;
811};
812
813#ifdef CONFIG_PM
814
3ae5eaec 815static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 816{
3ae5eaec 817 struct sa1111 *sachip = platform_get_drvdata(dev);
1da177e4
LT		 818 struct sa1111_save_data *save;
819 unsigned long flags;
820 unsigned int val;
821 void __iomem *base;
822
1da177e4
LT		 823 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
824 if (!save)
825 return -ENOMEM;
3ae5eaec 826 dev->dev.power.saved_state = save;
1da177e4
LT		 827
828 spin_lock_irqsave(&sachip->lock, flags);
829
830 /*
831 * Save state.
832 */
833 base = sachip->base;
834 save->skcr = sa1111_readl(base + SA1111_SKCR);
835 save->skpcr = sa1111_readl(base + SA1111_SKPCR);
836 save->skcdr = sa1111_readl(base + SA1111_SKCDR);
837 save->skaud = sa1111_readl(base + SA1111_SKAUD);
838 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
839 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
840
841 base = sachip->base + SA1111_INTC;
842 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
843 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
844 save->inten0 = sa1111_readl(base + SA1111_INTEN0);
845 save->inten1 = sa1111_readl(base + SA1111_INTEN1);
846 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
847 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
848 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
849 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
850
851 /*
852 * Disable.
853 */
854 val = sa1111_readl(sachip->base + SA1111_SKCR);
855 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
856 sa1111_writel(0, sachip->base + SA1111_SKPWM0);
857 sa1111_writel(0, sachip->base + SA1111_SKPWM1);
858
97d654f8
RK		 859 clk_disable(sachip->clk);
860
1da177e4
LT		 861 spin_unlock_irqrestore(&sachip->lock, flags);
862
863 return 0;
864}
865
866/*
867 * sa1111_resume - Restore the SA1111 device state.
868 * @dev: device to restore
1da177e4
LT		 869 *
870 * Restore the general state of the SA1111; clock control and
871 * interrupt controller. Other parts of the SA1111 must be
872 * restored by their respective drivers, and must be called
873 * via LDM after this function.
874 */
3ae5eaec 875static int sa1111_resume(struct platform_device *dev)
1da177e4 876{
3ae5eaec 877 struct sa1111 *sachip = platform_get_drvdata(dev);
1da177e4
LT		 878 struct sa1111_save_data *save;
879 unsigned long flags, id;
880 void __iomem *base;
881
3ae5eaec 882 save = (struct sa1111_save_data *)dev->dev.power.saved_state;
1da177e4
LT		 883 if (!save)
884 return 0;
885
886 spin_lock_irqsave(&sachip->lock, flags);
887
888 /*
889 * Ensure that the SA1111 is still here.
890 * FIXME: shouldn't do this here.
891 */
892 id = sa1111_readl(sachip->base + SA1111_SKID);
893 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
894 __sa1111_remove(sachip);
3ae5eaec 895 platform_set_drvdata(dev, NULL);
1da177e4
LT		 896 kfree(save);
897 return 0;
898 }
899
900 /*
901 * First of all, wake up the chip.
902 */
903 sa1111_wake(sachip);
904 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
905 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
906
907 base = sachip->base;
908 sa1111_writel(save->skcr, base + SA1111_SKCR);
909 sa1111_writel(save->skpcr, base + SA1111_SKPCR);
910 sa1111_writel(save->skcdr, base + SA1111_SKCDR);
911 sa1111_writel(save->skaud, base + SA1111_SKAUD);
912 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
913 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
914
915 base = sachip->base + SA1111_INTC;
916 sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
917 sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
918 sa1111_writel(save->inten0, base + SA1111_INTEN0);
919 sa1111_writel(save->inten1, base + SA1111_INTEN1);
920 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
921 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
922 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
923 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
924
925 spin_unlock_irqrestore(&sachip->lock, flags);
926
3ae5eaec 927 dev->dev.power.saved_state = NULL;
1da177e4
LT		 928 kfree(save);
929
930 return 0;
931}
932
933#else
934#define sa1111_suspend NULL
935#define sa1111_resume NULL
936#endif
937
3ae5eaec 938static int sa1111_probe(struct platform_device *pdev)
1da177e4 939{
1da177e4
LT		 940 struct resource *mem;
941 int irq;
942
943 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
944 if (!mem)
945 return -EINVAL;
946 irq = platform_get_irq(pdev, 0);
48944738
DV		 947 if (irq < 0)
948 return -ENXIO;
1da177e4 949
3ae5eaec 950 return __sa1111_probe(&pdev->dev, mem, irq);
1da177e4
LT		 951}
952
3ae5eaec 953static int sa1111_remove(struct platform_device *pdev)
1da177e4 954{
3ae5eaec 955 struct sa1111 *sachip = platform_get_drvdata(pdev);
1da177e4
LT		 956
957 if (sachip) {
958 __sa1111_remove(sachip);
3ae5eaec 959 platform_set_drvdata(pdev, NULL);
1da177e4
LT		 960
961#ifdef CONFIG_PM
3ae5eaec
RK		 962 kfree(pdev->dev.power.saved_state);
963 pdev->dev.power.saved_state = NULL;
1da177e4
LT		 964#endif
965 }
966
967 return 0;
968}
969
970/*
971 * Not sure if this should be on the system bus or not yet.
972 * We really want some way to register a system device at
973 * the per-machine level, and then have this driver pick
974 * up the registered devices.
975 *
976 * We also need to handle the SDRAM configuration for
977 * PXA250/SA1110 machine classes.
978 */
3ae5eaec 979static struct platform_driver sa1111_device_driver = {
1da177e4
LT		 980 .probe = sa1111_probe,
981 .remove = sa1111_remove,
982 .suspend = sa1111_suspend,
983 .resume = sa1111_resume,
3ae5eaec
RK		 984 .driver = {
985 .name = "sa1111",
986 },
1da177e4
LT		 987};
988
989/*
990 * Get the parent device driver (us) structure
991 * from a child function device
992 */
993static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
994{
995 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
996}
997
998/*
999 * The bits in the opdiv field are non-linear.
1000 */
1001static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1002
1003static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1004{
1005 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1006
1007 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
1008
1009 fbdiv = (skcdr & 0x007f) + 2;
1010 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1011 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1012
1013 return 3686400 * fbdiv / (ipdiv * opdiv);
1014}
1015
1016/**
1017 * sa1111_pll_clock - return the current PLL clock frequency.
1018 * @sadev: SA1111 function block
1019 *
1020 * BUG: we should look at SKCR. We also blindly believe that
1021 * the chip is being fed with the 3.6864MHz clock.
1022 *
1023 * Returns the PLL clock in Hz.
1024 */
1025unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1026{
1027 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1028
1029 return __sa1111_pll_clock(sachip);
1030}
1031
1032/**
1033 * sa1111_select_audio_mode - select I2S or AC link mode
1034 * @sadev: SA1111 function block
1035 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1036 *
1037 * Frob the SKCR to select AC Link mode or I2S mode for
1038 * the audio block.
1039 */
1040void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1041{
1042 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1043 unsigned long flags;
1044 unsigned int val;
1045
1046 spin_lock_irqsave(&sachip->lock, flags);
1047
1048 val = sa1111_readl(sachip->base + SA1111_SKCR);
1049 if (mode == SA1111_AUDIO_I2S) {
1050 val &= ~SKCR_SELAC;
1051 } else {
1052 val |= SKCR_SELAC;
1053 }
1054 sa1111_writel(val, sachip->base + SA1111_SKCR);
1055
1056 spin_unlock_irqrestore(&sachip->lock, flags);
1057}
1058
1059/**
1060 * sa1111_set_audio_rate - set the audio sample rate
1061 * @sadev: SA1111 SAC function block
1062 * @rate: sample rate to select
1063 */
1064int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1065{
1066 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1067 unsigned int div;
1068
1069 if (sadev->devid != SA1111_DEVID_SAC)
1070 return -EINVAL;
1071
1072 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1073 if (div == 0)
1074 div = 1;
1075 if (div > 128)
1076 div = 128;
1077
1078 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
1079
1080 return 0;
1081}
1082
1083/**
1084 * sa1111_get_audio_rate - get the audio sample rate
1085 * @sadev: SA1111 SAC function block device
1086 */
1087int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1088{
1089 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1090 unsigned long div;
1091
1092 if (sadev->devid != SA1111_DEVID_SAC)
1093 return -EINVAL;
1094
1095 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
1096
1097 return __sa1111_pll_clock(sachip) / (256 * div);
1098}
1099
1100void sa1111_set_io_dir(struct sa1111_dev *sadev,
1101 unsigned int bits, unsigned int dir,
1102 unsigned int sleep_dir)
1103{
1104 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1105 unsigned long flags;
1106 unsigned int val;
1107 void __iomem *gpio = sachip->base + SA1111_GPIO;
1108
1109#define MODIFY_BITS(port, mask, dir) \
1110 if (mask) { \
1111 val = sa1111_readl(port); \
1112 val &= ~(mask); \
1113 val |= (dir) & (mask); \
1114 sa1111_writel(val, port); \
1115 }
1116
1117 spin_lock_irqsave(&sachip->lock, flags);
1118 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
1119 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
1120 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
1121
1122 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
1123 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
1124 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
1125 spin_unlock_irqrestore(&sachip->lock, flags);
1126}
1127
1128void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1129{
1130 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1131 unsigned long flags;
1132 unsigned int val;
1133 void __iomem *gpio = sachip->base + SA1111_GPIO;
1134
1135 spin_lock_irqsave(&sachip->lock, flags);
1136 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
1137 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
1138 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
1139 spin_unlock_irqrestore(&sachip->lock, flags);
1140}
1141
1142void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1143{
1144 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1145 unsigned long flags;
1146 unsigned int val;
1147 void __iomem *gpio = sachip->base + SA1111_GPIO;
1148
1149 spin_lock_irqsave(&sachip->lock, flags);
1150 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
1151 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
1152 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
1153 spin_unlock_irqrestore(&sachip->lock, flags);
1154}
1155
1156/*
1157 * Individual device operations.
1158 */
1159
1160/**
1161 * sa1111_enable_device - enable an on-chip SA1111 function block
1162 * @sadev: SA1111 function block device to enable
1163 */
1164void sa1111_enable_device(struct sa1111_dev *sadev)
1165{
1166 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1167 unsigned long flags;
1168 unsigned int val;
1169
1170 spin_lock_irqsave(&sachip->lock, flags);
1171 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1172 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1173 spin_unlock_irqrestore(&sachip->lock, flags);
1174}
1175
1176/**
1177 * sa1111_disable_device - disable an on-chip SA1111 function block
1178 * @sadev: SA1111 function block device to disable
1179 */
1180void sa1111_disable_device(struct sa1111_dev *sadev)
1181{
1182 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1183 unsigned long flags;
1184 unsigned int val;
1185
1186 spin_lock_irqsave(&sachip->lock, flags);
1187 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1188 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1189 spin_unlock_irqrestore(&sachip->lock, flags);
1190}
1191
1192/*
1193 * SA1111 "Register Access Bus."
1194 *
1195 * We model this as a regular bus type, and hang devices directly
1196 * off this.
1197 */
1198static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1199{
1200 struct sa1111_dev *dev = SA1111_DEV(_dev);
1201 struct sa1111_driver *drv = SA1111_DRV(_drv);
1202
1203 return dev->devid == drv->devid;
1204}
1205
1206static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
1207{
1208 struct sa1111_dev *sadev = SA1111_DEV(dev);
1209 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1210 int ret = 0;
1211
1212 if (drv && drv->suspend)
1213 ret = drv->suspend(sadev, state);
1214 return ret;
1215}
1216
1217static int sa1111_bus_resume(struct device *dev)
1218{
1219 struct sa1111_dev *sadev = SA1111_DEV(dev);
1220 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1221 int ret = 0;
1222
1223 if (drv && drv->resume)
1224 ret = drv->resume(sadev);
1225 return ret;
1226}
1227
1228static int sa1111_bus_probe(struct device *dev)
1229{
1230 struct sa1111_dev *sadev = SA1111_DEV(dev);
1231 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1232 int ret = -ENODEV;
1233
1234 if (drv->probe)
1235 ret = drv->probe(sadev);
1236 return ret;
1237}
1238
1239static int sa1111_bus_remove(struct device *dev)
1240{
1241 struct sa1111_dev *sadev = SA1111_DEV(dev);
1242 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1243 int ret = 0;
1244
1245 if (drv->remove)
1246 ret = drv->remove(sadev);
1247 return ret;
1248}
1249
1250struct bus_type sa1111_bus_type = {
1251 .name = "sa1111-rab",
1252 .match = sa1111_match,
2876ba43
RK		 1253 .probe = sa1111_bus_probe,
1254 .remove = sa1111_bus_remove,
1da177e4
LT		 1255 .suspend = sa1111_bus_suspend,
1256 .resume = sa1111_bus_resume,
1257};
1258
1259int sa1111_driver_register(struct sa1111_driver *driver)
1260{
1da177e4
LT		 1261 driver->drv.bus = &sa1111_bus_type;
1262 return driver_register(&driver->drv);
1263}
1264
1265void sa1111_driver_unregister(struct sa1111_driver *driver)
1266{
1267 driver_unregister(&driver->drv);
1268}
1269
1270static int __init sa1111_init(void)
1271{
1272 int ret = bus_register(&sa1111_bus_type);
1273 if (ret == 0)
3ae5eaec 1274 platform_driver_register(&sa1111_device_driver);
1da177e4
LT		 1275 return ret;
1276}
1277
1278static void __exit sa1111_exit(void)
1279{
3ae5eaec 1280 platform_driver_unregister(&sa1111_device_driver);
1da177e4
LT		 1281 bus_unregister(&sa1111_bus_type);
1282}
1283
72724382 1284subsys_initcall(sa1111_init);
1da177e4
LT		 1285module_exit(sa1111_exit);
1286
1287MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1288MODULE_LICENSE("GPL");
1289
1290EXPORT_SYMBOL(sa1111_select_audio_mode);
1291EXPORT_SYMBOL(sa1111_set_audio_rate);
1292EXPORT_SYMBOL(sa1111_get_audio_rate);
1293EXPORT_SYMBOL(sa1111_set_io_dir);
1294EXPORT_SYMBOL(sa1111_set_io);
1295EXPORT_SYMBOL(sa1111_set_sleep_io);
1296EXPORT_SYMBOL(sa1111_enable_device);
1297EXPORT_SYMBOL(sa1111_disable_device);
1298EXPORT_SYMBOL(sa1111_pll_clock);
1299EXPORT_SYMBOL(sa1111_bus_type);
1300EXPORT_SYMBOL(sa1111_driver_register);
1301EXPORT_SYMBOL(sa1111_driver_unregister);
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