Commit | Line | Data |
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1da177e4 LT |
1 | /* This is the single file included by all MPC8xx build options. |
2 | * Since there are many different boards and no standard configuration, | |
3 | * we have a unique include file for each. Rather than change every | |
4 | * file that has to include MPC8xx configuration, they all include | |
5 | * this one and the configuration switching is done here. | |
6 | */ | |
7 | #ifdef __KERNEL__ | |
8 | #ifndef __CONFIG_8xx_DEFS | |
9 | #define __CONFIG_8xx_DEFS | |
10 | ||
1da177e4 LT |
11 | |
12 | #ifdef CONFIG_8xx | |
13 | ||
14 | #ifdef CONFIG_MBX | |
15 | #include <platforms/mbx.h> | |
16 | #endif | |
17 | ||
18 | #ifdef CONFIG_FADS | |
19 | #include <platforms/fads.h> | |
20 | #endif | |
21 | ||
22 | #ifdef CONFIG_RPXLITE | |
23 | #include <platforms/rpxlite.h> | |
24 | #endif | |
25 | ||
26 | #ifdef CONFIG_BSEIP | |
27 | #include <platforms/bseip.h> | |
28 | #endif | |
29 | ||
30 | #ifdef CONFIG_RPXCLASSIC | |
31 | #include <platforms/rpxclassic.h> | |
32 | #endif | |
33 | ||
34 | #if defined(CONFIG_TQM8xxL) | |
35 | #include <platforms/tqm8xx.h> | |
36 | #endif | |
37 | ||
1da177e4 LT |
38 | #if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24) |
39 | #include <platforms/ivms8.h> | |
40 | #endif | |
41 | ||
42 | #if defined(CONFIG_HERMES_PRO) | |
43 | #include <platforms/hermes.h> | |
44 | #endif | |
45 | ||
46 | #if defined(CONFIG_IP860) | |
47 | #include <platforms/ip860.h> | |
48 | #endif | |
49 | ||
50 | #if defined(CONFIG_LWMON) | |
51 | #include <platforms/lwmon.h> | |
52 | #endif | |
53 | ||
54 | #if defined(CONFIG_PCU_E) | |
55 | #include <platforms/pcu_e.h> | |
56 | #endif | |
57 | ||
58 | #if defined(CONFIG_CCM) | |
59 | #include <platforms/ccm.h> | |
60 | #endif | |
61 | ||
62 | #if defined(CONFIG_LANTEC) | |
63 | #include <platforms/lantec.h> | |
64 | #endif | |
65 | ||
e6b6239f AK |
66 | #if defined(CONFIG_MPC885ADS) |
67 | #include <platforms/mpc885ads.h> | |
68 | #endif | |
69 | ||
1da177e4 LT |
70 | /* Currently, all 8xx boards that support a processor to PCI/ISA bridge |
71 | * use the same memory map. | |
72 | */ | |
73 | #if 0 | |
74 | #if defined(CONFIG_PCI) && defined(PCI_ISA_IO_ADDR) | |
75 | #define _IO_BASE PCI_ISA_IO_ADDR | |
76 | #define _ISA_MEM_BASE PCI_ISA_MEM_ADDR | |
77 | #define PCI_DRAM_OFFSET 0x80000000 | |
78 | #else | |
79 | #define _IO_BASE 0 | |
80 | #define _ISA_MEM_BASE 0 | |
81 | #define PCI_DRAM_OFFSET 0 | |
82 | #endif | |
83 | #else | |
84 | #if !defined(_IO_BASE) /* defined in board specific header */ | |
85 | #define _IO_BASE 0 | |
86 | #endif | |
87 | #define _ISA_MEM_BASE 0 | |
88 | #define PCI_DRAM_OFFSET 0 | |
89 | #endif | |
90 | ||
91 | #ifndef __ASSEMBLY__ | |
92 | /* The "residual" data board information structure the boot loader | |
93 | * hands to us. | |
94 | */ | |
95 | extern unsigned char __res[]; | |
96 | ||
97 | struct pt_regs; | |
98 | ||
514ccd4e VB |
99 | enum ppc_sys_devices { |
100 | MPC8xx_CPM_FEC1, | |
101 | MPC8xx_CPM_FEC2, | |
102 | MPC8xx_CPM_I2C, | |
103 | MPC8xx_CPM_SCC1, | |
104 | MPC8xx_CPM_SCC2, | |
105 | MPC8xx_CPM_SCC3, | |
106 | MPC8xx_CPM_SCC4, | |
107 | MPC8xx_CPM_SPI, | |
108 | MPC8xx_CPM_MCC1, | |
109 | MPC8xx_CPM_MCC2, | |
110 | MPC8xx_CPM_SMC1, | |
111 | MPC8xx_CPM_SMC2, | |
112 | MPC8xx_CPM_USB, | |
2ca2d5e8 | 113 | MPC8xx_MDIO_FEC, |
75288c78 | 114 | NUM_PPC_SYS_DEVS, |
514ccd4e VB |
115 | }; |
116 | ||
0ec57e53 MT |
117 | #define PPC_PIN_SIZE (24 * 1024 * 1024) /* 24Mbytes of data pinned */ |
118 | ||
1461b4ea VB |
119 | #ifndef BOARD_CHIP_NAME |
120 | #define BOARD_CHIP_NAME "" | |
121 | #endif | |
122 | ||
1da177e4 LT |
123 | #endif /* !__ASSEMBLY__ */ |
124 | #endif /* CONFIG_8xx */ | |
125 | #endif /* __CONFIG_8xx_DEFS */ | |
126 | #endif /* __KERNEL__ */ |