[PATCH] v9fs: fix fid management in v9fs_create
[linux-2.6] / include / asm-ia64 / sn / bte.h
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1da177e4
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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
95ff439a 6 * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
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7 */
8
9
10#ifndef _ASM_IA64_SN_BTE_H
11#define _ASM_IA64_SN_BTE_H
12
13#include <linux/timer.h>
14#include <linux/spinlock.h>
15#include <linux/cache.h>
95ff439a 16#include <asm/sn/pda.h>
1da177e4 17#include <asm/sn/types.h>
95ff439a 18#include <asm/sn/shub_mmr.h>
1da177e4 19
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20#define IBCT_NOTIFY (0x1UL << 4)
21#define IBCT_ZFIL_MODE (0x1UL << 0)
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22
23/* #define BTE_DEBUG */
24/* #define BTE_DEBUG_VERBOSE */
25
26#ifdef BTE_DEBUG
27# define BTE_PRINTK(x) printk x /* Terse */
28# ifdef BTE_DEBUG_VERBOSE
29# define BTE_PRINTKV(x) printk x /* Verbose */
30# else
31# define BTE_PRINTKV(x)
32# endif /* BTE_DEBUG_VERBOSE */
33#else
34# define BTE_PRINTK(x)
35# define BTE_PRINTKV(x)
36#endif /* BTE_DEBUG */
37
38
39/* BTE status register only supports 16 bits for length field */
40#define BTE_LEN_BITS (16)
41#define BTE_LEN_MASK ((1 << BTE_LEN_BITS) - 1)
42#define BTE_MAX_XFER ((1 << BTE_LEN_BITS) * L1_CACHE_BYTES)
43
44
45/* Define hardware */
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46#define BTES_PER_NODE (is_shub2() ? 4 : 2)
47#define MAX_BTES_PER_NODE 4
1da177e4 48
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49#define BTE2OFF_CTRL (0)
50#define BTE2OFF_SRC (SH2_BT_ENG_SRC_ADDR_0 - SH2_BT_ENG_CSR_0)
51#define BTE2OFF_DEST (SH2_BT_ENG_DEST_ADDR_0 - SH2_BT_ENG_CSR_0)
52#define BTE2OFF_NOTIFY (SH2_BT_ENG_NOTIF_ADDR_0 - SH2_BT_ENG_CSR_0)
53
54#define BTE_BASE_ADDR(interface) \
55 (is_shub2() ? (interface == 0) ? SH2_BT_ENG_CSR_0 : \
56 (interface == 1) ? SH2_BT_ENG_CSR_1 : \
57 (interface == 2) ? SH2_BT_ENG_CSR_2 : \
58 SH2_BT_ENG_CSR_3 \
59 : (interface == 0) ? IIO_IBLS0 : IIO_IBLS1)
60
61#define BTE_SOURCE_ADDR(base) \
62 (is_shub2() ? base + (BTE2OFF_SRC/8) \
63 : base + (BTEOFF_SRC/8))
64
65#define BTE_DEST_ADDR(base) \
66 (is_shub2() ? base + (BTE2OFF_DEST/8) \
67 : base + (BTEOFF_DEST/8))
68
69#define BTE_CTRL_ADDR(base) \
70 (is_shub2() ? base + (BTE2OFF_CTRL/8) \
71 : base + (BTEOFF_CTRL/8))
72
73#define BTE_NOTIF_ADDR(base) \
74 (is_shub2() ? base + (BTE2OFF_NOTIFY/8) \
75 : base + (BTEOFF_NOTIFY/8))
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76
77/* Define hardware modes */
78#define BTE_NOTIFY (IBCT_NOTIFY)
79#define BTE_NORMAL BTE_NOTIFY
80#define BTE_ZERO_FILL (BTE_NOTIFY | IBCT_ZFIL_MODE)
81/* Use a reserved bit to let the caller specify a wait for any BTE */
82#define BTE_WACQUIRE (0x4000)
83/* Use the BTE on the node with the destination memory */
84#define BTE_USE_DEST (BTE_WACQUIRE << 1)
85/* Use any available BTE interface on any node for the transfer */
86#define BTE_USE_ANY (BTE_USE_DEST << 1)
87/* macro to force the IBCT0 value valid */
88#define BTE_VALID_MODE(x) ((x) & (IBCT_NOTIFY | IBCT_ZFIL_MODE))
89
90#define BTE_ACTIVE (IBLS_BUSY | IBLS_ERROR)
91#define BTE_WORD_AVAILABLE (IBLS_BUSY << 1)
92#define BTE_WORD_BUSY (~BTE_WORD_AVAILABLE)
93
94/*
95 * Some macros to simplify reading.
96 * Start with macros to locate the BTE control registers.
97 */
98#define BTE_LNSTAT_LOAD(_bte) \
99 HUB_L(_bte->bte_base_addr)
100#define BTE_LNSTAT_STORE(_bte, _x) \
101 HUB_S(_bte->bte_base_addr, (_x))
102#define BTE_SRC_STORE(_bte, _x) \
95ff439a 103 HUB_S(_bte->bte_source_addr, (_x))
1da177e4 104#define BTE_DEST_STORE(_bte, _x) \
95ff439a 105 HUB_S(_bte->bte_destination_addr, (_x))
1da177e4 106#define BTE_CTRL_STORE(_bte, _x) \
95ff439a 107 HUB_S(_bte->bte_control_addr, (_x))
1da177e4 108#define BTE_NOTIF_STORE(_bte, _x) \
95ff439a 109 HUB_S(_bte->bte_notify_addr, (_x))
1da177e4 110
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111#define BTE_START_TRANSFER(_bte, _len, _mode) \
112 is_shub2() ? BTE_CTRL_STORE(_bte, IBLS_BUSY | (_mode << 24) | _len) \
113 : BTE_LNSTAT_STORE(_bte, _len); \
114 BTE_CTRL_STORE(_bte, _mode)
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115
116/* Possible results from bte_copy and bte_unaligned_copy */
117/* The following error codes map into the BTE hardware codes
118 * IIO_ICRB_ECODE_* (in shubio.h). The hardware uses
119 * an error code of 0 (IIO_ICRB_ECODE_DERR), but we want zero
120 * to mean BTE_SUCCESS, so add one (BTEFAIL_OFFSET) to the error
121 * codes to give the following error codes.
122 */
123#define BTEFAIL_OFFSET 1
124
125typedef enum {
126 BTE_SUCCESS, /* 0 is success */
127 BTEFAIL_DIR, /* Directory error due to IIO access*/
128 BTEFAIL_POISON, /* poison error on IO access (write to poison page) */
129 BTEFAIL_WERR, /* Write error (ie WINV to a Read only line) */
130 BTEFAIL_ACCESS, /* access error (protection violation) */
131 BTEFAIL_PWERR, /* Partial Write Error */
132 BTEFAIL_PRERR, /* Partial Read Error */
133 BTEFAIL_TOUT, /* CRB Time out */
134 BTEFAIL_XTERR, /* Incoming xtalk pkt had error bit */
135 BTEFAIL_NOTAVAIL, /* BTE not available */
136} bte_result_t;
137
138
139/*
140 * Structure defining a bte. An instance of this
141 * structure is created in the nodepda for each
142 * bte on that node (as defined by BTES_PER_NODE)
143 * This structure contains everything necessary
144 * to work with a BTE.
145 */
146struct bteinfo_s {
147 volatile u64 notify ____cacheline_aligned;
148 u64 *bte_base_addr ____cacheline_aligned;
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149 u64 *bte_source_addr;
150 u64 *bte_destination_addr;
151 u64 *bte_control_addr;
152 u64 *bte_notify_addr;
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153 spinlock_t spinlock;
154 cnodeid_t bte_cnode; /* cnode */
155 int bte_error_count; /* Number of errors encountered */
156 int bte_num; /* 0 --> BTE0, 1 --> BTE1 */
157 int cleanup_active; /* Interface is locked for cleanup */
158 volatile bte_result_t bh_error; /* error while processing */
159 volatile u64 *most_rcnt_na;
95ff439a 160 struct bteinfo_s *btes_to_try[MAX_BTES_PER_NODE];
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161};
162
163
164/*
165 * Function prototypes (functions defined in bte.c, used elsewhere)
166 */
167extern bte_result_t bte_copy(u64, u64, u64, u64, void *);
168extern bte_result_t bte_unaligned_copy(u64, u64, u64, u64);
169extern void bte_error_handler(unsigned long);
170
171#define bte_zero(dest, len, mode, notification) \
172 bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification)
173
174/*
175 * The following is the prefered way of calling bte_unaligned_copy
176 * If the copy is fully cache line aligned, then bte_copy is
177 * used instead. Since bte_copy is inlined, this saves a call
178 * stack. NOTE: bte_copy is called synchronously and does block
179 * until the transfer is complete. In order to get the asynch
180 * version of bte_copy, you must perform this check yourself.
181 */
182#define BTE_UNALIGNED_COPY(src, dest, len, mode) \
183 (((len & L1_CACHE_MASK) || (src & L1_CACHE_MASK) || \
184 (dest & L1_CACHE_MASK)) ? \
185 bte_unaligned_copy(src, dest, len, mode) : \
186 bte_copy(src, dest, len, mode, NULL))
187
188
189#endif /* _ASM_IA64_SN_BTE_H */