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3948f0e0 LY |
1 | /* |
2 | * driver/usb/gadget/fsl_qe_udc.c | |
3 | * | |
4 | * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved. | |
5 | * | |
6 | * Xie Xiaobo <X.Xie@freescale.com> | |
7 | * Li Yang <leoli@freescale.com> | |
8 | * Based on bareboard code from Shlomi Gridish. | |
9 | * | |
10 | * Description: | |
11 | * Freescle QE/CPM USB Pheripheral Controller Driver | |
12 | * The controller can be found on MPC8360, MPC8272, and etc. | |
13 | * MPC8360 Rev 1.1 may need QE mircocode update | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify it | |
16 | * under the terms of the GNU General Public License as published by the | |
17 | * Free Software Foundation; either version 2 of the License, or (at your | |
18 | * option) any later version. | |
19 | */ | |
20 | ||
21 | #undef USB_TRACE | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/ioport.h> | |
27 | #include <linux/types.h> | |
28 | #include <linux/errno.h> | |
cd40c4c4 | 29 | #include <linux/err.h> |
3948f0e0 LY |
30 | #include <linux/slab.h> |
31 | #include <linux/list.h> | |
32 | #include <linux/interrupt.h> | |
33 | #include <linux/io.h> | |
34 | #include <linux/moduleparam.h> | |
35 | #include <linux/of_platform.h> | |
36 | #include <linux/dma-mapping.h> | |
37 | #include <linux/usb/ch9.h> | |
38 | #include <linux/usb/gadget.h> | |
39 | #include <linux/usb/otg.h> | |
40 | #include <asm/qe.h> | |
41 | #include <asm/cpm.h> | |
42 | #include <asm/dma.h> | |
43 | #include <asm/reg.h> | |
44 | #include "fsl_qe_udc.h" | |
45 | ||
46 | #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver" | |
47 | #define DRIVER_AUTHOR "Xie XiaoBo" | |
48 | #define DRIVER_VERSION "1.0" | |
49 | ||
50 | #define DMA_ADDR_INVALID (~(dma_addr_t)0) | |
51 | ||
52 | static const char driver_name[] = "fsl_qe_udc"; | |
53 | static const char driver_desc[] = DRIVER_DESC; | |
54 | ||
55 | /*ep name is important in gadget, it should obey the convention of ep_match()*/ | |
56 | static const char *const ep_name[] = { | |
57 | "ep0-control", /* everyone has ep0 */ | |
58 | /* 3 configurable endpoints */ | |
59 | "ep1", | |
60 | "ep2", | |
61 | "ep3", | |
62 | }; | |
63 | ||
64 | static struct usb_endpoint_descriptor qe_ep0_desc = { | |
65 | .bLength = USB_DT_ENDPOINT_SIZE, | |
66 | .bDescriptorType = USB_DT_ENDPOINT, | |
67 | ||
68 | .bEndpointAddress = 0, | |
69 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
70 | .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD, | |
71 | }; | |
72 | ||
73 | /* it is initialized in probe() */ | |
74 | static struct qe_udc *udc_controller; | |
75 | ||
76 | /******************************************************************** | |
77 | * Internal Used Function Start | |
78 | ********************************************************************/ | |
79 | /*----------------------------------------------------------------- | |
80 | * done() - retire a request; caller blocked irqs | |
81 | *--------------------------------------------------------------*/ | |
82 | static void done(struct qe_ep *ep, struct qe_req *req, int status) | |
83 | { | |
84 | struct qe_udc *udc = ep->udc; | |
85 | unsigned char stopped = ep->stopped; | |
86 | ||
87 | /* the req->queue pointer is used by ep_queue() func, in which | |
88 | * the request will be added into a udc_ep->queue 'd tail | |
89 | * so here the req will be dropped from the ep->queue | |
90 | */ | |
91 | list_del_init(&req->queue); | |
92 | ||
93 | /* req.status should be set as -EINPROGRESS in ep_queue() */ | |
94 | if (req->req.status == -EINPROGRESS) | |
95 | req->req.status = status; | |
96 | else | |
97 | status = req->req.status; | |
98 | ||
99 | if (req->mapped) { | |
100 | dma_unmap_single(udc->gadget.dev.parent, | |
101 | req->req.dma, req->req.length, | |
102 | ep_is_in(ep) | |
103 | ? DMA_TO_DEVICE | |
104 | : DMA_FROM_DEVICE); | |
105 | req->req.dma = DMA_ADDR_INVALID; | |
106 | req->mapped = 0; | |
107 | } else | |
108 | dma_sync_single_for_cpu(udc->gadget.dev.parent, | |
109 | req->req.dma, req->req.length, | |
110 | ep_is_in(ep) | |
111 | ? DMA_TO_DEVICE | |
112 | : DMA_FROM_DEVICE); | |
113 | ||
114 | if (status && (status != -ESHUTDOWN)) | |
115 | dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n", | |
116 | ep->ep.name, &req->req, status, | |
117 | req->req.actual, req->req.length); | |
118 | ||
119 | /* don't modify queue heads during completion callback */ | |
120 | ep->stopped = 1; | |
121 | spin_unlock(&udc->lock); | |
122 | ||
123 | /* this complete() should a func implemented by gadget layer, | |
124 | * eg fsg->bulk_in_complete() */ | |
125 | if (req->req.complete) | |
126 | req->req.complete(&ep->ep, &req->req); | |
127 | ||
128 | spin_lock(&udc->lock); | |
129 | ||
130 | ep->stopped = stopped; | |
131 | } | |
132 | ||
133 | /*----------------------------------------------------------------- | |
134 | * nuke(): delete all requests related to this ep | |
135 | *--------------------------------------------------------------*/ | |
136 | static void nuke(struct qe_ep *ep, int status) | |
137 | { | |
138 | /* Whether this eq has request linked */ | |
139 | while (!list_empty(&ep->queue)) { | |
140 | struct qe_req *req = NULL; | |
141 | req = list_entry(ep->queue.next, struct qe_req, queue); | |
142 | ||
143 | done(ep, req, status); | |
144 | } | |
145 | } | |
146 | ||
147 | /*---------------------------------------------------------------------------* | |
148 | * USB and Endpoint manipulate process, include parameter and register * | |
149 | *---------------------------------------------------------------------------*/ | |
150 | /* @value: 1--set stall 0--clean stall */ | |
151 | static int qe_eprx_stall_change(struct qe_ep *ep, int value) | |
152 | { | |
153 | u16 tem_usep; | |
154 | u8 epnum = ep->epnum; | |
155 | struct qe_udc *udc = ep->udc; | |
156 | ||
157 | tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]); | |
158 | tem_usep = tem_usep & ~USB_RHS_MASK; | |
159 | if (value == 1) | |
160 | tem_usep |= USB_RHS_STALL; | |
161 | else if (ep->dir == USB_DIR_IN) | |
162 | tem_usep |= USB_RHS_IGNORE_OUT; | |
163 | ||
164 | out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep); | |
165 | return 0; | |
166 | } | |
167 | ||
168 | static int qe_eptx_stall_change(struct qe_ep *ep, int value) | |
169 | { | |
170 | u16 tem_usep; | |
171 | u8 epnum = ep->epnum; | |
172 | struct qe_udc *udc = ep->udc; | |
173 | ||
174 | tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]); | |
175 | tem_usep = tem_usep & ~USB_THS_MASK; | |
176 | if (value == 1) | |
177 | tem_usep |= USB_THS_STALL; | |
178 | else if (ep->dir == USB_DIR_OUT) | |
179 | tem_usep |= USB_THS_IGNORE_IN; | |
180 | ||
181 | out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep); | |
182 | ||
183 | return 0; | |
184 | } | |
185 | ||
186 | static int qe_ep0_stall(struct qe_udc *udc) | |
187 | { | |
188 | qe_eptx_stall_change(&udc->eps[0], 1); | |
189 | qe_eprx_stall_change(&udc->eps[0], 1); | |
190 | udc_controller->ep0_state = WAIT_FOR_SETUP; | |
191 | udc_controller->ep0_dir = 0; | |
192 | return 0; | |
193 | } | |
194 | ||
195 | static int qe_eprx_nack(struct qe_ep *ep) | |
196 | { | |
197 | u8 epnum = ep->epnum; | |
198 | struct qe_udc *udc = ep->udc; | |
199 | ||
200 | if (ep->state == EP_STATE_IDLE) { | |
201 | /* Set the ep's nack */ | |
202 | clrsetbits_be16(&udc->usb_regs->usb_usep[epnum], | |
203 | USB_RHS_MASK, USB_RHS_NACK); | |
204 | ||
205 | /* Mask Rx and Busy interrupts */ | |
206 | clrbits16(&udc->usb_regs->usb_usbmr, | |
207 | (USB_E_RXB_MASK | USB_E_BSY_MASK)); | |
208 | ||
209 | ep->state = EP_STATE_NACK; | |
210 | } | |
211 | return 0; | |
212 | } | |
213 | ||
214 | static int qe_eprx_normal(struct qe_ep *ep) | |
215 | { | |
216 | struct qe_udc *udc = ep->udc; | |
217 | ||
218 | if (ep->state == EP_STATE_NACK) { | |
219 | clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum], | |
220 | USB_RTHS_MASK, USB_THS_IGNORE_IN); | |
221 | ||
222 | /* Unmask RX interrupts */ | |
223 | out_be16(&udc->usb_regs->usb_usber, | |
224 | USB_E_BSY_MASK | USB_E_RXB_MASK); | |
225 | setbits16(&udc->usb_regs->usb_usbmr, | |
226 | (USB_E_RXB_MASK | USB_E_BSY_MASK)); | |
227 | ||
228 | ep->state = EP_STATE_IDLE; | |
229 | ep->has_data = 0; | |
230 | } | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
235 | static int qe_ep_cmd_stoptx(struct qe_ep *ep) | |
236 | { | |
237 | if (ep->udc->soc_type == PORT_CPM) | |
238 | cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT), | |
239 | CPM_USB_STOP_TX_OPCODE); | |
240 | else | |
241 | qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB, | |
242 | ep->epnum, 0); | |
243 | ||
244 | return 0; | |
245 | } | |
246 | ||
247 | static int qe_ep_cmd_restarttx(struct qe_ep *ep) | |
248 | { | |
249 | if (ep->udc->soc_type == PORT_CPM) | |
250 | cpm_command(CPM_USB_RESTART_TX | (ep->epnum << | |
251 | CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE); | |
252 | else | |
253 | qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB, | |
254 | ep->epnum, 0); | |
255 | ||
256 | return 0; | |
257 | } | |
258 | ||
259 | static int qe_ep_flushtxfifo(struct qe_ep *ep) | |
260 | { | |
261 | struct qe_udc *udc = ep->udc; | |
262 | int i; | |
263 | ||
264 | i = (int)ep->epnum; | |
265 | ||
266 | qe_ep_cmd_stoptx(ep); | |
267 | out_8(&udc->usb_regs->usb_uscom, | |
268 | USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum))); | |
269 | out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase)); | |
270 | out_be32(&udc->ep_param[i]->tstate, 0); | |
271 | out_be16(&udc->ep_param[i]->tbcnt, 0); | |
272 | ||
273 | ep->c_txbd = ep->txbase; | |
274 | ep->n_txbd = ep->txbase; | |
275 | qe_ep_cmd_restarttx(ep); | |
276 | return 0; | |
277 | } | |
278 | ||
279 | static int qe_ep_filltxfifo(struct qe_ep *ep) | |
280 | { | |
281 | struct qe_udc *udc = ep->udc; | |
282 | ||
283 | out_8(&udc->usb_regs->usb_uscom, | |
284 | USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum))); | |
285 | return 0; | |
286 | } | |
287 | ||
288 | static int qe_epbds_reset(struct qe_udc *udc, int pipe_num) | |
289 | { | |
290 | struct qe_ep *ep; | |
291 | u32 bdring_len; | |
292 | struct qe_bd __iomem *bd; | |
293 | int i; | |
294 | ||
295 | ep = &udc->eps[pipe_num]; | |
296 | ||
297 | if (ep->dir == USB_DIR_OUT) | |
298 | bdring_len = USB_BDRING_LEN_RX; | |
299 | else | |
300 | bdring_len = USB_BDRING_LEN; | |
301 | ||
302 | bd = ep->rxbase; | |
303 | for (i = 0; i < (bdring_len - 1); i++) { | |
304 | out_be32((u32 __iomem *)bd, R_E | R_I); | |
305 | bd++; | |
306 | } | |
307 | out_be32((u32 __iomem *)bd, R_E | R_I | R_W); | |
308 | ||
309 | bd = ep->txbase; | |
310 | for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) { | |
311 | out_be32(&bd->buf, 0); | |
312 | out_be32((u32 __iomem *)bd, 0); | |
313 | bd++; | |
314 | } | |
315 | out_be32((u32 __iomem *)bd, T_W); | |
316 | ||
317 | return 0; | |
318 | } | |
319 | ||
320 | static int qe_ep_reset(struct qe_udc *udc, int pipe_num) | |
321 | { | |
322 | struct qe_ep *ep; | |
323 | u16 tmpusep; | |
324 | ||
325 | ep = &udc->eps[pipe_num]; | |
326 | tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]); | |
327 | tmpusep &= ~USB_RTHS_MASK; | |
328 | ||
329 | switch (ep->dir) { | |
330 | case USB_DIR_BOTH: | |
331 | qe_ep_flushtxfifo(ep); | |
332 | break; | |
333 | case USB_DIR_OUT: | |
334 | tmpusep |= USB_THS_IGNORE_IN; | |
335 | break; | |
336 | case USB_DIR_IN: | |
337 | qe_ep_flushtxfifo(ep); | |
338 | tmpusep |= USB_RHS_IGNORE_OUT; | |
339 | break; | |
340 | default: | |
341 | break; | |
342 | } | |
343 | out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep); | |
344 | ||
345 | qe_epbds_reset(udc, pipe_num); | |
346 | ||
347 | return 0; | |
348 | } | |
349 | ||
350 | static int qe_ep_toggledata01(struct qe_ep *ep) | |
351 | { | |
352 | ep->data01 ^= 0x1; | |
353 | return 0; | |
354 | } | |
355 | ||
356 | static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num) | |
357 | { | |
358 | struct qe_ep *ep = &udc->eps[pipe_num]; | |
359 | unsigned long tmp_addr = 0; | |
360 | struct usb_ep_para __iomem *epparam; | |
361 | int i; | |
362 | struct qe_bd __iomem *bd; | |
363 | int bdring_len; | |
364 | ||
365 | if (ep->dir == USB_DIR_OUT) | |
366 | bdring_len = USB_BDRING_LEN_RX; | |
367 | else | |
368 | bdring_len = USB_BDRING_LEN; | |
369 | ||
370 | epparam = udc->ep_param[pipe_num]; | |
371 | /* alloc multi-ram for BD rings and set the ep parameters */ | |
372 | tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len + | |
373 | USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD); | |
cd40c4c4 AV |
374 | if (IS_ERR_VALUE(tmp_addr)) |
375 | return -ENOMEM; | |
376 | ||
3948f0e0 LY |
377 | out_be16(&epparam->rbase, (u16)tmp_addr); |
378 | out_be16(&epparam->tbase, (u16)(tmp_addr + | |
379 | (sizeof(struct qe_bd) * bdring_len))); | |
380 | ||
381 | out_be16(&epparam->rbptr, in_be16(&epparam->rbase)); | |
382 | out_be16(&epparam->tbptr, in_be16(&epparam->tbase)); | |
383 | ||
384 | ep->rxbase = cpm_muram_addr(tmp_addr); | |
385 | ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd) | |
386 | * bdring_len)); | |
387 | ep->n_rxbd = ep->rxbase; | |
388 | ep->e_rxbd = ep->rxbase; | |
389 | ep->n_txbd = ep->txbase; | |
390 | ep->c_txbd = ep->txbase; | |
391 | ep->data01 = 0; /* data0 */ | |
392 | ||
393 | /* Init TX and RX bds */ | |
394 | bd = ep->rxbase; | |
395 | for (i = 0; i < bdring_len - 1; i++) { | |
396 | out_be32(&bd->buf, 0); | |
397 | out_be32((u32 __iomem *)bd, 0); | |
398 | bd++; | |
399 | } | |
400 | out_be32(&bd->buf, 0); | |
401 | out_be32((u32 __iomem *)bd, R_W); | |
402 | ||
403 | bd = ep->txbase; | |
404 | for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) { | |
405 | out_be32(&bd->buf, 0); | |
406 | out_be32((u32 __iomem *)bd, 0); | |
407 | bd++; | |
408 | } | |
409 | out_be32(&bd->buf, 0); | |
410 | out_be32((u32 __iomem *)bd, T_W); | |
411 | ||
412 | return 0; | |
413 | } | |
414 | ||
415 | static int qe_ep_rxbd_update(struct qe_ep *ep) | |
416 | { | |
417 | unsigned int size; | |
418 | int i; | |
419 | unsigned int tmp; | |
420 | struct qe_bd __iomem *bd; | |
421 | unsigned int bdring_len; | |
422 | ||
423 | if (ep->rxbase == NULL) | |
424 | return -EINVAL; | |
425 | ||
426 | bd = ep->rxbase; | |
427 | ||
428 | ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC); | |
429 | if (ep->rxframe == NULL) { | |
430 | dev_err(ep->udc->dev, "malloc rxframe failed\n"); | |
431 | return -ENOMEM; | |
432 | } | |
433 | ||
434 | qe_frame_init(ep->rxframe); | |
435 | ||
436 | if (ep->dir == USB_DIR_OUT) | |
437 | bdring_len = USB_BDRING_LEN_RX; | |
438 | else | |
439 | bdring_len = USB_BDRING_LEN; | |
440 | ||
441 | size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1); | |
442 | ep->rxbuffer = kzalloc(size, GFP_ATOMIC); | |
443 | if (ep->rxbuffer == NULL) { | |
444 | dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n", | |
445 | size); | |
446 | kfree(ep->rxframe); | |
447 | return -ENOMEM; | |
448 | } | |
449 | ||
450 | ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer); | |
451 | if (ep->rxbuf_d == DMA_ADDR_INVALID) { | |
452 | ep->rxbuf_d = dma_map_single(udc_controller->gadget.dev.parent, | |
453 | ep->rxbuffer, | |
454 | size, | |
455 | DMA_FROM_DEVICE); | |
456 | ep->rxbufmap = 1; | |
457 | } else { | |
458 | dma_sync_single_for_device(udc_controller->gadget.dev.parent, | |
459 | ep->rxbuf_d, size, | |
460 | DMA_FROM_DEVICE); | |
461 | ep->rxbufmap = 0; | |
462 | } | |
463 | ||
464 | size = ep->ep.maxpacket + USB_CRC_SIZE + 2; | |
465 | tmp = ep->rxbuf_d; | |
466 | tmp = (u32)(((tmp >> 2) << 2) + 4); | |
467 | ||
468 | for (i = 0; i < bdring_len - 1; i++) { | |
469 | out_be32(&bd->buf, tmp); | |
470 | out_be32((u32 __iomem *)bd, (R_E | R_I)); | |
471 | tmp = tmp + size; | |
472 | bd++; | |
473 | } | |
474 | out_be32(&bd->buf, tmp); | |
475 | out_be32((u32 __iomem *)bd, (R_E | R_I | R_W)); | |
476 | ||
477 | return 0; | |
478 | } | |
479 | ||
480 | static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num) | |
481 | { | |
482 | struct qe_ep *ep = &udc->eps[pipe_num]; | |
483 | struct usb_ep_para __iomem *epparam; | |
484 | u16 usep, logepnum; | |
485 | u16 tmp; | |
486 | u8 rtfcr = 0; | |
487 | ||
488 | epparam = udc->ep_param[pipe_num]; | |
489 | ||
490 | usep = 0; | |
491 | logepnum = (ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK); | |
492 | usep |= (logepnum << USB_EPNUM_SHIFT); | |
493 | ||
494 | switch (ep->desc->bmAttributes & 0x03) { | |
495 | case USB_ENDPOINT_XFER_BULK: | |
496 | usep |= USB_TRANS_BULK; | |
497 | break; | |
498 | case USB_ENDPOINT_XFER_ISOC: | |
499 | usep |= USB_TRANS_ISO; | |
500 | break; | |
501 | case USB_ENDPOINT_XFER_INT: | |
502 | usep |= USB_TRANS_INT; | |
503 | break; | |
504 | default: | |
505 | usep |= USB_TRANS_CTR; | |
506 | break; | |
507 | } | |
508 | ||
509 | switch (ep->dir) { | |
510 | case USB_DIR_OUT: | |
511 | usep |= USB_THS_IGNORE_IN; | |
512 | break; | |
513 | case USB_DIR_IN: | |
514 | usep |= USB_RHS_IGNORE_OUT; | |
515 | break; | |
516 | default: | |
517 | break; | |
518 | } | |
519 | out_be16(&udc->usb_regs->usb_usep[pipe_num], usep); | |
520 | ||
521 | rtfcr = 0x30; | |
522 | out_8(&epparam->rbmr, rtfcr); | |
523 | out_8(&epparam->tbmr, rtfcr); | |
524 | ||
525 | tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE); | |
526 | /* MRBLR must be divisble by 4 */ | |
527 | tmp = (u16)(((tmp >> 2) << 2) + 4); | |
528 | out_be16(&epparam->mrblr, tmp); | |
529 | ||
530 | return 0; | |
531 | } | |
532 | ||
533 | static int qe_ep_init(struct qe_udc *udc, | |
534 | unsigned char pipe_num, | |
535 | const struct usb_endpoint_descriptor *desc) | |
536 | { | |
537 | struct qe_ep *ep = &udc->eps[pipe_num]; | |
538 | unsigned long flags; | |
539 | int reval = 0; | |
540 | u16 max = 0; | |
541 | ||
542 | max = le16_to_cpu(desc->wMaxPacketSize); | |
543 | ||
544 | /* check the max package size validate for this endpoint */ | |
545 | /* Refer to USB2.0 spec table 9-13, | |
546 | */ | |
547 | if (pipe_num != 0) { | |
548 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | |
549 | case USB_ENDPOINT_XFER_BULK: | |
550 | if (strstr(ep->ep.name, "-iso") | |
551 | || strstr(ep->ep.name, "-int")) | |
552 | goto en_done; | |
553 | switch (udc->gadget.speed) { | |
554 | case USB_SPEED_HIGH: | |
555 | if ((max == 128) || (max == 256) || (max == 512)) | |
556 | break; | |
557 | default: | |
558 | switch (max) { | |
559 | case 4: | |
560 | case 8: | |
561 | case 16: | |
562 | case 32: | |
563 | case 64: | |
564 | break; | |
565 | default: | |
566 | case USB_SPEED_LOW: | |
567 | goto en_done; | |
568 | } | |
569 | } | |
570 | break; | |
571 | case USB_ENDPOINT_XFER_INT: | |
572 | if (strstr(ep->ep.name, "-iso")) /* bulk is ok */ | |
573 | goto en_done; | |
574 | switch (udc->gadget.speed) { | |
575 | case USB_SPEED_HIGH: | |
576 | if (max <= 1024) | |
577 | break; | |
578 | case USB_SPEED_FULL: | |
579 | if (max <= 64) | |
580 | break; | |
581 | default: | |
582 | if (max <= 8) | |
583 | break; | |
584 | goto en_done; | |
585 | } | |
586 | break; | |
587 | case USB_ENDPOINT_XFER_ISOC: | |
588 | if (strstr(ep->ep.name, "-bulk") | |
589 | || strstr(ep->ep.name, "-int")) | |
590 | goto en_done; | |
591 | switch (udc->gadget.speed) { | |
592 | case USB_SPEED_HIGH: | |
593 | if (max <= 1024) | |
594 | break; | |
595 | case USB_SPEED_FULL: | |
596 | if (max <= 1023) | |
597 | break; | |
598 | default: | |
599 | goto en_done; | |
600 | } | |
601 | break; | |
602 | case USB_ENDPOINT_XFER_CONTROL: | |
603 | if (strstr(ep->ep.name, "-iso") | |
604 | || strstr(ep->ep.name, "-int")) | |
605 | goto en_done; | |
606 | switch (udc->gadget.speed) { | |
607 | case USB_SPEED_HIGH: | |
608 | case USB_SPEED_FULL: | |
609 | switch (max) { | |
610 | case 1: | |
611 | case 2: | |
612 | case 4: | |
613 | case 8: | |
614 | case 16: | |
615 | case 32: | |
616 | case 64: | |
617 | break; | |
618 | default: | |
619 | goto en_done; | |
620 | } | |
621 | case USB_SPEED_LOW: | |
622 | switch (max) { | |
623 | case 1: | |
624 | case 2: | |
625 | case 4: | |
626 | case 8: | |
627 | break; | |
628 | default: | |
629 | goto en_done; | |
630 | } | |
631 | default: | |
632 | goto en_done; | |
633 | } | |
634 | break; | |
635 | ||
636 | default: | |
637 | goto en_done; | |
638 | } | |
639 | } /* if ep0*/ | |
640 | ||
641 | spin_lock_irqsave(&udc->lock, flags); | |
642 | ||
643 | /* initialize ep structure */ | |
644 | ep->ep.maxpacket = max; | |
645 | ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK); | |
646 | ep->desc = desc; | |
647 | ep->stopped = 0; | |
648 | ep->init = 1; | |
649 | ||
650 | if (pipe_num == 0) { | |
651 | ep->dir = USB_DIR_BOTH; | |
652 | udc->ep0_dir = USB_DIR_OUT; | |
653 | udc->ep0_state = WAIT_FOR_SETUP; | |
654 | } else { | |
655 | switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) { | |
656 | case USB_DIR_OUT: | |
657 | ep->dir = USB_DIR_OUT; | |
658 | break; | |
659 | case USB_DIR_IN: | |
660 | ep->dir = USB_DIR_IN; | |
661 | default: | |
662 | break; | |
663 | } | |
664 | } | |
665 | ||
666 | /* hardware special operation */ | |
667 | qe_ep_bd_init(udc, pipe_num); | |
668 | if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) { | |
669 | reval = qe_ep_rxbd_update(ep); | |
670 | if (reval) | |
671 | goto en_done1; | |
672 | } | |
673 | ||
674 | if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) { | |
675 | ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC); | |
676 | if (ep->txframe == NULL) { | |
677 | dev_err(udc->dev, "malloc txframe failed\n"); | |
678 | goto en_done2; | |
679 | } | |
680 | qe_frame_init(ep->txframe); | |
681 | } | |
682 | ||
683 | qe_ep_register_init(udc, pipe_num); | |
684 | ||
685 | /* Now HW will be NAKing transfers to that EP, | |
686 | * until a buffer is queued to it. */ | |
687 | spin_unlock_irqrestore(&udc->lock, flags); | |
688 | ||
689 | return 0; | |
690 | en_done2: | |
691 | kfree(ep->rxbuffer); | |
692 | kfree(ep->rxframe); | |
693 | en_done1: | |
694 | spin_unlock_irqrestore(&udc->lock, flags); | |
695 | en_done: | |
cd40c4c4 | 696 | dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name); |
3948f0e0 LY |
697 | return -ENODEV; |
698 | } | |
699 | ||
700 | static inline void qe_usb_enable(void) | |
701 | { | |
702 | setbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN); | |
703 | } | |
704 | ||
705 | static inline void qe_usb_disable(void) | |
706 | { | |
707 | clrbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN); | |
708 | } | |
709 | ||
710 | /*----------------------------------------------------------------------------* | |
711 | * USB and EP basic manipulate function end * | |
712 | *----------------------------------------------------------------------------*/ | |
713 | ||
714 | ||
715 | /****************************************************************************** | |
716 | UDC transmit and receive process | |
717 | ******************************************************************************/ | |
718 | static void recycle_one_rxbd(struct qe_ep *ep) | |
719 | { | |
720 | u32 bdstatus; | |
721 | ||
722 | bdstatus = in_be32((u32 __iomem *)ep->e_rxbd); | |
723 | bdstatus = R_I | R_E | (bdstatus & R_W); | |
724 | out_be32((u32 __iomem *)ep->e_rxbd, bdstatus); | |
725 | ||
726 | if (bdstatus & R_W) | |
727 | ep->e_rxbd = ep->rxbase; | |
728 | else | |
729 | ep->e_rxbd++; | |
730 | } | |
731 | ||
732 | static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext) | |
733 | { | |
734 | u32 bdstatus; | |
735 | struct qe_bd __iomem *bd, *nextbd; | |
736 | unsigned char stop = 0; | |
737 | ||
738 | nextbd = ep->n_rxbd; | |
739 | bd = ep->e_rxbd; | |
740 | bdstatus = in_be32((u32 __iomem *)bd); | |
741 | ||
742 | while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) { | |
743 | bdstatus = R_E | R_I | (bdstatus & R_W); | |
744 | out_be32((u32 __iomem *)bd, bdstatus); | |
745 | ||
746 | if (bdstatus & R_W) | |
747 | bd = ep->rxbase; | |
748 | else | |
749 | bd++; | |
750 | ||
751 | bdstatus = in_be32((u32 __iomem *)bd); | |
752 | if (stopatnext && (bd == nextbd)) | |
753 | stop = 1; | |
754 | } | |
755 | ||
756 | ep->e_rxbd = bd; | |
757 | } | |
758 | ||
759 | static void ep_recycle_rxbds(struct qe_ep *ep) | |
760 | { | |
761 | struct qe_bd __iomem *bd = ep->n_rxbd; | |
762 | u32 bdstatus; | |
763 | u8 epnum = ep->epnum; | |
764 | struct qe_udc *udc = ep->udc; | |
765 | ||
766 | bdstatus = in_be32((u32 __iomem *)bd); | |
767 | if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) { | |
768 | bd = ep->rxbase + | |
769 | ((in_be16(&udc->ep_param[epnum]->rbptr) - | |
770 | in_be16(&udc->ep_param[epnum]->rbase)) | |
771 | >> 3); | |
772 | bdstatus = in_be32((u32 __iomem *)bd); | |
773 | ||
774 | if (bdstatus & R_W) | |
775 | bd = ep->rxbase; | |
776 | else | |
777 | bd++; | |
778 | ||
779 | ep->e_rxbd = bd; | |
780 | recycle_rxbds(ep, 0); | |
781 | ep->e_rxbd = ep->n_rxbd; | |
782 | } else | |
783 | recycle_rxbds(ep, 1); | |
784 | ||
785 | if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK) | |
786 | out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK); | |
787 | ||
788 | if (ep->has_data <= 0 && (!list_empty(&ep->queue))) | |
789 | qe_eprx_normal(ep); | |
790 | ||
791 | ep->localnack = 0; | |
792 | } | |
793 | ||
794 | static void setup_received_handle(struct qe_udc *udc, | |
795 | struct usb_ctrlrequest *setup); | |
796 | static int qe_ep_rxframe_handle(struct qe_ep *ep); | |
797 | static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req); | |
798 | /* when BD PID is setup, handle the packet */ | |
799 | static int ep0_setup_handle(struct qe_udc *udc) | |
800 | { | |
801 | struct qe_ep *ep = &udc->eps[0]; | |
802 | struct qe_frame *pframe; | |
803 | unsigned int fsize; | |
804 | u8 *cp; | |
805 | ||
806 | pframe = ep->rxframe; | |
807 | if ((frame_get_info(pframe) & PID_SETUP) | |
808 | && (udc->ep0_state == WAIT_FOR_SETUP)) { | |
809 | fsize = frame_get_length(pframe); | |
810 | if (unlikely(fsize != 8)) | |
811 | return -EINVAL; | |
812 | cp = (u8 *)&udc->local_setup_buff; | |
813 | memcpy(cp, pframe->data, fsize); | |
814 | ep->data01 = 1; | |
815 | ||
816 | /* handle the usb command base on the usb_ctrlrequest */ | |
817 | setup_received_handle(udc, &udc->local_setup_buff); | |
818 | return 0; | |
819 | } | |
820 | return -EINVAL; | |
821 | } | |
822 | ||
823 | static int qe_ep0_rx(struct qe_udc *udc) | |
824 | { | |
825 | struct qe_ep *ep = &udc->eps[0]; | |
826 | struct qe_frame *pframe; | |
827 | struct qe_bd __iomem *bd; | |
828 | u32 bdstatus, length; | |
829 | u32 vaddr; | |
830 | ||
831 | pframe = ep->rxframe; | |
832 | ||
833 | if (ep->dir == USB_DIR_IN) { | |
834 | dev_err(udc->dev, "ep0 not a control endpoint\n"); | |
835 | return -EINVAL; | |
836 | } | |
837 | ||
838 | bd = ep->n_rxbd; | |
839 | bdstatus = in_be32((u32 __iomem *)bd); | |
840 | length = bdstatus & BD_LENGTH_MASK; | |
841 | ||
842 | while (!(bdstatus & R_E) && length) { | |
843 | if ((bdstatus & R_F) && (bdstatus & R_L) | |
844 | && !(bdstatus & R_ERROR)) { | |
845 | if (length == USB_CRC_SIZE) { | |
846 | udc->ep0_state = WAIT_FOR_SETUP; | |
847 | dev_vdbg(udc->dev, | |
848 | "receive a ZLP in status phase\n"); | |
849 | } else { | |
850 | qe_frame_clean(pframe); | |
851 | vaddr = (u32)phys_to_virt(in_be32(&bd->buf)); | |
852 | frame_set_data(pframe, (u8 *)vaddr); | |
853 | frame_set_length(pframe, | |
854 | (length - USB_CRC_SIZE)); | |
855 | frame_set_status(pframe, FRAME_OK); | |
856 | switch (bdstatus & R_PID) { | |
857 | case R_PID_SETUP: | |
858 | frame_set_info(pframe, PID_SETUP); | |
859 | break; | |
860 | case R_PID_DATA1: | |
861 | frame_set_info(pframe, PID_DATA1); | |
862 | break; | |
863 | default: | |
864 | frame_set_info(pframe, PID_DATA0); | |
865 | break; | |
866 | } | |
867 | ||
868 | if ((bdstatus & R_PID) == R_PID_SETUP) | |
869 | ep0_setup_handle(udc); | |
870 | else | |
871 | qe_ep_rxframe_handle(ep); | |
872 | } | |
873 | } else { | |
874 | dev_err(udc->dev, "The receive frame with error!\n"); | |
875 | } | |
876 | ||
877 | /* note: don't clear the rxbd's buffer address */ | |
878 | recycle_one_rxbd(ep); | |
879 | ||
880 | /* Get next BD */ | |
881 | if (bdstatus & R_W) | |
882 | bd = ep->rxbase; | |
883 | else | |
884 | bd++; | |
885 | ||
886 | bdstatus = in_be32((u32 __iomem *)bd); | |
887 | length = bdstatus & BD_LENGTH_MASK; | |
888 | ||
889 | } | |
890 | ||
891 | ep->n_rxbd = bd; | |
892 | ||
893 | return 0; | |
894 | } | |
895 | ||
896 | static int qe_ep_rxframe_handle(struct qe_ep *ep) | |
897 | { | |
898 | struct qe_frame *pframe; | |
899 | u8 framepid = 0; | |
900 | unsigned int fsize; | |
901 | u8 *cp; | |
902 | struct qe_req *req; | |
903 | ||
904 | pframe = ep->rxframe; | |
905 | ||
906 | if (frame_get_info(pframe) & PID_DATA1) | |
907 | framepid = 0x1; | |
908 | ||
909 | if (framepid != ep->data01) { | |
910 | dev_err(ep->udc->dev, "the data01 error!\n"); | |
911 | return -EIO; | |
912 | } | |
913 | ||
914 | fsize = frame_get_length(pframe); | |
915 | if (list_empty(&ep->queue)) { | |
916 | dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name); | |
917 | } else { | |
918 | req = list_entry(ep->queue.next, struct qe_req, queue); | |
919 | ||
920 | cp = (u8 *)(req->req.buf) + req->req.actual; | |
921 | if (cp) { | |
922 | memcpy(cp, pframe->data, fsize); | |
923 | req->req.actual += fsize; | |
924 | if ((fsize < ep->ep.maxpacket) || | |
925 | (req->req.actual >= req->req.length)) { | |
926 | if (ep->epnum == 0) | |
927 | ep0_req_complete(ep->udc, req); | |
928 | else | |
929 | done(ep, req, 0); | |
930 | if (list_empty(&ep->queue) && ep->epnum != 0) | |
931 | qe_eprx_nack(ep); | |
932 | } | |
933 | } | |
934 | } | |
935 | ||
936 | qe_ep_toggledata01(ep); | |
937 | ||
938 | return 0; | |
939 | } | |
940 | ||
941 | static void ep_rx_tasklet(unsigned long data) | |
942 | { | |
943 | struct qe_udc *udc = (struct qe_udc *)data; | |
944 | struct qe_ep *ep; | |
945 | struct qe_frame *pframe; | |
946 | struct qe_bd __iomem *bd; | |
947 | unsigned long flags; | |
948 | u32 bdstatus, length; | |
949 | u32 vaddr, i; | |
950 | ||
951 | spin_lock_irqsave(&udc->lock, flags); | |
952 | ||
953 | for (i = 1; i < USB_MAX_ENDPOINTS; i++) { | |
954 | ep = &udc->eps[i]; | |
955 | ||
956 | if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) { | |
957 | dev_dbg(udc->dev, | |
958 | "This is a transmit ep or disable tasklet!\n"); | |
959 | continue; | |
960 | } | |
961 | ||
962 | pframe = ep->rxframe; | |
963 | bd = ep->n_rxbd; | |
964 | bdstatus = in_be32((u32 __iomem *)bd); | |
965 | length = bdstatus & BD_LENGTH_MASK; | |
966 | ||
967 | while (!(bdstatus & R_E) && length) { | |
968 | if (list_empty(&ep->queue)) { | |
969 | qe_eprx_nack(ep); | |
970 | dev_dbg(udc->dev, | |
971 | "The rxep have noreq %d\n", | |
972 | ep->has_data); | |
973 | break; | |
974 | } | |
975 | ||
976 | if ((bdstatus & R_F) && (bdstatus & R_L) | |
977 | && !(bdstatus & R_ERROR)) { | |
978 | qe_frame_clean(pframe); | |
979 | vaddr = (u32)phys_to_virt(in_be32(&bd->buf)); | |
980 | frame_set_data(pframe, (u8 *)vaddr); | |
981 | frame_set_length(pframe, | |
982 | (length - USB_CRC_SIZE)); | |
983 | frame_set_status(pframe, FRAME_OK); | |
984 | switch (bdstatus & R_PID) { | |
985 | case R_PID_DATA1: | |
986 | frame_set_info(pframe, PID_DATA1); | |
987 | break; | |
988 | case R_PID_SETUP: | |
989 | frame_set_info(pframe, PID_SETUP); | |
990 | break; | |
991 | default: | |
992 | frame_set_info(pframe, PID_DATA0); | |
993 | break; | |
994 | } | |
995 | /* handle the rx frame */ | |
996 | qe_ep_rxframe_handle(ep); | |
997 | } else { | |
998 | dev_err(udc->dev, | |
999 | "error in received frame\n"); | |
1000 | } | |
1001 | /* note: don't clear the rxbd's buffer address */ | |
1002 | /*clear the length */ | |
1003 | out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK); | |
1004 | ep->has_data--; | |
1005 | if (!(ep->localnack)) | |
1006 | recycle_one_rxbd(ep); | |
1007 | ||
1008 | /* Get next BD */ | |
1009 | if (bdstatus & R_W) | |
1010 | bd = ep->rxbase; | |
1011 | else | |
1012 | bd++; | |
1013 | ||
1014 | bdstatus = in_be32((u32 __iomem *)bd); | |
1015 | length = bdstatus & BD_LENGTH_MASK; | |
1016 | } | |
1017 | ||
1018 | ep->n_rxbd = bd; | |
1019 | ||
1020 | if (ep->localnack) | |
1021 | ep_recycle_rxbds(ep); | |
1022 | ||
1023 | ep->enable_tasklet = 0; | |
1024 | } /* for i=1 */ | |
1025 | ||
1026 | spin_unlock_irqrestore(&udc->lock, flags); | |
1027 | } | |
1028 | ||
1029 | static int qe_ep_rx(struct qe_ep *ep) | |
1030 | { | |
1031 | struct qe_udc *udc; | |
1032 | struct qe_frame *pframe; | |
1033 | struct qe_bd __iomem *bd; | |
1034 | u16 swoffs, ucoffs, emptybds; | |
1035 | ||
1036 | udc = ep->udc; | |
1037 | pframe = ep->rxframe; | |
1038 | ||
1039 | if (ep->dir == USB_DIR_IN) { | |
1040 | dev_err(udc->dev, "transmit ep in rx function\n"); | |
1041 | return -EINVAL; | |
1042 | } | |
1043 | ||
1044 | bd = ep->n_rxbd; | |
1045 | ||
1046 | swoffs = (u16)(bd - ep->rxbase); | |
1047 | ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) - | |
1048 | in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3); | |
1049 | if (swoffs < ucoffs) | |
1050 | emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs; | |
1051 | else | |
1052 | emptybds = swoffs - ucoffs; | |
1053 | ||
1054 | if (emptybds < MIN_EMPTY_BDS) { | |
1055 | qe_eprx_nack(ep); | |
1056 | ep->localnack = 1; | |
1057 | dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds); | |
1058 | } | |
1059 | ep->has_data = USB_BDRING_LEN_RX - emptybds; | |
1060 | ||
1061 | if (list_empty(&ep->queue)) { | |
1062 | qe_eprx_nack(ep); | |
1063 | dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n", | |
1064 | ep->has_data); | |
1065 | return 0; | |
1066 | } | |
1067 | ||
1068 | tasklet_schedule(&udc->rx_tasklet); | |
1069 | ep->enable_tasklet = 1; | |
1070 | ||
1071 | return 0; | |
1072 | } | |
1073 | ||
1074 | /* send data from a frame, no matter what tx_req */ | |
1075 | static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame) | |
1076 | { | |
1077 | struct qe_udc *udc = ep->udc; | |
1078 | struct qe_bd __iomem *bd; | |
1079 | u16 saveusbmr; | |
1080 | u32 bdstatus, pidmask; | |
1081 | u32 paddr; | |
1082 | ||
1083 | if (ep->dir == USB_DIR_OUT) { | |
1084 | dev_err(udc->dev, "receive ep passed to tx function\n"); | |
1085 | return -EINVAL; | |
1086 | } | |
1087 | ||
1088 | /* Disable the Tx interrupt */ | |
1089 | saveusbmr = in_be16(&udc->usb_regs->usb_usbmr); | |
1090 | out_be16(&udc->usb_regs->usb_usbmr, | |
1091 | saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK)); | |
1092 | ||
1093 | bd = ep->n_txbd; | |
1094 | bdstatus = in_be32((u32 __iomem *)bd); | |
1095 | ||
1096 | if (!(bdstatus & (T_R | BD_LENGTH_MASK))) { | |
1097 | if (frame_get_length(frame) == 0) { | |
1098 | frame_set_data(frame, udc->nullbuf); | |
1099 | frame_set_length(frame, 2); | |
1100 | frame->info |= (ZLP | NO_CRC); | |
1101 | dev_vdbg(udc->dev, "the frame size = 0\n"); | |
1102 | } | |
1103 | paddr = virt_to_phys((void *)frame->data); | |
1104 | out_be32(&bd->buf, paddr); | |
1105 | bdstatus = (bdstatus&T_W); | |
1106 | if (!(frame_get_info(frame) & NO_CRC)) | |
1107 | bdstatus |= T_R | T_I | T_L | T_TC | |
1108 | | frame_get_length(frame); | |
1109 | else | |
1110 | bdstatus |= T_R | T_I | T_L | frame_get_length(frame); | |
1111 | ||
1112 | /* if the packet is a ZLP in status phase */ | |
1113 | if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP)) | |
1114 | ep->data01 = 0x1; | |
1115 | ||
1116 | if (ep->data01) { | |
1117 | pidmask = T_PID_DATA1; | |
1118 | frame->info |= PID_DATA1; | |
1119 | } else { | |
1120 | pidmask = T_PID_DATA0; | |
1121 | frame->info |= PID_DATA0; | |
1122 | } | |
1123 | bdstatus |= T_CNF; | |
1124 | bdstatus |= pidmask; | |
1125 | out_be32((u32 __iomem *)bd, bdstatus); | |
1126 | qe_ep_filltxfifo(ep); | |
1127 | ||
1128 | /* enable the TX interrupt */ | |
1129 | out_be16(&udc->usb_regs->usb_usbmr, saveusbmr); | |
1130 | ||
1131 | qe_ep_toggledata01(ep); | |
1132 | if (bdstatus & T_W) | |
1133 | ep->n_txbd = ep->txbase; | |
1134 | else | |
1135 | ep->n_txbd++; | |
1136 | ||
1137 | return 0; | |
1138 | } else { | |
1139 | out_be16(&udc->usb_regs->usb_usbmr, saveusbmr); | |
1140 | dev_vdbg(udc->dev, "The tx bd is not ready!\n"); | |
1141 | return -EBUSY; | |
1142 | } | |
1143 | } | |
1144 | ||
928dfa6c | 1145 | /* when a bd was transmitted, the function can |
3948f0e0 LY |
1146 | * handle the tx_req, not include ep0 */ |
1147 | static int txcomplete(struct qe_ep *ep, unsigned char restart) | |
1148 | { | |
1149 | if (ep->tx_req != NULL) { | |
1150 | if (!restart) { | |
1151 | int asent = ep->last; | |
1152 | ep->sent += asent; | |
1153 | ep->last -= asent; | |
1154 | } else { | |
1155 | ep->last = 0; | |
1156 | } | |
1157 | ||
1158 | /* a request already were transmitted completely */ | |
1159 | if ((ep->tx_req->req.length - ep->sent) <= 0) { | |
1160 | ep->tx_req->req.actual = (unsigned int)ep->sent; | |
1161 | done(ep, ep->tx_req, 0); | |
1162 | ep->tx_req = NULL; | |
1163 | ep->last = 0; | |
1164 | ep->sent = 0; | |
1165 | } | |
1166 | } | |
1167 | ||
1168 | /* we should gain a new tx_req fot this endpoint */ | |
1169 | if (ep->tx_req == NULL) { | |
1170 | if (!list_empty(&ep->queue)) { | |
1171 | ep->tx_req = list_entry(ep->queue.next, struct qe_req, | |
1172 | queue); | |
1173 | ep->last = 0; | |
1174 | ep->sent = 0; | |
1175 | } | |
1176 | } | |
1177 | ||
1178 | return 0; | |
1179 | } | |
1180 | ||
928dfa6c | 1181 | /* give a frame and a tx_req, send some data */ |
3948f0e0 LY |
1182 | static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame) |
1183 | { | |
1184 | unsigned int size; | |
1185 | u8 *buf; | |
1186 | ||
1187 | qe_frame_clean(frame); | |
1188 | size = min_t(u32, (ep->tx_req->req.length - ep->sent), | |
1189 | ep->ep.maxpacket); | |
1190 | buf = (u8 *)ep->tx_req->req.buf + ep->sent; | |
1191 | if (buf && size) { | |
1192 | ep->last = size; | |
1193 | frame_set_data(frame, buf); | |
1194 | frame_set_length(frame, size); | |
1195 | frame_set_status(frame, FRAME_OK); | |
1196 | frame_set_info(frame, 0); | |
1197 | return qe_ep_tx(ep, frame); | |
1198 | } | |
1199 | return -EIO; | |
1200 | } | |
1201 | ||
1202 | /* give a frame struct,send a ZLP */ | |
1203 | static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor) | |
1204 | { | |
1205 | struct qe_udc *udc = ep->udc; | |
1206 | ||
1207 | if (frame == NULL) | |
1208 | return -ENODEV; | |
1209 | ||
1210 | qe_frame_clean(frame); | |
1211 | frame_set_data(frame, (u8 *)udc->nullbuf); | |
1212 | frame_set_length(frame, 2); | |
1213 | frame_set_status(frame, FRAME_OK); | |
1214 | frame_set_info(frame, (ZLP | NO_CRC | infor)); | |
1215 | ||
1216 | return qe_ep_tx(ep, frame); | |
1217 | } | |
1218 | ||
1219 | static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame) | |
1220 | { | |
1221 | struct qe_req *req = ep->tx_req; | |
1222 | int reval; | |
1223 | ||
1224 | if (req == NULL) | |
1225 | return -ENODEV; | |
1226 | ||
1227 | if ((req->req.length - ep->sent) > 0) | |
1228 | reval = qe_usb_senddata(ep, frame); | |
1229 | else | |
1230 | reval = sendnulldata(ep, frame, 0); | |
1231 | ||
1232 | return reval; | |
1233 | } | |
1234 | ||
1235 | /* if direction is DIR_IN, the status is Device->Host | |
1236 | * if direction is DIR_OUT, the status transaction is Device<-Host | |
1237 | * in status phase, udc create a request and gain status */ | |
1238 | static int ep0_prime_status(struct qe_udc *udc, int direction) | |
1239 | { | |
1240 | ||
1241 | struct qe_ep *ep = &udc->eps[0]; | |
1242 | ||
1243 | if (direction == USB_DIR_IN) { | |
1244 | udc->ep0_state = DATA_STATE_NEED_ZLP; | |
1245 | udc->ep0_dir = USB_DIR_IN; | |
1246 | sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ); | |
1247 | } else { | |
1248 | udc->ep0_dir = USB_DIR_OUT; | |
1249 | udc->ep0_state = WAIT_FOR_OUT_STATUS; | |
1250 | } | |
1251 | ||
1252 | return 0; | |
1253 | } | |
1254 | ||
1255 | /* a request complete in ep0, whether gadget request or udc request */ | |
1256 | static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req) | |
1257 | { | |
1258 | struct qe_ep *ep = &udc->eps[0]; | |
1259 | /* because usb and ep's status already been set in ch9setaddress() */ | |
1260 | ||
1261 | switch (udc->ep0_state) { | |
1262 | case DATA_STATE_XMIT: | |
1263 | done(ep, req, 0); | |
1264 | /* receive status phase */ | |
1265 | if (ep0_prime_status(udc, USB_DIR_OUT)) | |
1266 | qe_ep0_stall(udc); | |
1267 | break; | |
1268 | ||
1269 | case DATA_STATE_NEED_ZLP: | |
1270 | done(ep, req, 0); | |
1271 | udc->ep0_state = WAIT_FOR_SETUP; | |
1272 | break; | |
1273 | ||
1274 | case DATA_STATE_RECV: | |
1275 | done(ep, req, 0); | |
1276 | /* send status phase */ | |
1277 | if (ep0_prime_status(udc, USB_DIR_IN)) | |
1278 | qe_ep0_stall(udc); | |
1279 | break; | |
1280 | ||
1281 | case WAIT_FOR_OUT_STATUS: | |
1282 | done(ep, req, 0); | |
1283 | udc->ep0_state = WAIT_FOR_SETUP; | |
1284 | break; | |
1285 | ||
1286 | case WAIT_FOR_SETUP: | |
1287 | dev_vdbg(udc->dev, "Unexpected interrupt\n"); | |
1288 | break; | |
1289 | ||
1290 | default: | |
1291 | qe_ep0_stall(udc); | |
1292 | break; | |
1293 | } | |
1294 | } | |
1295 | ||
1296 | static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart) | |
1297 | { | |
1298 | struct qe_req *tx_req = NULL; | |
1299 | struct qe_frame *frame = ep->txframe; | |
1300 | ||
1301 | if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) { | |
1302 | if (!restart) | |
1303 | ep->udc->ep0_state = WAIT_FOR_SETUP; | |
1304 | else | |
1305 | sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ); | |
1306 | return 0; | |
1307 | } | |
1308 | ||
1309 | tx_req = ep->tx_req; | |
1310 | if (tx_req != NULL) { | |
1311 | if (!restart) { | |
1312 | int asent = ep->last; | |
1313 | ep->sent += asent; | |
1314 | ep->last -= asent; | |
1315 | } else { | |
1316 | ep->last = 0; | |
1317 | } | |
1318 | ||
1319 | /* a request already were transmitted completely */ | |
1320 | if ((ep->tx_req->req.length - ep->sent) <= 0) { | |
1321 | ep->tx_req->req.actual = (unsigned int)ep->sent; | |
1322 | ep0_req_complete(ep->udc, ep->tx_req); | |
1323 | ep->tx_req = NULL; | |
1324 | ep->last = 0; | |
1325 | ep->sent = 0; | |
1326 | } | |
1327 | } else { | |
1328 | dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n"); | |
1329 | } | |
1330 | ||
1331 | return 0; | |
1332 | } | |
1333 | ||
1334 | static int ep0_txframe_handle(struct qe_ep *ep) | |
1335 | { | |
1336 | /* if have error, transmit again */ | |
1337 | if (frame_get_status(ep->txframe) & FRAME_ERROR) { | |
1338 | qe_ep_flushtxfifo(ep); | |
1339 | dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n"); | |
1340 | if (frame_get_info(ep->txframe) & PID_DATA0) | |
1341 | ep->data01 = 0; | |
1342 | else | |
1343 | ep->data01 = 1; | |
1344 | ||
1345 | ep0_txcomplete(ep, 1); | |
1346 | } else | |
1347 | ep0_txcomplete(ep, 0); | |
1348 | ||
1349 | frame_create_tx(ep, ep->txframe); | |
1350 | return 0; | |
1351 | } | |
1352 | ||
1353 | static int qe_ep0_txconf(struct qe_ep *ep) | |
1354 | { | |
1355 | struct qe_bd __iomem *bd; | |
1356 | struct qe_frame *pframe; | |
1357 | u32 bdstatus; | |
1358 | ||
1359 | bd = ep->c_txbd; | |
1360 | bdstatus = in_be32((u32 __iomem *)bd); | |
1361 | while (!(bdstatus & T_R) && (bdstatus & ~T_W)) { | |
1362 | pframe = ep->txframe; | |
1363 | ||
1364 | /* clear and recycle the BD */ | |
1365 | out_be32((u32 __iomem *)bd, bdstatus & T_W); | |
1366 | out_be32(&bd->buf, 0); | |
1367 | if (bdstatus & T_W) | |
1368 | ep->c_txbd = ep->txbase; | |
1369 | else | |
1370 | ep->c_txbd++; | |
1371 | ||
1372 | if (ep->c_txbd == ep->n_txbd) { | |
1373 | if (bdstatus & DEVICE_T_ERROR) { | |
1374 | frame_set_status(pframe, FRAME_ERROR); | |
1375 | if (bdstatus & T_TO) | |
1376 | pframe->status |= TX_ER_TIMEOUT; | |
1377 | if (bdstatus & T_UN) | |
1378 | pframe->status |= TX_ER_UNDERUN; | |
1379 | } | |
1380 | ep0_txframe_handle(ep); | |
1381 | } | |
1382 | ||
1383 | bd = ep->c_txbd; | |
1384 | bdstatus = in_be32((u32 __iomem *)bd); | |
1385 | } | |
1386 | ||
1387 | return 0; | |
1388 | } | |
1389 | ||
1390 | static int ep_txframe_handle(struct qe_ep *ep) | |
1391 | { | |
1392 | if (frame_get_status(ep->txframe) & FRAME_ERROR) { | |
1393 | qe_ep_flushtxfifo(ep); | |
1394 | dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n"); | |
1395 | if (frame_get_info(ep->txframe) & PID_DATA0) | |
1396 | ep->data01 = 0; | |
1397 | else | |
1398 | ep->data01 = 1; | |
1399 | ||
1400 | txcomplete(ep, 1); | |
1401 | } else | |
1402 | txcomplete(ep, 0); | |
1403 | ||
1404 | frame_create_tx(ep, ep->txframe); /* send the data */ | |
1405 | return 0; | |
1406 | } | |
1407 | ||
1408 | /* confirm the already trainsmited bd */ | |
1409 | static int qe_ep_txconf(struct qe_ep *ep) | |
1410 | { | |
1411 | struct qe_bd __iomem *bd; | |
1412 | struct qe_frame *pframe = NULL; | |
1413 | u32 bdstatus; | |
1414 | unsigned char breakonrxinterrupt = 0; | |
1415 | ||
1416 | bd = ep->c_txbd; | |
1417 | bdstatus = in_be32((u32 __iomem *)bd); | |
1418 | while (!(bdstatus & T_R) && (bdstatus & ~T_W)) { | |
1419 | pframe = ep->txframe; | |
1420 | if (bdstatus & DEVICE_T_ERROR) { | |
1421 | frame_set_status(pframe, FRAME_ERROR); | |
1422 | if (bdstatus & T_TO) | |
1423 | pframe->status |= TX_ER_TIMEOUT; | |
1424 | if (bdstatus & T_UN) | |
1425 | pframe->status |= TX_ER_UNDERUN; | |
1426 | } | |
1427 | ||
1428 | /* clear and recycle the BD */ | |
1429 | out_be32((u32 __iomem *)bd, bdstatus & T_W); | |
1430 | out_be32(&bd->buf, 0); | |
1431 | if (bdstatus & T_W) | |
1432 | ep->c_txbd = ep->txbase; | |
1433 | else | |
1434 | ep->c_txbd++; | |
1435 | ||
1436 | /* handle the tx frame */ | |
1437 | ep_txframe_handle(ep); | |
1438 | bd = ep->c_txbd; | |
1439 | bdstatus = in_be32((u32 __iomem *)bd); | |
1440 | } | |
1441 | if (breakonrxinterrupt) | |
1442 | return -EIO; | |
1443 | else | |
1444 | return 0; | |
1445 | } | |
1446 | ||
1447 | /* Add a request in queue, and try to transmit a packet */ | |
1448 | static int ep_req_send(struct qe_ep *ep, struct qe_req *req) | |
1449 | { | |
1450 | int reval = 0; | |
1451 | ||
1452 | if (ep->tx_req == NULL) { | |
1453 | ep->sent = 0; | |
1454 | ep->last = 0; | |
1455 | txcomplete(ep, 0); /* can gain a new tx_req */ | |
1456 | reval = frame_create_tx(ep, ep->txframe); | |
1457 | } | |
1458 | return reval; | |
1459 | } | |
1460 | ||
1461 | /* Maybe this is a good ideal */ | |
1462 | static int ep_req_rx(struct qe_ep *ep, struct qe_req *req) | |
1463 | { | |
1464 | struct qe_udc *udc = ep->udc; | |
1465 | struct qe_frame *pframe = NULL; | |
1466 | struct qe_bd __iomem *bd; | |
1467 | u32 bdstatus, length; | |
1468 | u32 vaddr, fsize; | |
1469 | u8 *cp; | |
1470 | u8 finish_req = 0; | |
1471 | u8 framepid; | |
1472 | ||
1473 | if (list_empty(&ep->queue)) { | |
1474 | dev_vdbg(udc->dev, "the req already finish!\n"); | |
1475 | return 0; | |
1476 | } | |
1477 | pframe = ep->rxframe; | |
1478 | ||
1479 | bd = ep->n_rxbd; | |
1480 | bdstatus = in_be32((u32 __iomem *)bd); | |
1481 | length = bdstatus & BD_LENGTH_MASK; | |
1482 | ||
1483 | while (!(bdstatus & R_E) && length) { | |
1484 | if (finish_req) | |
1485 | break; | |
1486 | if ((bdstatus & R_F) && (bdstatus & R_L) | |
1487 | && !(bdstatus & R_ERROR)) { | |
1488 | qe_frame_clean(pframe); | |
1489 | vaddr = (u32)phys_to_virt(in_be32(&bd->buf)); | |
1490 | frame_set_data(pframe, (u8 *)vaddr); | |
1491 | frame_set_length(pframe, (length - USB_CRC_SIZE)); | |
1492 | frame_set_status(pframe, FRAME_OK); | |
1493 | switch (bdstatus & R_PID) { | |
1494 | case R_PID_DATA1: | |
1495 | frame_set_info(pframe, PID_DATA1); break; | |
1496 | default: | |
1497 | frame_set_info(pframe, PID_DATA0); break; | |
1498 | } | |
1499 | /* handle the rx frame */ | |
1500 | ||
1501 | if (frame_get_info(pframe) & PID_DATA1) | |
1502 | framepid = 0x1; | |
1503 | else | |
1504 | framepid = 0; | |
1505 | ||
1506 | if (framepid != ep->data01) { | |
1507 | dev_vdbg(udc->dev, "the data01 error!\n"); | |
1508 | } else { | |
1509 | fsize = frame_get_length(pframe); | |
1510 | ||
1511 | cp = (u8 *)(req->req.buf) + req->req.actual; | |
1512 | if (cp) { | |
1513 | memcpy(cp, pframe->data, fsize); | |
1514 | req->req.actual += fsize; | |
1515 | if ((fsize < ep->ep.maxpacket) | |
1516 | || (req->req.actual >= | |
1517 | req->req.length)) { | |
1518 | finish_req = 1; | |
1519 | done(ep, req, 0); | |
1520 | if (list_empty(&ep->queue)) | |
1521 | qe_eprx_nack(ep); | |
1522 | } | |
1523 | } | |
1524 | qe_ep_toggledata01(ep); | |
1525 | } | |
1526 | } else { | |
1527 | dev_err(udc->dev, "The receive frame with error!\n"); | |
1528 | } | |
1529 | ||
1530 | /* note: don't clear the rxbd's buffer address * | |
1531 | * only Clear the length */ | |
1532 | out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK)); | |
1533 | ep->has_data--; | |
1534 | ||
1535 | /* Get next BD */ | |
1536 | if (bdstatus & R_W) | |
1537 | bd = ep->rxbase; | |
1538 | else | |
1539 | bd++; | |
1540 | ||
1541 | bdstatus = in_be32((u32 __iomem *)bd); | |
1542 | length = bdstatus & BD_LENGTH_MASK; | |
1543 | } | |
1544 | ||
1545 | ep->n_rxbd = bd; | |
1546 | ep_recycle_rxbds(ep); | |
1547 | ||
1548 | return 0; | |
1549 | } | |
1550 | ||
1551 | /* only add the request in queue */ | |
1552 | static int ep_req_receive(struct qe_ep *ep, struct qe_req *req) | |
1553 | { | |
1554 | if (ep->state == EP_STATE_NACK) { | |
1555 | if (ep->has_data <= 0) { | |
1556 | /* Enable rx and unmask rx interrupt */ | |
1557 | qe_eprx_normal(ep); | |
1558 | } else { | |
1559 | /* Copy the exist BD data */ | |
1560 | ep_req_rx(ep, req); | |
1561 | } | |
1562 | } | |
1563 | ||
1564 | return 0; | |
1565 | } | |
1566 | ||
1567 | /******************************************************************** | |
1568 | Internal Used Function End | |
1569 | ********************************************************************/ | |
1570 | ||
1571 | /*----------------------------------------------------------------------- | |
1572 | Endpoint Management Functions For Gadget | |
1573 | -----------------------------------------------------------------------*/ | |
1574 | static int qe_ep_enable(struct usb_ep *_ep, | |
1575 | const struct usb_endpoint_descriptor *desc) | |
1576 | { | |
1577 | struct qe_udc *udc; | |
1578 | struct qe_ep *ep; | |
1579 | int retval = 0; | |
1580 | unsigned char epnum; | |
1581 | ||
1582 | ep = container_of(_ep, struct qe_ep, ep); | |
1583 | ||
1584 | /* catch various bogus parameters */ | |
1585 | if (!_ep || !desc || ep->desc || _ep->name == ep_name[0] || | |
1586 | (desc->bDescriptorType != USB_DT_ENDPOINT)) | |
1587 | return -EINVAL; | |
1588 | ||
1589 | udc = ep->udc; | |
1590 | if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN)) | |
1591 | return -ESHUTDOWN; | |
1592 | ||
1593 | epnum = (u8)desc->bEndpointAddress & 0xF; | |
1594 | ||
1595 | retval = qe_ep_init(udc, epnum, desc); | |
1596 | if (retval != 0) { | |
1597 | cpm_muram_free(cpm_muram_offset(ep->rxbase)); | |
1598 | dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum); | |
1599 | return -EINVAL; | |
1600 | } | |
1601 | dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum); | |
1602 | return 0; | |
1603 | } | |
1604 | ||
1605 | static int qe_ep_disable(struct usb_ep *_ep) | |
1606 | { | |
1607 | struct qe_udc *udc; | |
1608 | struct qe_ep *ep; | |
1609 | unsigned long flags; | |
1610 | unsigned int size; | |
1611 | ||
1612 | ep = container_of(_ep, struct qe_ep, ep); | |
1613 | udc = ep->udc; | |
1614 | ||
1615 | if (!_ep || !ep->desc) { | |
1616 | dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL); | |
1617 | return -EINVAL; | |
1618 | } | |
1619 | ||
1620 | spin_lock_irqsave(&udc->lock, flags); | |
1621 | /* Nuke all pending requests (does flush) */ | |
1622 | nuke(ep, -ESHUTDOWN); | |
1623 | ep->desc = NULL; | |
1624 | ep->stopped = 1; | |
af3ddbd7 | 1625 | ep->tx_req = NULL; |
82341b36 | 1626 | qe_ep_reset(udc, ep->epnum); |
3948f0e0 LY |
1627 | spin_unlock_irqrestore(&udc->lock, flags); |
1628 | ||
1629 | cpm_muram_free(cpm_muram_offset(ep->rxbase)); | |
1630 | ||
1631 | if (ep->dir == USB_DIR_OUT) | |
1632 | size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * | |
1633 | (USB_BDRING_LEN_RX + 1); | |
1634 | else | |
1635 | size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * | |
1636 | (USB_BDRING_LEN + 1); | |
1637 | ||
1638 | if (ep->dir != USB_DIR_IN) { | |
1639 | kfree(ep->rxframe); | |
1640 | if (ep->rxbufmap) { | |
1641 | dma_unmap_single(udc_controller->gadget.dev.parent, | |
1642 | ep->rxbuf_d, size, | |
1643 | DMA_FROM_DEVICE); | |
1644 | ep->rxbuf_d = DMA_ADDR_INVALID; | |
1645 | } else { | |
1646 | dma_sync_single_for_cpu( | |
1647 | udc_controller->gadget.dev.parent, | |
1648 | ep->rxbuf_d, size, | |
1649 | DMA_FROM_DEVICE); | |
1650 | } | |
1651 | kfree(ep->rxbuffer); | |
1652 | } | |
1653 | ||
1654 | if (ep->dir != USB_DIR_OUT) | |
1655 | kfree(ep->txframe); | |
1656 | ||
1657 | dev_dbg(udc->dev, "disabled %s OK\n", _ep->name); | |
1658 | return 0; | |
1659 | } | |
1660 | ||
1661 | static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) | |
1662 | { | |
1663 | struct qe_req *req; | |
1664 | ||
1665 | req = kzalloc(sizeof(*req), gfp_flags); | |
1666 | if (!req) | |
1667 | return NULL; | |
1668 | ||
1669 | req->req.dma = DMA_ADDR_INVALID; | |
1670 | ||
1671 | INIT_LIST_HEAD(&req->queue); | |
1672 | ||
1673 | return &req->req; | |
1674 | } | |
1675 | ||
1676 | static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
1677 | { | |
1678 | struct qe_req *req; | |
1679 | ||
1680 | req = container_of(_req, struct qe_req, req); | |
1681 | ||
1682 | if (_req) | |
1683 | kfree(req); | |
1684 | } | |
1685 | ||
a30551db | 1686 | static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req) |
3948f0e0 LY |
1687 | { |
1688 | struct qe_ep *ep = container_of(_ep, struct qe_ep, ep); | |
1689 | struct qe_req *req = container_of(_req, struct qe_req, req); | |
1690 | struct qe_udc *udc; | |
3948f0e0 LY |
1691 | int reval; |
1692 | ||
1693 | udc = ep->udc; | |
1694 | /* catch various bogus parameters */ | |
1695 | if (!_req || !req->req.complete || !req->req.buf | |
1696 | || !list_empty(&req->queue)) { | |
1697 | dev_dbg(udc->dev, "bad params\n"); | |
1698 | return -EINVAL; | |
1699 | } | |
1700 | if (!_ep || (!ep->desc && ep_index(ep))) { | |
1701 | dev_dbg(udc->dev, "bad ep\n"); | |
1702 | return -EINVAL; | |
1703 | } | |
1704 | ||
1705 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) | |
1706 | return -ESHUTDOWN; | |
1707 | ||
1708 | req->ep = ep; | |
1709 | ||
1710 | /* map virtual address to hardware */ | |
1711 | if (req->req.dma == DMA_ADDR_INVALID) { | |
1712 | req->req.dma = dma_map_single(ep->udc->gadget.dev.parent, | |
1713 | req->req.buf, | |
1714 | req->req.length, | |
1715 | ep_is_in(ep) | |
1716 | ? DMA_TO_DEVICE : | |
1717 | DMA_FROM_DEVICE); | |
1718 | req->mapped = 1; | |
1719 | } else { | |
1720 | dma_sync_single_for_device(ep->udc->gadget.dev.parent, | |
1721 | req->req.dma, req->req.length, | |
1722 | ep_is_in(ep) | |
1723 | ? DMA_TO_DEVICE : | |
1724 | DMA_FROM_DEVICE); | |
1725 | req->mapped = 0; | |
1726 | } | |
1727 | ||
1728 | req->req.status = -EINPROGRESS; | |
1729 | req->req.actual = 0; | |
1730 | ||
1731 | list_add_tail(&req->queue, &ep->queue); | |
1732 | dev_vdbg(udc->dev, "gadget have request in %s! %d\n", | |
1733 | ep->name, req->req.length); | |
a30551db | 1734 | |
3948f0e0 LY |
1735 | /* push the request to device */ |
1736 | if (ep_is_in(ep)) | |
1737 | reval = ep_req_send(ep, req); | |
1738 | ||
1739 | /* EP0 */ | |
1740 | if (ep_index(ep) == 0 && req->req.length > 0) { | |
1741 | if (ep_is_in(ep)) | |
1742 | udc->ep0_state = DATA_STATE_XMIT; | |
1743 | else | |
1744 | udc->ep0_state = DATA_STATE_RECV; | |
1745 | } | |
1746 | ||
1747 | if (ep->dir == USB_DIR_OUT) | |
1748 | reval = ep_req_receive(ep, req); | |
1749 | ||
3948f0e0 LY |
1750 | return 0; |
1751 | } | |
1752 | ||
a30551db AV |
1753 | /* queues (submits) an I/O request to an endpoint */ |
1754 | static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req, | |
1755 | gfp_t gfp_flags) | |
1756 | { | |
1757 | struct qe_ep *ep = container_of(_ep, struct qe_ep, ep); | |
1758 | struct qe_udc *udc = ep->udc; | |
1759 | unsigned long flags; | |
1760 | int ret; | |
1761 | ||
1762 | spin_lock_irqsave(&udc->lock, flags); | |
1763 | ret = __qe_ep_queue(_ep, _req); | |
1764 | spin_unlock_irqrestore(&udc->lock, flags); | |
1765 | return ret; | |
1766 | } | |
1767 | ||
3948f0e0 LY |
1768 | /* dequeues (cancels, unlinks) an I/O request from an endpoint */ |
1769 | static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1770 | { | |
1771 | struct qe_ep *ep = container_of(_ep, struct qe_ep, ep); | |
1772 | struct qe_req *req; | |
1773 | unsigned long flags; | |
1774 | ||
1775 | if (!_ep || !_req) | |
1776 | return -EINVAL; | |
1777 | ||
1778 | spin_lock_irqsave(&ep->udc->lock, flags); | |
1779 | ||
1780 | /* make sure it's actually queued on this endpoint */ | |
1781 | list_for_each_entry(req, &ep->queue, queue) { | |
1782 | if (&req->req == _req) | |
1783 | break; | |
1784 | } | |
1785 | ||
1786 | if (&req->req != _req) { | |
1787 | spin_unlock_irqrestore(&ep->udc->lock, flags); | |
1788 | return -EINVAL; | |
1789 | } | |
1790 | ||
1791 | done(ep, req, -ECONNRESET); | |
1792 | ||
1793 | spin_unlock_irqrestore(&ep->udc->lock, flags); | |
1794 | return 0; | |
1795 | } | |
1796 | ||
1797 | /*----------------------------------------------------------------- | |
1798 | * modify the endpoint halt feature | |
1799 | * @ep: the non-isochronous endpoint being stalled | |
1800 | * @value: 1--set halt 0--clear halt | |
1801 | * Returns zero, or a negative error code. | |
1802 | *----------------------------------------------------------------*/ | |
1803 | static int qe_ep_set_halt(struct usb_ep *_ep, int value) | |
1804 | { | |
1805 | struct qe_ep *ep; | |
1806 | unsigned long flags; | |
1807 | int status = -EOPNOTSUPP; | |
1808 | struct qe_udc *udc; | |
1809 | ||
1810 | ep = container_of(_ep, struct qe_ep, ep); | |
1811 | if (!_ep || !ep->desc) { | |
1812 | status = -EINVAL; | |
1813 | goto out; | |
1814 | } | |
1815 | ||
3948f0e0 LY |
1816 | udc = ep->udc; |
1817 | /* Attempt to halt IN ep will fail if any transfer requests | |
1818 | * are still queue */ | |
1819 | if (value && ep_is_in(ep) && !list_empty(&ep->queue)) { | |
1820 | status = -EAGAIN; | |
1821 | goto out; | |
1822 | } | |
1823 | ||
1824 | status = 0; | |
1825 | spin_lock_irqsave(&ep->udc->lock, flags); | |
1826 | qe_eptx_stall_change(ep, value); | |
1827 | qe_eprx_stall_change(ep, value); | |
1828 | spin_unlock_irqrestore(&ep->udc->lock, flags); | |
1829 | ||
1830 | if (ep->epnum == 0) { | |
1831 | udc->ep0_state = WAIT_FOR_SETUP; | |
1832 | udc->ep0_dir = 0; | |
1833 | } | |
15d5a9ac LY |
1834 | |
1835 | /* set data toggle to DATA0 on clear halt */ | |
1836 | if (value == 0) | |
1837 | ep->data01 = 0; | |
3948f0e0 | 1838 | out: |
928dfa6c | 1839 | dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name, |
3948f0e0 LY |
1840 | value ? "set" : "clear", status); |
1841 | ||
1842 | return status; | |
1843 | } | |
1844 | ||
1845 | static struct usb_ep_ops qe_ep_ops = { | |
1846 | .enable = qe_ep_enable, | |
1847 | .disable = qe_ep_disable, | |
1848 | ||
1849 | .alloc_request = qe_alloc_request, | |
1850 | .free_request = qe_free_request, | |
1851 | ||
1852 | .queue = qe_ep_queue, | |
1853 | .dequeue = qe_ep_dequeue, | |
1854 | ||
1855 | .set_halt = qe_ep_set_halt, | |
1856 | }; | |
1857 | ||
1858 | /*------------------------------------------------------------------------ | |
1859 | Gadget Driver Layer Operations | |
1860 | ------------------------------------------------------------------------*/ | |
1861 | ||
1862 | /* Get the current frame number */ | |
1863 | static int qe_get_frame(struct usb_gadget *gadget) | |
1864 | { | |
1865 | u16 tmp; | |
1866 | ||
1867 | tmp = in_be16(&udc_controller->usb_param->frame_n); | |
1868 | if (tmp & 0x8000) | |
1869 | tmp = tmp & 0x07ff; | |
1870 | else | |
1871 | tmp = -EINVAL; | |
1872 | ||
1873 | return (int)tmp; | |
1874 | } | |
1875 | ||
1876 | /* Tries to wake up the host connected to this gadget | |
1877 | * | |
1878 | * Return : 0-success | |
1879 | * Negative-this feature not enabled by host or not supported by device hw | |
1880 | */ | |
1881 | static int qe_wakeup(struct usb_gadget *gadget) | |
1882 | { | |
1883 | return -ENOTSUPP; | |
1884 | } | |
1885 | ||
1886 | /* Notify controller that VBUS is powered, Called by whatever | |
1887 | detects VBUS sessions */ | |
1888 | static int qe_vbus_session(struct usb_gadget *gadget, int is_active) | |
1889 | { | |
1890 | return -ENOTSUPP; | |
1891 | } | |
1892 | ||
1893 | /* constrain controller's VBUS power usage | |
1894 | * This call is used by gadget drivers during SET_CONFIGURATION calls, | |
1895 | * reporting how much power the device may consume. For example, this | |
1896 | * could affect how quickly batteries are recharged. | |
1897 | * | |
1898 | * Returns zero on success, else negative errno. | |
1899 | */ | |
1900 | static int qe_vbus_draw(struct usb_gadget *gadget, unsigned mA) | |
1901 | { | |
1902 | return -ENOTSUPP; | |
1903 | } | |
1904 | ||
1905 | /* Change Data+ pullup status | |
1906 | * this func is used by usb_gadget_connect/disconnect | |
1907 | */ | |
1908 | static int qe_pullup(struct usb_gadget *gadget, int is_on) | |
1909 | { | |
1910 | return -ENOTSUPP; | |
1911 | } | |
1912 | ||
1913 | /* defined in usb_gadget.h */ | |
1914 | static struct usb_gadget_ops qe_gadget_ops = { | |
1915 | .get_frame = qe_get_frame, | |
1916 | .wakeup = qe_wakeup, | |
1917 | /* .set_selfpowered = qe_set_selfpowered,*/ /* always selfpowered */ | |
1918 | .vbus_session = qe_vbus_session, | |
1919 | .vbus_draw = qe_vbus_draw, | |
1920 | .pullup = qe_pullup, | |
1921 | }; | |
1922 | ||
1923 | /*------------------------------------------------------------------------- | |
1924 | USB ep0 Setup process in BUS Enumeration | |
1925 | -------------------------------------------------------------------------*/ | |
1926 | static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe) | |
1927 | { | |
1928 | struct qe_ep *ep = &udc->eps[pipe]; | |
1929 | ||
1930 | nuke(ep, -ECONNRESET); | |
1931 | ep->tx_req = NULL; | |
1932 | return 0; | |
1933 | } | |
1934 | ||
1935 | static int reset_queues(struct qe_udc *udc) | |
1936 | { | |
1937 | u8 pipe; | |
1938 | ||
1939 | for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++) | |
1940 | udc_reset_ep_queue(udc, pipe); | |
1941 | ||
1942 | /* report disconnect; the driver is already quiesced */ | |
1943 | spin_unlock(&udc->lock); | |
1944 | udc->driver->disconnect(&udc->gadget); | |
1945 | spin_lock(&udc->lock); | |
1946 | ||
1947 | return 0; | |
1948 | } | |
1949 | ||
1950 | static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index, | |
1951 | u16 length) | |
1952 | { | |
1953 | /* Save the new address to device struct */ | |
1954 | udc->device_address = (u8) value; | |
1955 | /* Update usb state */ | |
1956 | udc->usb_state = USB_STATE_ADDRESS; | |
1957 | ||
1958 | /* Status phase , send a ZLP */ | |
1959 | if (ep0_prime_status(udc, USB_DIR_IN)) | |
1960 | qe_ep0_stall(udc); | |
1961 | } | |
1962 | ||
1963 | static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req) | |
1964 | { | |
1965 | struct qe_req *req = container_of(_req, struct qe_req, req); | |
1966 | ||
1967 | req->req.buf = NULL; | |
1968 | kfree(req); | |
1969 | } | |
1970 | ||
928dfa6c LY |
1971 | static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value, |
1972 | u16 index, u16 length) | |
3948f0e0 | 1973 | { |
928dfa6c | 1974 | u16 usb_status = 0; |
3948f0e0 LY |
1975 | struct qe_req *req; |
1976 | struct qe_ep *ep; | |
1977 | int status = 0; | |
1978 | ||
1979 | ep = &udc->eps[0]; | |
928dfa6c LY |
1980 | if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) { |
1981 | /* Get device status */ | |
1982 | usb_status = 1 << USB_DEVICE_SELF_POWERED; | |
1983 | } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) { | |
1984 | /* Get interface status */ | |
1985 | /* We don't have interface information in udc driver */ | |
1986 | usb_status = 0; | |
1987 | } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) { | |
1988 | /* Get endpoint status */ | |
1989 | int pipe = index & USB_ENDPOINT_NUMBER_MASK; | |
1990 | struct qe_ep *target_ep = &udc->eps[pipe]; | |
1991 | u16 usep; | |
1992 | ||
1993 | /* stall if endpoint doesn't exist */ | |
1994 | if (!target_ep->desc) | |
1995 | goto stall; | |
1996 | ||
1997 | usep = in_be16(&udc->usb_regs->usb_usep[pipe]); | |
1998 | if (index & USB_DIR_IN) { | |
1999 | if (target_ep->dir != USB_DIR_IN) | |
2000 | goto stall; | |
2001 | if ((usep & USB_THS_MASK) == USB_THS_STALL) | |
2002 | usb_status = 1 << USB_ENDPOINT_HALT; | |
2003 | } else { | |
2004 | if (target_ep->dir != USB_DIR_OUT) | |
2005 | goto stall; | |
2006 | if ((usep & USB_RHS_MASK) == USB_RHS_STALL) | |
2007 | usb_status = 1 << USB_ENDPOINT_HALT; | |
2008 | } | |
2009 | } | |
3948f0e0 LY |
2010 | |
2011 | req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL), | |
2012 | struct qe_req, req); | |
2013 | req->req.length = 2; | |
928dfa6c LY |
2014 | req->req.buf = udc->statusbuf; |
2015 | *(u16 *)req->req.buf = cpu_to_le16(usb_status); | |
3948f0e0 LY |
2016 | req->req.status = -EINPROGRESS; |
2017 | req->req.actual = 0; | |
2018 | req->req.complete = ownercomplete; | |
2019 | ||
2020 | udc->ep0_dir = USB_DIR_IN; | |
2021 | ||
2022 | /* data phase */ | |
a30551db | 2023 | status = __qe_ep_queue(&ep->ep, &req->req); |
3948f0e0 | 2024 | |
928dfa6c LY |
2025 | if (status == 0) |
2026 | return; | |
2027 | stall: | |
2028 | dev_err(udc->dev, "Can't respond to getstatus request \n"); | |
2029 | qe_ep0_stall(udc); | |
3948f0e0 LY |
2030 | } |
2031 | ||
2032 | /* only handle the setup request, suppose the device in normal status */ | |
2033 | static void setup_received_handle(struct qe_udc *udc, | |
2034 | struct usb_ctrlrequest *setup) | |
2035 | { | |
2036 | /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/ | |
2037 | u16 wValue = le16_to_cpu(setup->wValue); | |
2038 | u16 wIndex = le16_to_cpu(setup->wIndex); | |
2039 | u16 wLength = le16_to_cpu(setup->wLength); | |
2040 | ||
2041 | /* clear the previous request in the ep0 */ | |
2042 | udc_reset_ep_queue(udc, 0); | |
2043 | ||
2044 | if (setup->bRequestType & USB_DIR_IN) | |
2045 | udc->ep0_dir = USB_DIR_IN; | |
2046 | else | |
2047 | udc->ep0_dir = USB_DIR_OUT; | |
2048 | ||
2049 | switch (setup->bRequest) { | |
2050 | case USB_REQ_GET_STATUS: | |
2051 | /* Data+Status phase form udc */ | |
2052 | if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK)) | |
2053 | != (USB_DIR_IN | USB_TYPE_STANDARD)) | |
2054 | break; | |
928dfa6c LY |
2055 | ch9getstatus(udc, setup->bRequestType, wValue, wIndex, |
2056 | wLength); | |
3948f0e0 LY |
2057 | return; |
2058 | ||
2059 | case USB_REQ_SET_ADDRESS: | |
2060 | /* Status phase from udc */ | |
2061 | if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD | | |
2062 | USB_RECIP_DEVICE)) | |
2063 | break; | |
2064 | ch9setaddress(udc, wValue, wIndex, wLength); | |
2065 | return; | |
2066 | ||
2067 | case USB_REQ_CLEAR_FEATURE: | |
2068 | case USB_REQ_SET_FEATURE: | |
2069 | /* Requests with no data phase, status phase from udc */ | |
928dfa6c | 2070 | if ((setup->bRequestType & USB_TYPE_MASK) |
3948f0e0 LY |
2071 | != USB_TYPE_STANDARD) |
2072 | break; | |
2073 | ||
2074 | if ((setup->bRequestType & USB_RECIP_MASK) | |
2075 | == USB_RECIP_ENDPOINT) { | |
2076 | int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK; | |
2077 | struct qe_ep *ep; | |
2078 | ||
2079 | if (wValue != 0 || wLength != 0 | |
2080 | || pipe > USB_MAX_ENDPOINTS) | |
2081 | break; | |
2082 | ep = &udc->eps[pipe]; | |
2083 | ||
2084 | spin_unlock(&udc->lock); | |
2085 | qe_ep_set_halt(&ep->ep, | |
2086 | (setup->bRequest == USB_REQ_SET_FEATURE) | |
2087 | ? 1 : 0); | |
2088 | spin_lock(&udc->lock); | |
2089 | } | |
2090 | ||
2091 | ep0_prime_status(udc, USB_DIR_IN); | |
2092 | ||
2093 | return; | |
2094 | ||
2095 | default: | |
2096 | break; | |
2097 | } | |
2098 | ||
2099 | if (wLength) { | |
2100 | /* Data phase from gadget, status phase from udc */ | |
2101 | if (setup->bRequestType & USB_DIR_IN) { | |
2102 | udc->ep0_state = DATA_STATE_XMIT; | |
2103 | udc->ep0_dir = USB_DIR_IN; | |
928dfa6c | 2104 | } else { |
3948f0e0 LY |
2105 | udc->ep0_state = DATA_STATE_RECV; |
2106 | udc->ep0_dir = USB_DIR_OUT; | |
2107 | } | |
2108 | spin_unlock(&udc->lock); | |
2109 | if (udc->driver->setup(&udc->gadget, | |
2110 | &udc->local_setup_buff) < 0) | |
2111 | qe_ep0_stall(udc); | |
2112 | spin_lock(&udc->lock); | |
2113 | } else { | |
2114 | /* No data phase, IN status from gadget */ | |
2115 | udc->ep0_dir = USB_DIR_IN; | |
2116 | spin_unlock(&udc->lock); | |
2117 | if (udc->driver->setup(&udc->gadget, | |
2118 | &udc->local_setup_buff) < 0) | |
2119 | qe_ep0_stall(udc); | |
2120 | spin_lock(&udc->lock); | |
2121 | udc->ep0_state = DATA_STATE_NEED_ZLP; | |
2122 | } | |
2123 | } | |
2124 | ||
2125 | /*------------------------------------------------------------------------- | |
2126 | USB Interrupt handlers | |
2127 | -------------------------------------------------------------------------*/ | |
2128 | static void suspend_irq(struct qe_udc *udc) | |
2129 | { | |
2130 | udc->resume_state = udc->usb_state; | |
2131 | udc->usb_state = USB_STATE_SUSPENDED; | |
2132 | ||
2133 | /* report suspend to the driver ,serial.c not support this*/ | |
2134 | if (udc->driver->suspend) | |
2135 | udc->driver->suspend(&udc->gadget); | |
2136 | } | |
2137 | ||
2138 | static void resume_irq(struct qe_udc *udc) | |
2139 | { | |
2140 | udc->usb_state = udc->resume_state; | |
2141 | udc->resume_state = 0; | |
2142 | ||
2143 | /* report resume to the driver , serial.c not support this*/ | |
2144 | if (udc->driver->resume) | |
2145 | udc->driver->resume(&udc->gadget); | |
2146 | } | |
2147 | ||
2148 | static void idle_irq(struct qe_udc *udc) | |
2149 | { | |
2150 | u8 usbs; | |
2151 | ||
2152 | usbs = in_8(&udc->usb_regs->usb_usbs); | |
2153 | if (usbs & USB_IDLE_STATUS_MASK) { | |
2154 | if ((udc->usb_state) != USB_STATE_SUSPENDED) | |
2155 | suspend_irq(udc); | |
2156 | } else { | |
2157 | if (udc->usb_state == USB_STATE_SUSPENDED) | |
2158 | resume_irq(udc); | |
2159 | } | |
2160 | } | |
2161 | ||
2162 | static int reset_irq(struct qe_udc *udc) | |
2163 | { | |
2164 | unsigned char i; | |
2165 | ||
ef84e405 AV |
2166 | if (udc->usb_state == USB_STATE_DEFAULT) |
2167 | return 0; | |
2168 | ||
3948f0e0 LY |
2169 | qe_usb_disable(); |
2170 | out_8(&udc->usb_regs->usb_usadr, 0); | |
2171 | ||
2172 | for (i = 0; i < USB_MAX_ENDPOINTS; i++) { | |
2173 | if (udc->eps[i].init) | |
2174 | qe_ep_reset(udc, i); | |
2175 | } | |
2176 | ||
2177 | reset_queues(udc); | |
2178 | udc->usb_state = USB_STATE_DEFAULT; | |
2179 | udc->ep0_state = WAIT_FOR_SETUP; | |
2180 | udc->ep0_dir = USB_DIR_OUT; | |
2181 | qe_usb_enable(); | |
2182 | return 0; | |
2183 | } | |
2184 | ||
2185 | static int bsy_irq(struct qe_udc *udc) | |
2186 | { | |
2187 | return 0; | |
2188 | } | |
2189 | ||
2190 | static int txe_irq(struct qe_udc *udc) | |
2191 | { | |
2192 | return 0; | |
2193 | } | |
2194 | ||
2195 | /* ep0 tx interrupt also in here */ | |
2196 | static int tx_irq(struct qe_udc *udc) | |
2197 | { | |
2198 | struct qe_ep *ep; | |
2199 | struct qe_bd __iomem *bd; | |
2200 | int i, res = 0; | |
2201 | ||
2202 | if ((udc->usb_state == USB_STATE_ADDRESS) | |
2203 | && (in_8(&udc->usb_regs->usb_usadr) == 0)) | |
2204 | out_8(&udc->usb_regs->usb_usadr, udc->device_address); | |
2205 | ||
2206 | for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) { | |
2207 | ep = &udc->eps[i]; | |
2208 | if (ep && ep->init && (ep->dir != USB_DIR_OUT)) { | |
2209 | bd = ep->c_txbd; | |
2210 | if (!(in_be32((u32 __iomem *)bd) & T_R) | |
2211 | && (in_be32(&bd->buf))) { | |
928dfa6c | 2212 | /* confirm the transmitted bd */ |
3948f0e0 LY |
2213 | if (ep->epnum == 0) |
2214 | res = qe_ep0_txconf(ep); | |
2215 | else | |
2216 | res = qe_ep_txconf(ep); | |
3948f0e0 LY |
2217 | } |
2218 | } | |
2219 | } | |
2220 | return res; | |
2221 | } | |
2222 | ||
2223 | ||
2224 | /* setup packect's rx is handle in the function too */ | |
2225 | static void rx_irq(struct qe_udc *udc) | |
2226 | { | |
2227 | struct qe_ep *ep; | |
2228 | struct qe_bd __iomem *bd; | |
2229 | int i; | |
2230 | ||
2231 | for (i = 0; i < USB_MAX_ENDPOINTS; i++) { | |
2232 | ep = &udc->eps[i]; | |
2233 | if (ep && ep->init && (ep->dir != USB_DIR_IN)) { | |
2234 | bd = ep->n_rxbd; | |
2235 | if (!(in_be32((u32 __iomem *)bd) & R_E) | |
2236 | && (in_be32(&bd->buf))) { | |
2237 | if (ep->epnum == 0) { | |
2238 | qe_ep0_rx(udc); | |
2239 | } else { | |
2240 | /*non-setup package receive*/ | |
2241 | qe_ep_rx(ep); | |
2242 | } | |
2243 | } | |
2244 | } | |
2245 | } | |
2246 | } | |
2247 | ||
2248 | static irqreturn_t qe_udc_irq(int irq, void *_udc) | |
2249 | { | |
2250 | struct qe_udc *udc = (struct qe_udc *)_udc; | |
2251 | u16 irq_src; | |
2252 | irqreturn_t status = IRQ_NONE; | |
2253 | unsigned long flags; | |
2254 | ||
3948f0e0 LY |
2255 | spin_lock_irqsave(&udc->lock, flags); |
2256 | ||
2257 | irq_src = in_be16(&udc->usb_regs->usb_usber) & | |
2258 | in_be16(&udc->usb_regs->usb_usbmr); | |
2259 | /* Clear notification bits */ | |
2260 | out_be16(&udc->usb_regs->usb_usber, irq_src); | |
2261 | /* USB Interrupt */ | |
2262 | if (irq_src & USB_E_IDLE_MASK) { | |
2263 | idle_irq(udc); | |
2264 | irq_src &= ~USB_E_IDLE_MASK; | |
2265 | status = IRQ_HANDLED; | |
2266 | } | |
2267 | ||
2268 | if (irq_src & USB_E_TXB_MASK) { | |
2269 | tx_irq(udc); | |
2270 | irq_src &= ~USB_E_TXB_MASK; | |
2271 | status = IRQ_HANDLED; | |
2272 | } | |
2273 | ||
2274 | if (irq_src & USB_E_RXB_MASK) { | |
2275 | rx_irq(udc); | |
2276 | irq_src &= ~USB_E_RXB_MASK; | |
2277 | status = IRQ_HANDLED; | |
2278 | } | |
2279 | ||
2280 | if (irq_src & USB_E_RESET_MASK) { | |
2281 | reset_irq(udc); | |
2282 | irq_src &= ~USB_E_RESET_MASK; | |
2283 | status = IRQ_HANDLED; | |
2284 | } | |
2285 | ||
2286 | if (irq_src & USB_E_BSY_MASK) { | |
2287 | bsy_irq(udc); | |
2288 | irq_src &= ~USB_E_BSY_MASK; | |
2289 | status = IRQ_HANDLED; | |
2290 | } | |
2291 | ||
2292 | if (irq_src & USB_E_TXE_MASK) { | |
2293 | txe_irq(udc); | |
2294 | irq_src &= ~USB_E_TXE_MASK; | |
2295 | status = IRQ_HANDLED; | |
2296 | } | |
2297 | ||
2298 | spin_unlock_irqrestore(&udc->lock, flags); | |
2299 | ||
2300 | return status; | |
2301 | } | |
2302 | ||
2303 | /*------------------------------------------------------------------------- | |
2304 | Gadget driver register and unregister. | |
2305 | --------------------------------------------------------------------------*/ | |
2306 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | |
2307 | { | |
2308 | int retval; | |
2309 | unsigned long flags = 0; | |
2310 | ||
2311 | /* standard operations */ | |
2312 | if (!udc_controller) | |
2313 | return -ENODEV; | |
2314 | ||
2315 | if (!driver || (driver->speed != USB_SPEED_FULL | |
2316 | && driver->speed != USB_SPEED_HIGH) | |
2317 | || !driver->bind || !driver->disconnect | |
2318 | || !driver->setup) | |
2319 | return -EINVAL; | |
2320 | ||
2321 | if (udc_controller->driver) | |
2322 | return -EBUSY; | |
2323 | ||
2324 | /* lock is needed but whether should use this lock or another */ | |
2325 | spin_lock_irqsave(&udc_controller->lock, flags); | |
2326 | ||
2327 | driver->driver.bus = NULL; | |
2328 | /* hook up the driver */ | |
2329 | udc_controller->driver = driver; | |
2330 | udc_controller->gadget.dev.driver = &driver->driver; | |
2331 | udc_controller->gadget.speed = (enum usb_device_speed)(driver->speed); | |
2332 | spin_unlock_irqrestore(&udc_controller->lock, flags); | |
2333 | ||
2334 | retval = driver->bind(&udc_controller->gadget); | |
2335 | if (retval) { | |
2336 | dev_err(udc_controller->dev, "bind to %s --> %d", | |
2337 | driver->driver.name, retval); | |
2338 | udc_controller->gadget.dev.driver = NULL; | |
2339 | udc_controller->driver = NULL; | |
2340 | return retval; | |
2341 | } | |
2342 | ||
2343 | /* Enable IRQ reg and Set usbcmd reg EN bit */ | |
2344 | qe_usb_enable(); | |
2345 | ||
2346 | out_be16(&udc_controller->usb_regs->usb_usber, 0xffff); | |
2347 | out_be16(&udc_controller->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE); | |
2348 | udc_controller->usb_state = USB_STATE_ATTACHED; | |
2349 | udc_controller->ep0_state = WAIT_FOR_SETUP; | |
2350 | udc_controller->ep0_dir = USB_DIR_OUT; | |
2351 | dev_info(udc_controller->dev, "%s bind to driver %s \n", | |
2352 | udc_controller->gadget.name, driver->driver.name); | |
2353 | return 0; | |
2354 | } | |
2355 | EXPORT_SYMBOL(usb_gadget_register_driver); | |
2356 | ||
2357 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |
2358 | { | |
2359 | struct qe_ep *loop_ep; | |
2360 | unsigned long flags; | |
2361 | ||
2362 | if (!udc_controller) | |
2363 | return -ENODEV; | |
2364 | ||
2365 | if (!driver || driver != udc_controller->driver) | |
2366 | return -EINVAL; | |
2367 | ||
2368 | /* stop usb controller, disable intr */ | |
2369 | qe_usb_disable(); | |
2370 | ||
2371 | /* in fact, no needed */ | |
2372 | udc_controller->usb_state = USB_STATE_ATTACHED; | |
2373 | udc_controller->ep0_state = WAIT_FOR_SETUP; | |
2374 | udc_controller->ep0_dir = 0; | |
2375 | ||
2376 | /* stand operation */ | |
2377 | spin_lock_irqsave(&udc_controller->lock, flags); | |
2378 | udc_controller->gadget.speed = USB_SPEED_UNKNOWN; | |
2379 | nuke(&udc_controller->eps[0], -ESHUTDOWN); | |
2380 | list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list, | |
2381 | ep.ep_list) | |
2382 | nuke(loop_ep, -ESHUTDOWN); | |
2383 | spin_unlock_irqrestore(&udc_controller->lock, flags); | |
2384 | ||
9ac36da3 AV |
2385 | /* report disconnect; the controller is already quiesced */ |
2386 | driver->disconnect(&udc_controller->gadget); | |
2387 | ||
3948f0e0 LY |
2388 | /* unbind gadget and unhook driver. */ |
2389 | driver->unbind(&udc_controller->gadget); | |
2390 | udc_controller->gadget.dev.driver = NULL; | |
2391 | udc_controller->driver = NULL; | |
2392 | ||
2393 | dev_info(udc_controller->dev, "unregistered gadget driver '%s'\r\n", | |
2394 | driver->driver.name); | |
2395 | return 0; | |
2396 | } | |
2397 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | |
2398 | ||
2399 | /* udc structure's alloc and setup, include ep-param alloc */ | |
2400 | static struct qe_udc __devinit *qe_udc_config(struct of_device *ofdev) | |
2401 | { | |
2402 | struct qe_udc *udc; | |
2403 | struct device_node *np = ofdev->node; | |
2404 | unsigned int tmp_addr = 0; | |
2405 | struct usb_device_para __iomem *usbpram; | |
2406 | unsigned int i; | |
2407 | u64 size; | |
2408 | u32 offset; | |
2409 | ||
2410 | udc = kzalloc(sizeof(*udc), GFP_KERNEL); | |
2411 | if (udc == NULL) { | |
2412 | dev_err(&ofdev->dev, "malloc udc failed\n"); | |
2413 | goto cleanup; | |
2414 | } | |
2415 | ||
2416 | udc->dev = &ofdev->dev; | |
2417 | ||
2418 | /* get default address of usb parameter in MURAM from device tree */ | |
2419 | offset = *of_get_address(np, 1, &size, NULL); | |
2420 | udc->usb_param = cpm_muram_addr(offset); | |
2421 | memset_io(udc->usb_param, 0, size); | |
2422 | ||
2423 | usbpram = udc->usb_param; | |
2424 | out_be16(&usbpram->frame_n, 0); | |
2425 | out_be32(&usbpram->rstate, 0); | |
2426 | ||
2427 | tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS * | |
2428 | sizeof(struct usb_ep_para)), | |
2429 | USB_EP_PARA_ALIGNMENT); | |
cd40c4c4 AV |
2430 | if (IS_ERR_VALUE(tmp_addr)) |
2431 | goto cleanup; | |
3948f0e0 LY |
2432 | |
2433 | for (i = 0; i < USB_MAX_ENDPOINTS; i++) { | |
2434 | out_be16(&usbpram->epptr[i], (u16)tmp_addr); | |
2435 | udc->ep_param[i] = cpm_muram_addr(tmp_addr); | |
2436 | tmp_addr += 32; | |
2437 | } | |
2438 | ||
2439 | memset_io(udc->ep_param[0], 0, | |
2440 | USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para)); | |
2441 | ||
2442 | udc->resume_state = USB_STATE_NOTATTACHED; | |
2443 | udc->usb_state = USB_STATE_POWERED; | |
2444 | udc->ep0_dir = 0; | |
2445 | ||
2446 | spin_lock_init(&udc->lock); | |
2447 | return udc; | |
2448 | ||
2449 | cleanup: | |
2450 | kfree(udc); | |
2451 | return NULL; | |
2452 | } | |
2453 | ||
2454 | /* USB Controller register init */ | |
2455 | static int __devinit qe_udc_reg_init(struct qe_udc *udc) | |
2456 | { | |
2457 | struct usb_ctlr __iomem *qe_usbregs; | |
2458 | qe_usbregs = udc->usb_regs; | |
2459 | ||
2247818a | 2460 | /* Spec says that we must enable the USB controller to change mode. */ |
3948f0e0 | 2461 | out_8(&qe_usbregs->usb_usmod, 0x01); |
2247818a AV |
2462 | /* Mode changed, now disable it, since muram isn't initialized yet. */ |
2463 | out_8(&qe_usbregs->usb_usmod, 0x00); | |
2464 | ||
2465 | /* Initialize the rest. */ | |
3948f0e0 LY |
2466 | out_be16(&qe_usbregs->usb_usbmr, 0); |
2467 | out_8(&qe_usbregs->usb_uscom, 0); | |
2468 | out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR); | |
2469 | ||
2470 | return 0; | |
2471 | } | |
2472 | ||
2473 | static int __devinit qe_ep_config(struct qe_udc *udc, unsigned char pipe_num) | |
2474 | { | |
2475 | struct qe_ep *ep = &udc->eps[pipe_num]; | |
2476 | ||
2477 | ep->udc = udc; | |
2478 | strcpy(ep->name, ep_name[pipe_num]); | |
2479 | ep->ep.name = ep_name[pipe_num]; | |
2480 | ||
2481 | ep->ep.ops = &qe_ep_ops; | |
2482 | ep->stopped = 1; | |
2483 | ep->ep.maxpacket = (unsigned short) ~0; | |
2484 | ep->desc = NULL; | |
2485 | ep->dir = 0xff; | |
2486 | ep->epnum = (u8)pipe_num; | |
2487 | ep->sent = 0; | |
2488 | ep->last = 0; | |
2489 | ep->init = 0; | |
2490 | ep->rxframe = NULL; | |
2491 | ep->txframe = NULL; | |
2492 | ep->tx_req = NULL; | |
2493 | ep->state = EP_STATE_IDLE; | |
2494 | ep->has_data = 0; | |
2495 | ||
2496 | /* the queue lists any req for this ep */ | |
2497 | INIT_LIST_HEAD(&ep->queue); | |
2498 | ||
2499 | /* gagdet.ep_list used for ep_autoconfig so no ep0*/ | |
2500 | if (pipe_num != 0) | |
2501 | list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); | |
2502 | ||
2503 | ep->gadget = &udc->gadget; | |
2504 | ||
2505 | return 0; | |
2506 | } | |
2507 | ||
2508 | /*----------------------------------------------------------------------- | |
2509 | * UDC device Driver operation functions * | |
2510 | *----------------------------------------------------------------------*/ | |
2511 | static void qe_udc_release(struct device *dev) | |
2512 | { | |
2513 | int i = 0; | |
2514 | ||
2515 | complete(udc_controller->done); | |
2516 | cpm_muram_free(cpm_muram_offset(udc_controller->ep_param[0])); | |
2517 | for (i = 0; i < USB_MAX_ENDPOINTS; i++) | |
2518 | udc_controller->ep_param[i] = NULL; | |
2519 | ||
2520 | kfree(udc_controller); | |
2521 | udc_controller = NULL; | |
2522 | } | |
2523 | ||
2524 | /* Driver probe functions */ | |
2525 | static int __devinit qe_udc_probe(struct of_device *ofdev, | |
2526 | const struct of_device_id *match) | |
2527 | { | |
2528 | struct device_node *np = ofdev->node; | |
2529 | struct qe_ep *ep; | |
2530 | unsigned int ret = 0; | |
2531 | unsigned int i; | |
2532 | const void *prop; | |
2533 | ||
2534 | prop = of_get_property(np, "mode", NULL); | |
2535 | if (!prop || strcmp(prop, "peripheral")) | |
2536 | return -ENODEV; | |
2537 | ||
2538 | /* Initialize the udc structure including QH member and other member */ | |
2539 | udc_controller = qe_udc_config(ofdev); | |
2540 | if (!udc_controller) { | |
cd40c4c4 | 2541 | dev_err(&ofdev->dev, "failed to initialize\n"); |
3948f0e0 LY |
2542 | return -ENOMEM; |
2543 | } | |
2544 | ||
2545 | udc_controller->soc_type = (unsigned long)match->data; | |
2546 | udc_controller->usb_regs = of_iomap(np, 0); | |
2547 | if (!udc_controller->usb_regs) { | |
2548 | ret = -ENOMEM; | |
2549 | goto err1; | |
2550 | } | |
2551 | ||
2552 | /* initialize usb hw reg except for regs for EP, | |
2553 | * leave usbintr reg untouched*/ | |
2554 | qe_udc_reg_init(udc_controller); | |
2555 | ||
2556 | /* here comes the stand operations for probe | |
2557 | * set the qe_udc->gadget.xxx */ | |
2558 | udc_controller->gadget.ops = &qe_gadget_ops; | |
2559 | ||
2560 | /* gadget.ep0 is a pointer */ | |
2561 | udc_controller->gadget.ep0 = &udc_controller->eps[0].ep; | |
2562 | ||
2563 | INIT_LIST_HEAD(&udc_controller->gadget.ep_list); | |
2564 | ||
2565 | /* modify in register gadget process */ | |
2566 | udc_controller->gadget.speed = USB_SPEED_UNKNOWN; | |
2567 | ||
2568 | /* name: Identifies the controller hardware type. */ | |
2569 | udc_controller->gadget.name = driver_name; | |
2570 | ||
2571 | device_initialize(&udc_controller->gadget.dev); | |
2572 | ||
c682b170 | 2573 | dev_set_name(&udc_controller->gadget.dev, "gadget"); |
3948f0e0 LY |
2574 | |
2575 | udc_controller->gadget.dev.release = qe_udc_release; | |
2576 | udc_controller->gadget.dev.parent = &ofdev->dev; | |
2577 | ||
928dfa6c | 2578 | /* initialize qe_ep struct */ |
3948f0e0 | 2579 | for (i = 0; i < USB_MAX_ENDPOINTS ; i++) { |
928dfa6c | 2580 | /* because the ep type isn't decide here so |
3948f0e0 LY |
2581 | * qe_ep_init() should be called in ep_enable() */ |
2582 | ||
2583 | /* setup the qe_ep struct and link ep.ep.list | |
2584 | * into gadget.ep_list */ | |
2585 | qe_ep_config(udc_controller, (unsigned char)i); | |
2586 | } | |
2587 | ||
2588 | /* ep0 initialization in here */ | |
2589 | ret = qe_ep_init(udc_controller, 0, &qe_ep0_desc); | |
2590 | if (ret) | |
2591 | goto err2; | |
2592 | ||
928dfa6c | 2593 | /* create a buf for ZLP send, need to remain zeroed */ |
3948f0e0 LY |
2594 | udc_controller->nullbuf = kzalloc(256, GFP_KERNEL); |
2595 | if (udc_controller->nullbuf == NULL) { | |
cd40c4c4 | 2596 | dev_err(udc_controller->dev, "cannot alloc nullbuf\n"); |
3948f0e0 LY |
2597 | ret = -ENOMEM; |
2598 | goto err3; | |
2599 | } | |
2600 | ||
928dfa6c LY |
2601 | /* buffer for data of get_status request */ |
2602 | udc_controller->statusbuf = kzalloc(2, GFP_KERNEL); | |
2603 | if (udc_controller->statusbuf == NULL) { | |
2604 | ret = -ENOMEM; | |
2605 | goto err4; | |
2606 | } | |
2607 | ||
3948f0e0 LY |
2608 | udc_controller->nullp = virt_to_phys((void *)udc_controller->nullbuf); |
2609 | if (udc_controller->nullp == DMA_ADDR_INVALID) { | |
2610 | udc_controller->nullp = dma_map_single( | |
2611 | udc_controller->gadget.dev.parent, | |
2612 | udc_controller->nullbuf, | |
2613 | 256, | |
2614 | DMA_TO_DEVICE); | |
2615 | udc_controller->nullmap = 1; | |
2616 | } else { | |
2617 | dma_sync_single_for_device(udc_controller->gadget.dev.parent, | |
2618 | udc_controller->nullp, 256, | |
2619 | DMA_TO_DEVICE); | |
2620 | } | |
2621 | ||
2622 | tasklet_init(&udc_controller->rx_tasklet, ep_rx_tasklet, | |
2623 | (unsigned long)udc_controller); | |
2624 | /* request irq and disable DR */ | |
2625 | udc_controller->usb_irq = irq_of_parse_and_map(np, 0); | |
94f341db AV |
2626 | if (!udc_controller->usb_irq) { |
2627 | ret = -EINVAL; | |
2628 | goto err_noirq; | |
2629 | } | |
3948f0e0 LY |
2630 | |
2631 | ret = request_irq(udc_controller->usb_irq, qe_udc_irq, 0, | |
2632 | driver_name, udc_controller); | |
2633 | if (ret) { | |
2634 | dev_err(udc_controller->dev, "cannot request irq %d err %d \n", | |
2635 | udc_controller->usb_irq, ret); | |
928dfa6c | 2636 | goto err5; |
3948f0e0 LY |
2637 | } |
2638 | ||
2639 | ret = device_add(&udc_controller->gadget.dev); | |
2640 | if (ret) | |
928dfa6c | 2641 | goto err6; |
3948f0e0 LY |
2642 | |
2643 | dev_info(udc_controller->dev, | |
928dfa6c LY |
2644 | "%s USB controller initialized as device\n", |
2645 | (udc_controller->soc_type == PORT_QE) ? "QE" : "CPM"); | |
3948f0e0 LY |
2646 | return 0; |
2647 | ||
928dfa6c | 2648 | err6: |
3948f0e0 | 2649 | free_irq(udc_controller->usb_irq, udc_controller); |
928dfa6c | 2650 | err5: |
94f341db AV |
2651 | irq_dispose_mapping(udc_controller->usb_irq); |
2652 | err_noirq: | |
3948f0e0 LY |
2653 | if (udc_controller->nullmap) { |
2654 | dma_unmap_single(udc_controller->gadget.dev.parent, | |
2655 | udc_controller->nullp, 256, | |
2656 | DMA_TO_DEVICE); | |
2657 | udc_controller->nullp = DMA_ADDR_INVALID; | |
2658 | } else { | |
2659 | dma_sync_single_for_cpu(udc_controller->gadget.dev.parent, | |
2660 | udc_controller->nullp, 256, | |
2661 | DMA_TO_DEVICE); | |
2662 | } | |
928dfa6c LY |
2663 | kfree(udc_controller->statusbuf); |
2664 | err4: | |
3948f0e0 LY |
2665 | kfree(udc_controller->nullbuf); |
2666 | err3: | |
2667 | ep = &udc_controller->eps[0]; | |
2668 | cpm_muram_free(cpm_muram_offset(ep->rxbase)); | |
2669 | kfree(ep->rxframe); | |
2670 | kfree(ep->rxbuffer); | |
2671 | kfree(ep->txframe); | |
2672 | err2: | |
2673 | iounmap(udc_controller->usb_regs); | |
2674 | err1: | |
2675 | kfree(udc_controller); | |
94f341db | 2676 | udc_controller = NULL; |
3948f0e0 LY |
2677 | return ret; |
2678 | } | |
2679 | ||
2680 | #ifdef CONFIG_PM | |
2681 | static int qe_udc_suspend(struct of_device *dev, pm_message_t state) | |
2682 | { | |
2683 | return -ENOTSUPP; | |
2684 | } | |
2685 | ||
2686 | static int qe_udc_resume(struct of_device *dev) | |
2687 | { | |
2688 | return -ENOTSUPP; | |
2689 | } | |
2690 | #endif | |
2691 | ||
2692 | static int __devexit qe_udc_remove(struct of_device *ofdev) | |
2693 | { | |
2694 | struct qe_ep *ep; | |
2695 | unsigned int size; | |
2696 | ||
2697 | DECLARE_COMPLETION(done); | |
2698 | ||
2699 | if (!udc_controller) | |
2700 | return -ENODEV; | |
2701 | ||
2702 | udc_controller->done = &done; | |
2703 | tasklet_disable(&udc_controller->rx_tasklet); | |
2704 | ||
2705 | if (udc_controller->nullmap) { | |
2706 | dma_unmap_single(udc_controller->gadget.dev.parent, | |
2707 | udc_controller->nullp, 256, | |
2708 | DMA_TO_DEVICE); | |
2709 | udc_controller->nullp = DMA_ADDR_INVALID; | |
2710 | } else { | |
2711 | dma_sync_single_for_cpu(udc_controller->gadget.dev.parent, | |
2712 | udc_controller->nullp, 256, | |
2713 | DMA_TO_DEVICE); | |
2714 | } | |
928dfa6c | 2715 | kfree(udc_controller->statusbuf); |
3948f0e0 LY |
2716 | kfree(udc_controller->nullbuf); |
2717 | ||
2718 | ep = &udc_controller->eps[0]; | |
2719 | cpm_muram_free(cpm_muram_offset(ep->rxbase)); | |
2720 | size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1); | |
2721 | ||
2722 | kfree(ep->rxframe); | |
2723 | if (ep->rxbufmap) { | |
2724 | dma_unmap_single(udc_controller->gadget.dev.parent, | |
2725 | ep->rxbuf_d, size, | |
2726 | DMA_FROM_DEVICE); | |
2727 | ep->rxbuf_d = DMA_ADDR_INVALID; | |
2728 | } else { | |
2729 | dma_sync_single_for_cpu(udc_controller->gadget.dev.parent, | |
2730 | ep->rxbuf_d, size, | |
2731 | DMA_FROM_DEVICE); | |
2732 | } | |
2733 | ||
2734 | kfree(ep->rxbuffer); | |
2735 | kfree(ep->txframe); | |
2736 | ||
2737 | free_irq(udc_controller->usb_irq, udc_controller); | |
94f341db | 2738 | irq_dispose_mapping(udc_controller->usb_irq); |
3948f0e0 LY |
2739 | |
2740 | tasklet_kill(&udc_controller->rx_tasklet); | |
2741 | ||
2742 | iounmap(udc_controller->usb_regs); | |
2743 | ||
2744 | device_unregister(&udc_controller->gadget.dev); | |
2745 | /* wait for release() of gadget.dev to free udc */ | |
2746 | wait_for_completion(&done); | |
2747 | ||
2748 | return 0; | |
2749 | } | |
2750 | ||
2751 | /*-------------------------------------------------------------------------*/ | |
2752 | static struct of_device_id __devinitdata qe_udc_match[] = { | |
2753 | { | |
2754 | .compatible = "fsl,mpc8360-qe-usb", | |
2755 | .data = (void *)PORT_QE, | |
2756 | }, | |
2757 | { | |
2758 | .compatible = "fsl,mpc8272-cpm-usb", | |
2759 | .data = (void *)PORT_CPM, | |
2760 | }, | |
2761 | {}, | |
2762 | }; | |
2763 | ||
2764 | MODULE_DEVICE_TABLE(of, qe_udc_match); | |
2765 | ||
2766 | static struct of_platform_driver udc_driver = { | |
2767 | .name = (char *)driver_name, | |
2768 | .match_table = qe_udc_match, | |
2769 | .probe = qe_udc_probe, | |
2770 | .remove = __devexit_p(qe_udc_remove), | |
2771 | #ifdef CONFIG_PM | |
2772 | .suspend = qe_udc_suspend, | |
2773 | .resume = qe_udc_resume, | |
2774 | #endif | |
2775 | }; | |
2776 | ||
2777 | static int __init qe_udc_init(void) | |
2778 | { | |
2779 | printk(KERN_INFO "%s: %s, %s\n", driver_name, driver_desc, | |
2780 | DRIVER_VERSION); | |
2781 | return of_register_platform_driver(&udc_driver); | |
2782 | } | |
2783 | ||
2784 | static void __exit qe_udc_exit(void) | |
2785 | { | |
2786 | of_unregister_platform_driver(&udc_driver); | |
2787 | } | |
2788 | ||
2789 | module_init(qe_udc_init); | |
2790 | module_exit(qe_udc_exit); | |
2791 | ||
2792 | MODULE_DESCRIPTION(DRIVER_DESC); | |
2793 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
2794 | MODULE_LICENSE("GPL"); | |
2795 |