2 * core.h -- Core Driver for Wolfson WM8350 PMIC
4 * Copyright 2007 Wolfson Microelectronics PLC
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
13 #ifndef __LINUX_MFD_WM8350_CORE_H_
14 #define __LINUX_MFD_WM8350_CORE_H_
16 #include <linux/kernel.h>
17 #include <linux/mutex.h>
18 #include <linux/workqueue.h>
20 #include <linux/mfd/wm8350/audio.h>
21 #include <linux/mfd/wm8350/gpio.h>
22 #include <linux/mfd/wm8350/pmic.h>
23 #include <linux/mfd/wm8350/rtc.h>
24 #include <linux/mfd/wm8350/supply.h>
25 #include <linux/mfd/wm8350/wdt.h>
30 #define WM8350_RESET_ID 0x00
31 #define WM8350_ID 0x01
32 #define WM8350_SYSTEM_CONTROL_1 0x03
33 #define WM8350_SYSTEM_CONTROL_2 0x04
34 #define WM8350_SYSTEM_HIBERNATE 0x05
35 #define WM8350_INTERFACE_CONTROL 0x06
36 #define WM8350_POWER_MGMT_1 0x08
37 #define WM8350_POWER_MGMT_2 0x09
38 #define WM8350_POWER_MGMT_3 0x0A
39 #define WM8350_POWER_MGMT_4 0x0B
40 #define WM8350_POWER_MGMT_5 0x0C
41 #define WM8350_POWER_MGMT_6 0x0D
42 #define WM8350_POWER_MGMT_7 0x0E
44 #define WM8350_SYSTEM_INTERRUPTS 0x18
45 #define WM8350_INT_STATUS_1 0x19
46 #define WM8350_INT_STATUS_2 0x1A
47 #define WM8350_POWER_UP_INT_STATUS 0x1B
48 #define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
49 #define WM8350_OVER_CURRENT_INT_STATUS 0x1D
50 #define WM8350_GPIO_INT_STATUS 0x1E
51 #define WM8350_COMPARATOR_INT_STATUS 0x1F
52 #define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
53 #define WM8350_INT_STATUS_1_MASK 0x21
54 #define WM8350_INT_STATUS_2_MASK 0x22
55 #define WM8350_POWER_UP_INT_STATUS_MASK 0x23
56 #define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
57 #define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
58 #define WM8350_GPIO_INT_STATUS_MASK 0x26
59 #define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
61 #define WM8350_MAX_REGISTER 0xFF
68 * R0 (0x00) - Reset/ID
70 #define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
75 #define WM8350_CHIP_REV_MASK 0x7000
76 #define WM8350_CONF_STS_MASK 0x0C00
77 #define WM8350_CUST_ID_MASK 0x00FF
80 * R3 (0x03) - System Control 1
82 #define WM8350_CHIP_ON 0x8000
83 #define WM8350_POWERCYCLE 0x2000
84 #define WM8350_VCC_FAULT_OV 0x1000
85 #define WM8350_REG_RSTB_TIME_MASK 0x0C00
86 #define WM8350_BG_SLEEP 0x0200
87 #define WM8350_MEM_VALID 0x0020
88 #define WM8350_CHIP_SET_UP 0x0010
89 #define WM8350_ON_DEB_T 0x0008
90 #define WM8350_ON_POL 0x0002
91 #define WM8350_IRQ_POL 0x0001
94 * R4 (0x04) - System Control 2
96 #define WM8350_USB_SUSPEND_8MA 0x8000
97 #define WM8350_USB_SUSPEND 0x4000
98 #define WM8350_USB_MSTR 0x2000
99 #define WM8350_USB_MSTR_SRC 0x1000
100 #define WM8350_USB_500MA 0x0800
101 #define WM8350_USB_NOLIM 0x0400
104 * R5 (0x05) - System Hibernate
106 #define WM8350_HIBERNATE 0x8000
107 #define WM8350_WDOG_HIB_MODE 0x0080
108 #define WM8350_REG_HIB_STARTUP_SEQ 0x0040
109 #define WM8350_REG_RESET_HIB_MODE 0x0020
110 #define WM8350_RST_HIB_MODE 0x0010
111 #define WM8350_IRQ_HIB_MODE 0x0008
112 #define WM8350_MEMRST_HIB_MODE 0x0004
113 #define WM8350_PCCOMP_HIB_MODE 0x0002
114 #define WM8350_TEMPMON_HIB_MODE 0x0001
117 * R6 (0x06) - Interface Control
119 #define WM8350_USE_DEV_PINS 0x8000
120 #define WM8350_USE_DEV_PINS_MASK 0x8000
121 #define WM8350_USE_DEV_PINS_SHIFT 15
122 #define WM8350_DEV_ADDR_MASK 0x6000
123 #define WM8350_DEV_ADDR_SHIFT 13
124 #define WM8350_CONFIG_DONE 0x1000
125 #define WM8350_CONFIG_DONE_MASK 0x1000
126 #define WM8350_CONFIG_DONE_SHIFT 12
127 #define WM8350_RECONFIG_AT_ON 0x0800
128 #define WM8350_RECONFIG_AT_ON_MASK 0x0800
129 #define WM8350_RECONFIG_AT_ON_SHIFT 11
130 #define WM8350_AUTOINC 0x0200
131 #define WM8350_AUTOINC_MASK 0x0200
132 #define WM8350_AUTOINC_SHIFT 9
133 #define WM8350_ARA 0x0100
134 #define WM8350_ARA_MASK 0x0100
135 #define WM8350_ARA_SHIFT 8
136 #define WM8350_SPI_CFG 0x0008
137 #define WM8350_SPI_CFG_MASK 0x0008
138 #define WM8350_SPI_CFG_SHIFT 3
139 #define WM8350_SPI_4WIRE 0x0004
140 #define WM8350_SPI_4WIRE_MASK 0x0004
141 #define WM8350_SPI_4WIRE_SHIFT 2
142 #define WM8350_SPI_3WIRE 0x0002
143 #define WM8350_SPI_3WIRE_MASK 0x0002
144 #define WM8350_SPI_3WIRE_SHIFT 1
146 /* Bit values for R06 (0x06) */
147 #define WM8350_USE_DEV_PINS_PRIMARY 0
148 #define WM8350_USE_DEV_PINS_DEV 1
150 #define WM8350_DEV_ADDR_34 0
151 #define WM8350_DEV_ADDR_36 1
152 #define WM8350_DEV_ADDR_3C 2
153 #define WM8350_DEV_ADDR_3E 3
155 #define WM8350_CONFIG_DONE_OFF 0
156 #define WM8350_CONFIG_DONE_DONE 1
158 #define WM8350_RECONFIG_AT_ON_OFF 0
159 #define WM8350_RECONFIG_AT_ON_ON 1
161 #define WM8350_AUTOINC_OFF 0
162 #define WM8350_AUTOINC_ON 1
164 #define WM8350_ARA_OFF 0
165 #define WM8350_ARA_ON 1
167 #define WM8350_SPI_CFG_CMOS 0
168 #define WM8350_SPI_CFG_OD 1
170 #define WM8350_SPI_4WIRE_3WIRE 0
171 #define WM8350_SPI_4WIRE_4WIRE 1
173 #define WM8350_SPI_3WIRE_I2C 0
174 #define WM8350_SPI_3WIRE_SPI 1
177 * R8 (0x08) - Power mgmt (1)
179 #define WM8350_CODEC_ISEL_MASK 0xC000
180 #define WM8350_VBUFEN 0x2000
181 #define WM8350_OUTPUT_DRAIN_EN 0x0400
182 #define WM8350_MIC_DET_ENA 0x0100
183 #define WM8350_BIASEN 0x0020
184 #define WM8350_MICBEN 0x0010
185 #define WM8350_VMIDEN 0x0004
186 #define WM8350_VMID_MASK 0x0003
187 #define WM8350_VMID_SHIFT 0
190 * R9 (0x09) - Power mgmt (2)
192 #define WM8350_IN3R_ENA 0x0800
193 #define WM8350_IN3L_ENA 0x0400
194 #define WM8350_INR_ENA 0x0200
195 #define WM8350_INL_ENA 0x0100
196 #define WM8350_MIXINR_ENA 0x0080
197 #define WM8350_MIXINL_ENA 0x0040
198 #define WM8350_OUT4_ENA 0x0020
199 #define WM8350_OUT3_ENA 0x0010
200 #define WM8350_MIXOUTR_ENA 0x0002
201 #define WM8350_MIXOUTL_ENA 0x0001
204 * R10 (0x0A) - Power mgmt (3)
206 #define WM8350_IN3R_TO_OUT2R 0x0080
207 #define WM8350_OUT2R_ENA 0x0008
208 #define WM8350_OUT2L_ENA 0x0004
209 #define WM8350_OUT1R_ENA 0x0002
210 #define WM8350_OUT1L_ENA 0x0001
213 * R11 (0x0B) - Power mgmt (4)
215 #define WM8350_SYSCLK_ENA 0x4000
216 #define WM8350_ADC_HPF_ENA 0x2000
217 #define WM8350_FLL_ENA 0x0800
218 #define WM8350_FLL_OSC_ENA 0x0400
219 #define WM8350_TOCLK_ENA 0x0100
220 #define WM8350_DACR_ENA 0x0020
221 #define WM8350_DACL_ENA 0x0010
222 #define WM8350_ADCR_ENA 0x0008
223 #define WM8350_ADCL_ENA 0x0004
226 * R12 (0x0C) - Power mgmt (5)
228 #define WM8350_CODEC_ENA 0x1000
229 #define WM8350_RTC_TICK_ENA 0x0800
230 #define WM8350_OSC32K_ENA 0x0400
231 #define WM8350_CHG_ENA 0x0200
232 #define WM8350_ACC_DET_ENA 0x0100
233 #define WM8350_AUXADC_ENA 0x0080
234 #define WM8350_DCMP4_ENA 0x0008
235 #define WM8350_DCMP3_ENA 0x0004
236 #define WM8350_DCMP2_ENA 0x0002
237 #define WM8350_DCMP1_ENA 0x0001
240 * R13 (0x0D) - Power mgmt (6)
242 #define WM8350_LS_ENA 0x8000
243 #define WM8350_LDO4_ENA 0x0800
244 #define WM8350_LDO3_ENA 0x0400
245 #define WM8350_LDO2_ENA 0x0200
246 #define WM8350_LDO1_ENA 0x0100
247 #define WM8350_DC6_ENA 0x0020
248 #define WM8350_DC5_ENA 0x0010
249 #define WM8350_DC4_ENA 0x0008
250 #define WM8350_DC3_ENA 0x0004
251 #define WM8350_DC2_ENA 0x0002
252 #define WM8350_DC1_ENA 0x0001
255 * R14 (0x0E) - Power mgmt (7)
257 #define WM8350_CS2_ENA 0x0002
258 #define WM8350_CS1_ENA 0x0001
261 * R24 (0x18) - System Interrupts
263 #define WM8350_OC_INT 0x2000
264 #define WM8350_UV_INT 0x1000
265 #define WM8350_PUTO_INT 0x0800
266 #define WM8350_CS_INT 0x0200
267 #define WM8350_EXT_INT 0x0100
268 #define WM8350_CODEC_INT 0x0080
269 #define WM8350_GP_INT 0x0040
270 #define WM8350_AUXADC_INT 0x0020
271 #define WM8350_RTC_INT 0x0010
272 #define WM8350_SYS_INT 0x0008
273 #define WM8350_CHG_INT 0x0004
274 #define WM8350_USB_INT 0x0002
275 #define WM8350_WKUP_INT 0x0001
278 * R25 (0x19) - Interrupt Status 1
280 #define WM8350_CHG_BAT_HOT_EINT 0x8000
281 #define WM8350_CHG_BAT_COLD_EINT 0x4000
282 #define WM8350_CHG_BAT_FAIL_EINT 0x2000
283 #define WM8350_CHG_TO_EINT 0x1000
284 #define WM8350_CHG_END_EINT 0x0800
285 #define WM8350_CHG_START_EINT 0x0400
286 #define WM8350_CHG_FAST_RDY_EINT 0x0200
287 #define WM8350_RTC_PER_EINT 0x0080
288 #define WM8350_RTC_SEC_EINT 0x0040
289 #define WM8350_RTC_ALM_EINT 0x0020
290 #define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
291 #define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
292 #define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
295 * R26 (0x1A) - Interrupt Status 2
297 #define WM8350_CS1_EINT 0x2000
298 #define WM8350_CS2_EINT 0x1000
299 #define WM8350_USB_LIMIT_EINT 0x0400
300 #define WM8350_AUXADC_DATARDY_EINT 0x0100
301 #define WM8350_AUXADC_DCOMP4_EINT 0x0080
302 #define WM8350_AUXADC_DCOMP3_EINT 0x0040
303 #define WM8350_AUXADC_DCOMP2_EINT 0x0020
304 #define WM8350_AUXADC_DCOMP1_EINT 0x0010
305 #define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
306 #define WM8350_SYS_CHIP_GT115_EINT 0x0004
307 #define WM8350_SYS_CHIP_GT140_EINT 0x0002
308 #define WM8350_SYS_WDOG_TO_EINT 0x0001
311 * R27 (0x1B) - Power Up Interrupt Status
313 #define WM8350_PUTO_LDO4_EINT 0x0800
314 #define WM8350_PUTO_LDO3_EINT 0x0400
315 #define WM8350_PUTO_LDO2_EINT 0x0200
316 #define WM8350_PUTO_LDO1_EINT 0x0100
317 #define WM8350_PUTO_DC6_EINT 0x0020
318 #define WM8350_PUTO_DC5_EINT 0x0010
319 #define WM8350_PUTO_DC4_EINT 0x0008
320 #define WM8350_PUTO_DC3_EINT 0x0004
321 #define WM8350_PUTO_DC2_EINT 0x0002
322 #define WM8350_PUTO_DC1_EINT 0x0001
325 * R28 (0x1C) - Under Voltage Interrupt status
327 #define WM8350_UV_LDO4_EINT 0x0800
328 #define WM8350_UV_LDO3_EINT 0x0400
329 #define WM8350_UV_LDO2_EINT 0x0200
330 #define WM8350_UV_LDO1_EINT 0x0100
331 #define WM8350_UV_DC6_EINT 0x0020
332 #define WM8350_UV_DC5_EINT 0x0010
333 #define WM8350_UV_DC4_EINT 0x0008
334 #define WM8350_UV_DC3_EINT 0x0004
335 #define WM8350_UV_DC2_EINT 0x0002
336 #define WM8350_UV_DC1_EINT 0x0001
339 * R29 (0x1D) - Over Current Interrupt status
341 #define WM8350_OC_LS_EINT 0x8000
344 * R30 (0x1E) - GPIO Interrupt Status
346 #define WM8350_GP12_EINT 0x1000
347 #define WM8350_GP11_EINT 0x0800
348 #define WM8350_GP10_EINT 0x0400
349 #define WM8350_GP9_EINT 0x0200
350 #define WM8350_GP8_EINT 0x0100
351 #define WM8350_GP7_EINT 0x0080
352 #define WM8350_GP6_EINT 0x0040
353 #define WM8350_GP5_EINT 0x0020
354 #define WM8350_GP4_EINT 0x0010
355 #define WM8350_GP3_EINT 0x0008
356 #define WM8350_GP2_EINT 0x0004
357 #define WM8350_GP1_EINT 0x0002
358 #define WM8350_GP0_EINT 0x0001
361 * R31 (0x1F) - Comparator Interrupt Status
363 #define WM8350_EXT_USB_FB_EINT 0x8000
364 #define WM8350_EXT_WALL_FB_EINT 0x4000
365 #define WM8350_EXT_BAT_FB_EINT 0x2000
366 #define WM8350_CODEC_JCK_DET_L_EINT 0x0800
367 #define WM8350_CODEC_JCK_DET_R_EINT 0x0400
368 #define WM8350_CODEC_MICSCD_EINT 0x0200
369 #define WM8350_CODEC_MICD_EINT 0x0100
370 #define WM8350_WKUP_OFF_STATE_EINT 0x0040
371 #define WM8350_WKUP_HIB_STATE_EINT 0x0020
372 #define WM8350_WKUP_CONV_FAULT_EINT 0x0010
373 #define WM8350_WKUP_WDOG_RST_EINT 0x0008
374 #define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
375 #define WM8350_WKUP_ONKEY_EINT 0x0002
376 #define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
379 * R32 (0x20) - System Interrupts Mask
381 #define WM8350_IM_OC_INT 0x2000
382 #define WM8350_IM_UV_INT 0x1000
383 #define WM8350_IM_PUTO_INT 0x0800
384 #define WM8350_IM_SPARE_INT 0x0400
385 #define WM8350_IM_CS_INT 0x0200
386 #define WM8350_IM_EXT_INT 0x0100
387 #define WM8350_IM_CODEC_INT 0x0080
388 #define WM8350_IM_GP_INT 0x0040
389 #define WM8350_IM_AUXADC_INT 0x0020
390 #define WM8350_IM_RTC_INT 0x0010
391 #define WM8350_IM_SYS_INT 0x0008
392 #define WM8350_IM_CHG_INT 0x0004
393 #define WM8350_IM_USB_INT 0x0002
394 #define WM8350_IM_WKUP_INT 0x0001
397 * R33 (0x21) - Interrupt Status 1 Mask
399 #define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
400 #define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
401 #define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
402 #define WM8350_IM_CHG_TO_EINT 0x1000
403 #define WM8350_IM_CHG_END_EINT 0x0800
404 #define WM8350_IM_CHG_START_EINT 0x0400
405 #define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
406 #define WM8350_IM_RTC_PER_EINT 0x0080
407 #define WM8350_IM_RTC_SEC_EINT 0x0040
408 #define WM8350_IM_RTC_ALM_EINT 0x0020
409 #define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
410 #define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
411 #define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
414 * R34 (0x22) - Interrupt Status 2 Mask
416 #define WM8350_IM_SPARE2_EINT 0x8000
417 #define WM8350_IM_SPARE1_EINT 0x4000
418 #define WM8350_IM_CS1_EINT 0x2000
419 #define WM8350_IM_CS2_EINT 0x1000
420 #define WM8350_IM_USB_LIMIT_EINT 0x0400
421 #define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
422 #define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
423 #define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
424 #define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
425 #define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
426 #define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
427 #define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
428 #define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
429 #define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
432 * R35 (0x23) - Power Up Interrupt Status Mask
434 #define WM8350_IM_PUTO_LDO4_EINT 0x0800
435 #define WM8350_IM_PUTO_LDO3_EINT 0x0400
436 #define WM8350_IM_PUTO_LDO2_EINT 0x0200
437 #define WM8350_IM_PUTO_LDO1_EINT 0x0100
438 #define WM8350_IM_PUTO_DC6_EINT 0x0020
439 #define WM8350_IM_PUTO_DC5_EINT 0x0010
440 #define WM8350_IM_PUTO_DC4_EINT 0x0008
441 #define WM8350_IM_PUTO_DC3_EINT 0x0004
442 #define WM8350_IM_PUTO_DC2_EINT 0x0002
443 #define WM8350_IM_PUTO_DC1_EINT 0x0001
446 * R36 (0x24) - Under Voltage Interrupt status Mask
448 #define WM8350_IM_UV_LDO4_EINT 0x0800
449 #define WM8350_IM_UV_LDO3_EINT 0x0400
450 #define WM8350_IM_UV_LDO2_EINT 0x0200
451 #define WM8350_IM_UV_LDO1_EINT 0x0100
452 #define WM8350_IM_UV_DC6_EINT 0x0020
453 #define WM8350_IM_UV_DC5_EINT 0x0010
454 #define WM8350_IM_UV_DC4_EINT 0x0008
455 #define WM8350_IM_UV_DC3_EINT 0x0004
456 #define WM8350_IM_UV_DC2_EINT 0x0002
457 #define WM8350_IM_UV_DC1_EINT 0x0001
460 * R37 (0x25) - Over Current Interrupt status Mask
462 #define WM8350_IM_OC_LS_EINT 0x8000
465 * R38 (0x26) - GPIO Interrupt Status Mask
467 #define WM8350_IM_GP12_EINT 0x1000
468 #define WM8350_IM_GP11_EINT 0x0800
469 #define WM8350_IM_GP10_EINT 0x0400
470 #define WM8350_IM_GP9_EINT 0x0200
471 #define WM8350_IM_GP8_EINT 0x0100
472 #define WM8350_IM_GP7_EINT 0x0080
473 #define WM8350_IM_GP6_EINT 0x0040
474 #define WM8350_IM_GP5_EINT 0x0020
475 #define WM8350_IM_GP4_EINT 0x0010
476 #define WM8350_IM_GP3_EINT 0x0008
477 #define WM8350_IM_GP2_EINT 0x0004
478 #define WM8350_IM_GP1_EINT 0x0002
479 #define WM8350_IM_GP0_EINT 0x0001
482 * R39 (0x27) - Comparator Interrupt Status Mask
484 #define WM8350_IM_EXT_USB_FB_EINT 0x8000
485 #define WM8350_IM_EXT_WALL_FB_EINT 0x4000
486 #define WM8350_IM_EXT_BAT_FB_EINT 0x2000
487 #define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
488 #define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
489 #define WM8350_IM_CODEC_MICSCD_EINT 0x0200
490 #define WM8350_IM_CODEC_MICD_EINT 0x0100
491 #define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
492 #define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
493 #define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
494 #define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
495 #define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
496 #define WM8350_IM_WKUP_ONKEY_EINT 0x0002
497 #define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
500 * R220 (0xDC) - RAM BIST 1
502 #define WM8350_READ_STATUS 0x0800
503 #define WM8350_TSTRAM_CLK 0x0100
504 #define WM8350_TSTRAM_CLK_ENA 0x0080
505 #define WM8350_STARTSEQ 0x0040
506 #define WM8350_READ_SRC 0x0020
507 #define WM8350_COUNT_DIR 0x0010
508 #define WM8350_TSTRAM_MODE_MASK 0x000E
509 #define WM8350_TSTRAM_ENA 0x0001
512 * R225 (0xE1) - DCDC/LDO status
514 #define WM8350_LS_STS 0x8000
515 #define WM8350_LDO4_STS 0x0800
516 #define WM8350_LDO3_STS 0x0400
517 #define WM8350_LDO2_STS 0x0200
518 #define WM8350_LDO1_STS 0x0100
519 #define WM8350_DC6_STS 0x0020
520 #define WM8350_DC5_STS 0x0010
521 #define WM8350_DC4_STS 0x0008
522 #define WM8350_DC3_STS 0x0004
523 #define WM8350_DC2_STS 0x0002
524 #define WM8350_DC1_STS 0x0001
526 /* WM8350 wake up conditions */
527 #define WM8350_IRQ_WKUP_OFF_STATE 43
528 #define WM8350_IRQ_WKUP_HIB_STATE 44
529 #define WM8350_IRQ_WKUP_CONV_FAULT 45
530 #define WM8350_IRQ_WKUP_WDOG_RST 46
531 #define WM8350_IRQ_WKUP_GP_PWR_ON 47
532 #define WM8350_IRQ_WKUP_ONKEY 48
533 #define WM8350_IRQ_WKUP_GP_WAKEUP 49
535 /* wm8350 chip revisions */
536 #define WM8350_REV_E 0x4
537 #define WM8350_REV_F 0x5
538 #define WM8350_REV_G 0x6
540 #define WM8350_NUM_IRQ 63
542 struct wm8350_reg_access {
543 u16 readable; /* Mask of readable bits */
544 u16 writable; /* Mask of writable bits */
545 u16 vol; /* Mask of volatile bits */
547 extern const struct wm8350_reg_access wm8350_reg_io_map[];
548 extern const u16 wm8350_mode0_defaults[];
549 extern const u16 wm8350_mode1_defaults[];
550 extern const u16 wm8350_mode2_defaults[];
551 extern const u16 wm8350_mode3_defaults[];
556 void (*handler) (struct wm8350 *, int, void *);
561 int rev; /* chip revision */
567 struct i2c_client *i2c_client;
568 struct spi_device *spi_device;
570 int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest);
571 int (*write_dev)(struct wm8350 *wm8350, char reg, int size,
575 /* Interrupt handling */
576 struct work_struct irq_work;
577 struct mutex irq_mutex; /* IRQ table mutex */
578 struct wm8350_irq irq[WM8350_NUM_IRQ];
582 struct wm8350_codec codec;
583 struct wm8350_gpio gpio;
584 struct wm8350_pmic pmic;
585 struct wm8350_power power;
586 struct wm8350_rtc rtc;
587 struct wm8350_wdt wdt;
591 * Data to be supplied by the platform to initialise the WM8350.
593 * @init: Function called during driver initialisation. Should be
594 * used by the platform to configure GPIO functions and similar.
596 struct wm8350_platform_data {
597 int (*init)(struct wm8350 *wm8350);
602 * WM8350 device initialisation and exit.
604 int wm8350_device_init(struct wm8350 *wm8350, int irq,
605 struct wm8350_platform_data *pdata);
606 void wm8350_device_exit(struct wm8350 *wm8350);
611 int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
612 int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
613 u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
614 int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
615 int wm8350_reg_lock(struct wm8350 *wm8350);
616 int wm8350_reg_unlock(struct wm8350 *wm8350);
617 int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
618 int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
621 * WM8350 internal interrupts
623 int wm8350_register_irq(struct wm8350 *wm8350, int irq,
624 void (*handler) (struct wm8350 *, int, void *),
626 int wm8350_free_irq(struct wm8350 *wm8350, int irq);
627 int wm8350_mask_irq(struct wm8350 *wm8350, int irq);
628 int wm8350_unmask_irq(struct wm8350 *wm8350, int irq);