2 * arch/arm/mach-at91rm9200/at91rm9200.c
4 * Copyright (C) 2005 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
15 #include <asm/mach/arch.h>
16 #include <asm/mach/map.h>
17 #include <asm/arch/at91rm9200.h>
19 #include <asm/hardware.h>
23 static struct map_desc at91rm9200_io_desc[] __initdata = {
25 .virtual = AT91_VA_BASE_SYS,
26 .pfn = __phys_to_pfn(AT91_BASE_SYS),
30 .virtual = AT91_VA_BASE_SPI,
31 .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI),
35 .virtual = AT91_VA_BASE_EMAC,
36 .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
40 .virtual = AT91_VA_BASE_TWI,
41 .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI),
45 .virtual = AT91_VA_BASE_MCI,
46 .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI),
50 .virtual = AT91_VA_BASE_UDP,
51 .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP),
55 .virtual = AT91_SRAM_VIRT_BASE,
56 .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
57 .length = AT91RM9200_SRAM_SIZE,
62 /* --------------------------------------------------------------------
64 * -------------------------------------------------------------------- */
67 * The peripheral clocks.
69 static struct clk udc_clk = {
71 .pmc_mask = 1 << AT91RM9200_ID_UDP,
72 .type = CLK_TYPE_PERIPHERAL,
74 static struct clk ohci_clk = {
76 .pmc_mask = 1 << AT91RM9200_ID_UHP,
77 .type = CLK_TYPE_PERIPHERAL,
79 static struct clk ether_clk = {
81 .pmc_mask = 1 << AT91RM9200_ID_EMAC,
82 .type = CLK_TYPE_PERIPHERAL,
84 static struct clk mmc_clk = {
86 .pmc_mask = 1 << AT91RM9200_ID_MCI,
87 .type = CLK_TYPE_PERIPHERAL,
89 static struct clk twi_clk = {
91 .pmc_mask = 1 << AT91RM9200_ID_TWI,
92 .type = CLK_TYPE_PERIPHERAL,
94 static struct clk usart0_clk = {
96 .pmc_mask = 1 << AT91RM9200_ID_US0,
97 .type = CLK_TYPE_PERIPHERAL,
99 static struct clk usart1_clk = {
100 .name = "usart1_clk",
101 .pmc_mask = 1 << AT91RM9200_ID_US1,
102 .type = CLK_TYPE_PERIPHERAL,
104 static struct clk usart2_clk = {
105 .name = "usart2_clk",
106 .pmc_mask = 1 << AT91RM9200_ID_US2,
107 .type = CLK_TYPE_PERIPHERAL,
109 static struct clk usart3_clk = {
110 .name = "usart3_clk",
111 .pmc_mask = 1 << AT91RM9200_ID_US3,
112 .type = CLK_TYPE_PERIPHERAL,
114 static struct clk spi_clk = {
116 .pmc_mask = 1 << AT91RM9200_ID_SPI,
117 .type = CLK_TYPE_PERIPHERAL,
119 static struct clk pioA_clk = {
121 .pmc_mask = 1 << AT91RM9200_ID_PIOA,
122 .type = CLK_TYPE_PERIPHERAL,
124 static struct clk pioB_clk = {
126 .pmc_mask = 1 << AT91RM9200_ID_PIOB,
127 .type = CLK_TYPE_PERIPHERAL,
129 static struct clk pioC_clk = {
131 .pmc_mask = 1 << AT91RM9200_ID_PIOC,
132 .type = CLK_TYPE_PERIPHERAL,
134 static struct clk pioD_clk = {
136 .pmc_mask = 1 << AT91RM9200_ID_PIOD,
137 .type = CLK_TYPE_PERIPHERAL,
140 static struct clk *periph_clocks[] __initdata = {
161 * The four programmable clocks.
162 * You must configure pin multiplexing to bring these signals out.
164 static struct clk pck0 = {
166 .pmc_mask = AT91_PMC_PCK0,
167 .type = CLK_TYPE_PROGRAMMABLE,
170 static struct clk pck1 = {
172 .pmc_mask = AT91_PMC_PCK1,
173 .type = CLK_TYPE_PROGRAMMABLE,
176 static struct clk pck2 = {
178 .pmc_mask = AT91_PMC_PCK2,
179 .type = CLK_TYPE_PROGRAMMABLE,
182 static struct clk pck3 = {
184 .pmc_mask = AT91_PMC_PCK3,
185 .type = CLK_TYPE_PROGRAMMABLE,
189 static void __init at91rm9200_register_clocks(void)
193 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
194 clk_register(periph_clocks[i]);
202 /* --------------------------------------------------------------------
204 * -------------------------------------------------------------------- */
206 static struct at91_gpio_bank at91rm9200_gpio[] = {
208 .id = AT91RM9200_ID_PIOA,
212 .id = AT91RM9200_ID_PIOB,
216 .id = AT91RM9200_ID_PIOC,
220 .id = AT91RM9200_ID_PIOD,
226 static void at91rm9200_reset(void)
229 * Perform a hardware reset with the use of the Watchdog timer.
231 at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
232 at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
236 /* --------------------------------------------------------------------
237 * AT91RM9200 processor initialization
238 * -------------------------------------------------------------------- */
239 void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
241 /* Map peripherals */
242 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
244 at91_arch_reset = at91rm9200_reset;
245 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
246 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
247 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
248 | (1 << AT91RM9200_ID_IRQ6);
250 /* Init clock subsystem */
251 at91_clock_init(main_clock);
253 /* Register the processor-specific clocks */
254 at91rm9200_register_clocks();
256 /* Initialize GPIO subsystem */
257 at91_gpio_init(at91rm9200_gpio, banks);
261 /* --------------------------------------------------------------------
262 * Interrupt initialization
263 * -------------------------------------------------------------------- */
266 * The default interrupt priority levels (0 = lowest, 7 = highest).
268 static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
269 7, /* Advanced Interrupt Controller (FIQ) */
270 7, /* System Peripherals */
271 0, /* Parallel IO Controller A */
272 0, /* Parallel IO Controller B */
273 0, /* Parallel IO Controller C */
274 0, /* Parallel IO Controller D */
279 0, /* Multimedia Card Interface */
280 4, /* USB Device Port */
281 0, /* Two-Wire Interface */
282 6, /* Serial Peripheral Interface */
283 5, /* Serial Synchronous Controller 0 */
284 5, /* Serial Synchronous Controller 1 */
285 5, /* Serial Synchronous Controller 2 */
286 0, /* Timer Counter 0 */
287 0, /* Timer Counter 1 */
288 0, /* Timer Counter 2 */
289 0, /* Timer Counter 3 */
290 0, /* Timer Counter 4 */
291 0, /* Timer Counter 5 */
292 3, /* USB Host port */
293 3, /* Ethernet MAC */
294 0, /* Advanced Interrupt Controller (IRQ0) */
295 0, /* Advanced Interrupt Controller (IRQ1) */
296 0, /* Advanced Interrupt Controller (IRQ2) */
297 0, /* Advanced Interrupt Controller (IRQ3) */
298 0, /* Advanced Interrupt Controller (IRQ4) */
299 0, /* Advanced Interrupt Controller (IRQ5) */
300 0 /* Advanced Interrupt Controller (IRQ6) */
303 void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
306 priority = at91rm9200_default_irq_priority;
308 /* Initialize the AIC interrupt controller */
309 at91_aic_init(priority);
311 /* Enable GPIO interrupts */
312 at91_gpio_irq_setup();