2 * I2O kernel space accessible structures/APIs
4 * (c) Copyright 1999, 2000 Red Hat Software
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 *************************************************************************
13 * This header file defined the I2O APIs/structures for use by
14 * the I2O kernel modules.
21 #ifdef __KERNEL__ /* This file to be included by kernel only */
23 #include <linux/i2o-dev.h>
25 /* How many different OSM's are we allowing */
26 #define I2O_MAX_DRIVERS 8
29 #include <asm/semaphore.h> /* Needed for MUTEX init macros */
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
33 /* message queue empty */
34 #define I2O_QUEUE_EMPTY 0xffffffff
48 u32 icntxt; /* initiator context */
49 u32 tcntxt; /* transaction context */
58 * Each I2O device entity has one of these. There is one per device.
61 i2o_lct_entry lct_data; /* Device LCT information */
63 struct i2o_controller *iop; /* Controlling IOP */
64 struct list_head list; /* node in IOP devices list */
68 struct semaphore lock; /* device lock */
70 struct class_device classdev; /* i2o device class */
74 * Event structure provided to the event handling function
77 struct work_struct work;
78 struct i2o_device *i2o_dev; /* I2O device pointer from which the
79 event reply was initiated */
80 u16 size; /* Size of data in 32-bit words */
81 u32 tcntxt; /* Transaction context used at
83 u32 event_indicator; /* Event indicator from reply */
84 u32 data[0]; /* Event data from reply */
88 * I2O classes which could be handled by the OSM
95 * I2O driver structure for OSMs
98 char *name; /* OSM name */
99 int context; /* Low 8 bits of the transaction info */
100 struct i2o_class_id *classes; /* I2O classes that this OSM handles */
102 /* Message reply handler */
103 int (*reply) (struct i2o_controller *, u32, struct i2o_message *);
106 void (*event) (struct i2o_event *);
108 struct workqueue_struct *event_queue; /* Event queue */
110 struct device_driver driver;
112 /* notification of changes */
113 void (*notify_controller_add) (struct i2o_controller *);
114 void (*notify_controller_remove) (struct i2o_controller *);
115 void (*notify_device_add) (struct i2o_device *);
116 void (*notify_device_remove) (struct i2o_device *);
118 struct semaphore lock;
122 * Contains all information which are necessary for DMA operations
131 * Context queue entry, used for 32-bit context on 64-bit systems
133 struct i2o_context_list_element {
134 struct list_head list;
137 unsigned long timestamp;
141 * Each I2O controller has one of these objects
143 struct i2o_controller {
148 struct pci_dev *pdev; /* PCI device */
150 unsigned int short_req:1; /* use small block sizes */
151 unsigned int no_quiesce:1; /* dont quiesce before reset */
152 unsigned int raptor:1; /* split bar */
153 unsigned int promise:1; /* Promise controller */
155 struct list_head devices; /* list of I2O devices */
157 struct notifier_block *event_notifer; /* Events */
159 struct list_head list; /* Controller list */
160 void __iomem *post_port; /* Inbout port address */
161 void __iomem *reply_port; /* Outbound port address */
162 void __iomem *irq_mask; /* Interrupt register address */
164 /* Dynamic LCT related data */
166 struct i2o_dma status; /* status of IOP */
168 struct i2o_dma hrt; /* HW Resource Table */
169 i2o_lct *lct; /* Logical Config Table */
170 struct i2o_dma dlct; /* Temp LCT */
171 struct semaphore lct_lock; /* Lock for LCT updates */
172 struct i2o_dma status_block; /* IOP status block */
174 struct i2o_dma base; /* controller messaging unit */
175 struct i2o_dma in_queue; /* inbound message queue Host->IOP */
176 struct i2o_dma out_queue; /* outbound message queue IOP->Host */
178 unsigned int battery:1; /* Has a battery backup */
179 unsigned int io_alloc:1; /* An I/O resource was allocated */
180 unsigned int mem_alloc:1; /* A memory resource was allocated */
182 struct resource io_resource; /* I/O resource allocated to the IOP */
183 struct resource mem_resource; /* Mem resource allocated to the IOP */
185 struct proc_dir_entry *proc_entry; /* /proc dir */
187 struct list_head bus_list; /* list of busses on IOP */
188 struct device device;
189 struct i2o_device *exec; /* Executive */
190 #if BITS_PER_LONG == 64
191 spinlock_t context_list_lock; /* lock for context_list */
192 atomic_t context_list_counter; /* needed for unique contexts */
193 struct list_head context_list; /* list of context id's
196 spinlock_t lock; /* lock for controller
199 void *driver_data[I2O_MAX_DRIVERS]; /* storage for drivers */
203 * I2O System table entry
205 * The system table contains information about all the IOPs in the
206 * system. It is sent to all IOPs so that they can create peer2peer
207 * connections between them.
209 struct i2o_sys_tbl_entry {
221 u32 iop_capabilities;
233 struct i2o_sys_tbl_entry iops[0];
236 extern struct list_head i2o_controllers;
238 /* Message functions */
239 static inline u32 i2o_msg_get(struct i2o_controller *, struct i2o_message __iomem **);
240 extern u32 i2o_msg_get_wait(struct i2o_controller *, struct i2o_message __iomem **,
242 static inline void i2o_msg_post(struct i2o_controller *, u32);
243 static inline int i2o_msg_post_wait(struct i2o_controller *, u32,
245 extern int i2o_msg_post_wait_mem(struct i2o_controller *, u32, unsigned long,
247 extern void i2o_msg_nop(struct i2o_controller *, u32);
248 static inline void i2o_flush_reply(struct i2o_controller *, u32);
250 /* DMA handling functions */
251 static inline int i2o_dma_alloc(struct device *, struct i2o_dma *, size_t,
253 static inline void i2o_dma_free(struct device *, struct i2o_dma *);
254 int i2o_dma_realloc(struct device *, struct i2o_dma *, size_t, unsigned int);
256 static inline int i2o_dma_map(struct device *, struct i2o_dma *);
257 static inline void i2o_dma_unmap(struct device *, struct i2o_dma *);
260 extern int i2o_status_get(struct i2o_controller *);
262 extern int i2o_event_register(struct i2o_device *, struct i2o_driver *, int,
264 extern struct i2o_device *i2o_iop_find_device(struct i2o_controller *, u16);
265 extern struct i2o_controller *i2o_find_iop(int);
267 /* Functions needed for handling 64-bit pointers in 32-bit context */
268 #if BITS_PER_LONG == 64
269 extern u32 i2o_cntxt_list_add(struct i2o_controller *, void *);
270 extern void *i2o_cntxt_list_get(struct i2o_controller *, u32);
271 extern u32 i2o_cntxt_list_remove(struct i2o_controller *, void *);
272 extern u32 i2o_cntxt_list_get_ptr(struct i2o_controller *, void *);
274 static inline u32 i2o_ptr_low(void *ptr)
276 return (u32) (u64) ptr;
279 static inline u32 i2o_ptr_high(void *ptr)
281 return (u32) ((u64) ptr >> 32);
284 static inline u32 i2o_cntxt_list_add(struct i2o_controller *c, void *ptr)
289 static inline void *i2o_cntxt_list_get(struct i2o_controller *c, u32 context)
291 return (void *)context;
294 static inline u32 i2o_cntxt_list_remove(struct i2o_controller *c, void *ptr)
299 static inline u32 i2o_cntxt_list_get_ptr(struct i2o_controller *c, void *ptr)
304 static inline u32 i2o_ptr_low(void *ptr)
309 static inline u32 i2o_ptr_high(void *ptr)
315 /* I2O driver (OSM) functions */
316 extern int i2o_driver_register(struct i2o_driver *);
317 extern void i2o_driver_unregister(struct i2o_driver *);
320 * i2o_driver_notify_controller_add - Send notification of added controller
321 * to a single I2O driver
323 * Send notification of added controller to a single registered driver.
325 static inline void i2o_driver_notify_controller_add(struct i2o_driver *drv,
326 struct i2o_controller *c)
328 if (drv->notify_controller_add)
329 drv->notify_controller_add(c);
333 * i2o_driver_notify_controller_remove - Send notification of removed
334 * controller to a single I2O driver
336 * Send notification of removed controller to a single registered driver.
338 static inline void i2o_driver_notify_controller_remove(struct i2o_driver *drv,
339 struct i2o_controller *c)
341 if (drv->notify_controller_remove)
342 drv->notify_controller_remove(c);
346 * i2o_driver_notify_device_add - Send notification of added device to a
349 * Send notification of added device to a single registered driver.
351 static inline void i2o_driver_notify_device_add(struct i2o_driver *drv,
352 struct i2o_device *i2o_dev)
354 if (drv->notify_device_add)
355 drv->notify_device_add(i2o_dev);
359 * i2o_driver_notify_device_remove - Send notification of removed device
360 * to a single I2O driver
362 * Send notification of removed device to a single registered driver.
364 static inline void i2o_driver_notify_device_remove(struct i2o_driver *drv,
365 struct i2o_device *i2o_dev)
367 if (drv->notify_device_remove)
368 drv->notify_device_remove(i2o_dev);
371 extern void i2o_driver_notify_controller_add_all(struct i2o_controller *);
372 extern void i2o_driver_notify_controller_remove_all(struct i2o_controller *);
373 extern void i2o_driver_notify_device_add_all(struct i2o_device *);
374 extern void i2o_driver_notify_device_remove_all(struct i2o_device *);
376 /* I2O device functions */
377 extern int i2o_device_claim(struct i2o_device *);
378 extern int i2o_device_claim_release(struct i2o_device *);
380 /* Exec OSM functions */
381 extern int i2o_exec_lct_get(struct i2o_controller *);
383 /* device to i2o_device and driver to i2o_driver convertion functions */
384 #define to_i2o_driver(drv) container_of(drv,struct i2o_driver, driver)
385 #define to_i2o_device(dev) container_of(dev, struct i2o_device, device)
390 static inline u32 I2O_POST_READ32(struct i2o_controller *c)
393 return readl(c->post_port);
396 static inline void I2O_POST_WRITE32(struct i2o_controller *c, u32 val)
399 writel(val, c->post_port);
402 static inline u32 I2O_REPLY_READ32(struct i2o_controller *c)
405 return readl(c->reply_port);
408 static inline void I2O_REPLY_WRITE32(struct i2o_controller *c, u32 val)
411 writel(val, c->reply_port);
414 static inline u32 I2O_IRQ_READ32(struct i2o_controller *c)
417 return readl(c->irq_mask);
420 static inline void I2O_IRQ_WRITE32(struct i2o_controller *c, u32 val)
423 writel(val, c->irq_mask);
428 * i2o_msg_get - obtain an I2O message from the IOP
430 * @msg: pointer to a I2O message pointer
432 * This function tries to get a message slot. If no message slot is
433 * available do not wait until one is availabe (see also i2o_msg_get_wait).
435 * On a success the message is returned and the pointer to the message is
436 * set in msg. The returned message is the physical page frame offset
437 * address from the read port (see the i2o spec). If no message is
438 * available returns I2O_QUEUE_EMPTY and msg is leaved untouched.
440 static inline u32 i2o_msg_get(struct i2o_controller *c,
441 struct i2o_message __iomem **msg)
445 if ((m = I2O_POST_READ32(c)) != I2O_QUEUE_EMPTY)
446 *msg = c->in_queue.virt + m;
452 * i2o_msg_post - Post I2O message to I2O controller
453 * @c: I2O controller to which the message should be send
454 * @m: the message identifier
456 * Post the message to the I2O controller.
458 static inline void i2o_msg_post(struct i2o_controller *c, u32 m)
460 I2O_POST_WRITE32(c, m);
464 * i2o_msg_post_wait - Post and wait a message and wait until return
466 * @m: message to post
467 * @timeout: time in seconds to wait
469 * This API allows an OSM to post a message and then be told whether or
470 * not the system received a successful reply. If the message times out
471 * then the value '-ETIMEDOUT' is returned.
473 * Returns 0 on success or negative error code on failure.
475 static inline int i2o_msg_post_wait(struct i2o_controller *c, u32 m,
476 unsigned long timeout)
478 return i2o_msg_post_wait_mem(c, m, timeout, NULL);
482 * i2o_flush_reply - Flush reply from I2O controller
484 * @m: the message identifier
486 * The I2O controller must be informed that the reply message is not needed
487 * anymore. If you forget to flush the reply, the message frame can't be
488 * used by the controller anymore and is therefore lost.
490 * FIXME: is there a timeout after which the controller reuse the message?
492 static inline void i2o_flush_reply(struct i2o_controller *c, u32 m)
494 I2O_REPLY_WRITE32(c, m);
498 * i2o_out_to_virt - Turn an I2O message to a virtual address
500 * @m: message engine value
502 * Turn a receive message from an I2O controller bus address into
503 * a Linux virtual address. The shared page frame is a linear block
504 * so we simply have to shift the offset. This function does not
505 * work for sender side messages as they are ioremap objects
506 * provided by the I2O controller.
508 static inline struct i2o_message *i2o_msg_out_to_virt(struct i2o_controller *c,
511 BUG_ON(m < c->out_queue.phys
512 || m >= c->out_queue.phys + c->out_queue.len);
514 return c->out_queue.virt + (m - c->out_queue.phys);
518 * i2o_msg_in_to_virt - Turn an I2O message to a virtual address
520 * @m: message engine value
522 * Turn a send message from an I2O controller bus address into
523 * a Linux virtual address. The shared page frame is a linear block
524 * so we simply have to shift the offset. This function does not
525 * work for receive side messages as they are kmalloc objects
526 * in a different pool.
528 static inline struct i2o_message __iomem *i2o_msg_in_to_virt(struct i2o_controller *c,
531 return c->in_queue.virt + m;
535 * i2o_dma_alloc - Allocate DMA memory
536 * @dev: struct device pointer to the PCI device of the I2O controller
537 * @addr: i2o_dma struct which should get the DMA buffer
538 * @len: length of the new DMA memory
539 * @gfp_mask: GFP mask
541 * Allocate a coherent DMA memory and write the pointers into addr.
543 * Returns 0 on success or -ENOMEM on failure.
545 static inline int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr,
546 size_t len, unsigned int gfp_mask)
548 addr->virt = dma_alloc_coherent(dev, len, &addr->phys, gfp_mask);
552 memset(addr->virt, 0, len);
559 * i2o_dma_free - Free DMA memory
560 * @dev: struct device pointer to the PCI device of the I2O controller
561 * @addr: i2o_dma struct which contains the DMA buffer
563 * Free a coherent DMA memory and set virtual address of addr to NULL.
565 static inline void i2o_dma_free(struct device *dev, struct i2o_dma *addr)
569 dma_free_coherent(dev, addr->len, addr->virt,
578 * i2o_dma_map - Map the memory to DMA
579 * @dev: struct device pointer to the PCI device of the I2O controller
580 * @addr: i2o_dma struct which should be mapped
582 * Map the memory in addr->virt to coherent DMA memory and write the
583 * physical address into addr->phys.
585 * Returns 0 on success or -ENOMEM on failure.
587 static inline int i2o_dma_map(struct device *dev, struct i2o_dma *addr)
593 addr->phys = dma_map_single(dev, addr->virt, addr->len,
602 * i2o_dma_unmap - Unmap the DMA memory
603 * @dev: struct device pointer to the PCI device of the I2O controller
604 * @addr: i2o_dma struct which should be unmapped
606 * Unmap the memory in addr->virt from DMA memory.
608 static inline void i2o_dma_unmap(struct device *dev, struct i2o_dma *addr)
614 dma_unmap_single(dev, addr->phys, addr->len, DMA_BIDIRECTIONAL);
620 * Endian handling wrapped into the macro - keeps the core code
624 #define i2o_raw_writel(val, mem) __raw_writel(cpu_to_le32(val), mem)
626 extern int i2o_parm_field_get(struct i2o_device *, int, int, void *, int);
627 extern int i2o_parm_table_get(struct i2o_device *, int, int, int, void *, int,
630 /* debugging and troubleshooting/diagnostic helpers. */
631 #define osm_printk(level, format, arg...) \
632 printk(level "%s: " format, OSM_NAME , ## arg)
635 #define osm_debug(format, arg...) \
636 osm_printk(KERN_DEBUG, format , ## arg)
638 #define osm_debug(format, arg...) \
642 #define osm_err(format, arg...) \
643 osm_printk(KERN_ERR, format , ## arg)
644 #define osm_info(format, arg...) \
645 osm_printk(KERN_INFO, format , ## arg)
646 #define osm_warn(format, arg...) \
647 osm_printk(KERN_WARNING, format , ## arg)
649 /* debugging functions */
650 extern void i2o_report_status(const char *, const char *, struct i2o_message *);
651 extern void i2o_dump_message(struct i2o_message *);
652 extern void i2o_dump_hrt(struct i2o_controller *c);
653 extern void i2o_debug_state(struct i2o_controller *c);
659 /* The NULL strategy leaves everything up to the controller. This tends to be a
660 * pessimal but functional choice.
663 /* Prefetch data when reading. We continually attempt to load the next 32 sectors
664 * into the controller cache.
666 #define CACHE_PREFETCH 1
667 /* Prefetch data when reading. We sometimes attempt to load the next 32 sectors
668 * into the controller cache. When an I/O is less <= 8K we assume its probably
669 * not sequential and don't prefetch (default)
671 #define CACHE_SMARTFETCH 2
672 /* Data is written to the cache and then out on to the disk. The I/O must be
673 * physically on the medium before the write is acknowledged (default without
676 #define CACHE_WRITETHROUGH 17
677 /* Data is written to the cache and then out on to the disk. The controller
678 * is permitted to write back the cache any way it wants. (default if battery
679 * backed NVRAM is present). It can be useful to set this for swap regardless of
682 #define CACHE_WRITEBACK 18
683 /* Optimise for under powered controllers, especially on RAID1 and RAID0. We
684 * write large I/O's directly to disk bypassing the cache to avoid the extra
685 * memory copy hits. Small writes are writeback cached
687 #define CACHE_SMARTBACK 19
688 /* Optimise for under powered controllers, especially on RAID1 and RAID0. We
689 * write large I/O's directly to disk bypassing the cache to avoid the extra
690 * memory copy hits. Small writes are writethrough cached. Suitable for devices
691 * lacking battery backup
693 #define CACHE_SMARTTHROUGH 20
699 #define BLKI2OGRSTRAT _IOR('2', 1, int)
700 #define BLKI2OGWSTRAT _IOR('2', 2, int)
701 #define BLKI2OSRSTRAT _IOW('2', 3, int)
702 #define BLKI2OSWSTRAT _IOW('2', 4, int)
711 #define I2O_CMD_ADAPTER_ASSIGN 0xB3
712 #define I2O_CMD_ADAPTER_READ 0xB2
713 #define I2O_CMD_ADAPTER_RELEASE 0xB5
714 #define I2O_CMD_BIOS_INFO_SET 0xA5
715 #define I2O_CMD_BOOT_DEVICE_SET 0xA7
716 #define I2O_CMD_CONFIG_VALIDATE 0xBB
717 #define I2O_CMD_CONN_SETUP 0xCA
718 #define I2O_CMD_DDM_DESTROY 0xB1
719 #define I2O_CMD_DDM_ENABLE 0xD5
720 #define I2O_CMD_DDM_QUIESCE 0xC7
721 #define I2O_CMD_DDM_RESET 0xD9
722 #define I2O_CMD_DDM_SUSPEND 0xAF
723 #define I2O_CMD_DEVICE_ASSIGN 0xB7
724 #define I2O_CMD_DEVICE_RELEASE 0xB9
725 #define I2O_CMD_HRT_GET 0xA8
726 #define I2O_CMD_ADAPTER_CLEAR 0xBE
727 #define I2O_CMD_ADAPTER_CONNECT 0xC9
728 #define I2O_CMD_ADAPTER_RESET 0xBD
729 #define I2O_CMD_LCT_NOTIFY 0xA2
730 #define I2O_CMD_OUTBOUND_INIT 0xA1
731 #define I2O_CMD_PATH_ENABLE 0xD3
732 #define I2O_CMD_PATH_QUIESCE 0xC5
733 #define I2O_CMD_PATH_RESET 0xD7
734 #define I2O_CMD_STATIC_MF_CREATE 0xDD
735 #define I2O_CMD_STATIC_MF_RELEASE 0xDF
736 #define I2O_CMD_STATUS_GET 0xA0
737 #define I2O_CMD_SW_DOWNLOAD 0xA9
738 #define I2O_CMD_SW_UPLOAD 0xAB
739 #define I2O_CMD_SW_REMOVE 0xAD
740 #define I2O_CMD_SYS_ENABLE 0xD1
741 #define I2O_CMD_SYS_MODIFY 0xC1
742 #define I2O_CMD_SYS_QUIESCE 0xC3
743 #define I2O_CMD_SYS_TAB_SET 0xA3
748 #define I2O_CMD_UTIL_NOP 0x00
749 #define I2O_CMD_UTIL_ABORT 0x01
750 #define I2O_CMD_UTIL_CLAIM 0x09
751 #define I2O_CMD_UTIL_RELEASE 0x0B
752 #define I2O_CMD_UTIL_PARAMS_GET 0x06
753 #define I2O_CMD_UTIL_PARAMS_SET 0x05
754 #define I2O_CMD_UTIL_EVT_REGISTER 0x13
755 #define I2O_CMD_UTIL_EVT_ACK 0x14
756 #define I2O_CMD_UTIL_CONFIG_DIALOG 0x10
757 #define I2O_CMD_UTIL_DEVICE_RESERVE 0x0D
758 #define I2O_CMD_UTIL_DEVICE_RELEASE 0x0F
759 #define I2O_CMD_UTIL_LOCK 0x17
760 #define I2O_CMD_UTIL_LOCK_RELEASE 0x19
761 #define I2O_CMD_UTIL_REPLY_FAULT_NOTIFY 0x15
764 * SCSI Host Bus Adapter Class
766 #define I2O_CMD_SCSI_EXEC 0x81
767 #define I2O_CMD_SCSI_ABORT 0x83
768 #define I2O_CMD_SCSI_BUSRESET 0x27
771 * Random Block Storage Class
773 #define I2O_CMD_BLOCK_READ 0x30
774 #define I2O_CMD_BLOCK_WRITE 0x31
775 #define I2O_CMD_BLOCK_CFLUSH 0x37
776 #define I2O_CMD_BLOCK_MLOCK 0x49
777 #define I2O_CMD_BLOCK_MUNLOCK 0x4B
778 #define I2O_CMD_BLOCK_MMOUNT 0x41
779 #define I2O_CMD_BLOCK_MEJECT 0x43
780 #define I2O_CMD_BLOCK_POWER 0x70
782 #define I2O_PRIVATE_MSG 0xFF
784 /* Command status values */
786 #define I2O_CMD_IN_PROGRESS 0x01
787 #define I2O_CMD_REJECTED 0x02
788 #define I2O_CMD_FAILED 0x03
789 #define I2O_CMD_COMPLETED 0x04
791 /* I2O API function return values */
793 #define I2O_RTN_NO_ERROR 0
794 #define I2O_RTN_NOT_INIT 1
795 #define I2O_RTN_FREE_Q_EMPTY 2
796 #define I2O_RTN_TCB_ERROR 3
797 #define I2O_RTN_TRANSACTION_ERROR 4
798 #define I2O_RTN_ADAPTER_ALREADY_INIT 5
799 #define I2O_RTN_MALLOC_ERROR 6
800 #define I2O_RTN_ADPTR_NOT_REGISTERED 7
801 #define I2O_RTN_MSG_REPLY_TIMEOUT 8
802 #define I2O_RTN_NO_STATUS 9
803 #define I2O_RTN_NO_FIRM_VER 10
804 #define I2O_RTN_NO_LINK_SPEED 11
806 /* Reply message status defines for all messages */
808 #define I2O_REPLY_STATUS_SUCCESS 0x00
809 #define I2O_REPLY_STATUS_ABORT_DIRTY 0x01
810 #define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02
811 #define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03
812 #define I2O_REPLY_STATUS_ERROR_DIRTY 0x04
813 #define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05
814 #define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06
815 #define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x08
816 #define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x09
817 #define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x0A
818 #define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0B
819 #define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80
821 /* Status codes and Error Information for Parameter functions */
823 #define I2O_PARAMS_STATUS_SUCCESS 0x00
824 #define I2O_PARAMS_STATUS_BAD_KEY_ABORT 0x01
825 #define I2O_PARAMS_STATUS_BAD_KEY_CONTINUE 0x02
826 #define I2O_PARAMS_STATUS_BUFFER_FULL 0x03
827 #define I2O_PARAMS_STATUS_BUFFER_TOO_SMALL 0x04
828 #define I2O_PARAMS_STATUS_FIELD_UNREADABLE 0x05
829 #define I2O_PARAMS_STATUS_FIELD_UNWRITEABLE 0x06
830 #define I2O_PARAMS_STATUS_INSUFFICIENT_FIELDS 0x07
831 #define I2O_PARAMS_STATUS_INVALID_GROUP_ID 0x08
832 #define I2O_PARAMS_STATUS_INVALID_OPERATION 0x09
833 #define I2O_PARAMS_STATUS_NO_KEY_FIELD 0x0A
834 #define I2O_PARAMS_STATUS_NO_SUCH_FIELD 0x0B
835 #define I2O_PARAMS_STATUS_NON_DYNAMIC_GROUP 0x0C
836 #define I2O_PARAMS_STATUS_OPERATION_ERROR 0x0D
837 #define I2O_PARAMS_STATUS_SCALAR_ERROR 0x0E
838 #define I2O_PARAMS_STATUS_TABLE_ERROR 0x0F
839 #define I2O_PARAMS_STATUS_WRONG_GROUP_TYPE 0x10
841 /* DetailedStatusCode defines for Executive, DDM, Util and Transaction error
842 * messages: Table 3-2 Detailed Status Codes.*/
844 #define I2O_DSC_SUCCESS 0x0000
845 #define I2O_DSC_BAD_KEY 0x0002
846 #define I2O_DSC_TCL_ERROR 0x0003
847 #define I2O_DSC_REPLY_BUFFER_FULL 0x0004
848 #define I2O_DSC_NO_SUCH_PAGE 0x0005
849 #define I2O_DSC_INSUFFICIENT_RESOURCE_SOFT 0x0006
850 #define I2O_DSC_INSUFFICIENT_RESOURCE_HARD 0x0007
851 #define I2O_DSC_CHAIN_BUFFER_TOO_LARGE 0x0009
852 #define I2O_DSC_UNSUPPORTED_FUNCTION 0x000A
853 #define I2O_DSC_DEVICE_LOCKED 0x000B
854 #define I2O_DSC_DEVICE_RESET 0x000C
855 #define I2O_DSC_INAPPROPRIATE_FUNCTION 0x000D
856 #define I2O_DSC_INVALID_INITIATOR_ADDRESS 0x000E
857 #define I2O_DSC_INVALID_MESSAGE_FLAGS 0x000F
858 #define I2O_DSC_INVALID_OFFSET 0x0010
859 #define I2O_DSC_INVALID_PARAMETER 0x0011
860 #define I2O_DSC_INVALID_REQUEST 0x0012
861 #define I2O_DSC_INVALID_TARGET_ADDRESS 0x0013
862 #define I2O_DSC_MESSAGE_TOO_LARGE 0x0014
863 #define I2O_DSC_MESSAGE_TOO_SMALL 0x0015
864 #define I2O_DSC_MISSING_PARAMETER 0x0016
865 #define I2O_DSC_TIMEOUT 0x0017
866 #define I2O_DSC_UNKNOWN_ERROR 0x0018
867 #define I2O_DSC_UNKNOWN_FUNCTION 0x0019
868 #define I2O_DSC_UNSUPPORTED_VERSION 0x001A
869 #define I2O_DSC_DEVICE_BUSY 0x001B
870 #define I2O_DSC_DEVICE_NOT_AVAILABLE 0x001C
872 /* DetailedStatusCode defines for Block Storage Operation: Table 6-7 Detailed
875 #define I2O_BSA_DSC_SUCCESS 0x0000
876 #define I2O_BSA_DSC_MEDIA_ERROR 0x0001
877 #define I2O_BSA_DSC_ACCESS_ERROR 0x0002
878 #define I2O_BSA_DSC_DEVICE_FAILURE 0x0003
879 #define I2O_BSA_DSC_DEVICE_NOT_READY 0x0004
880 #define I2O_BSA_DSC_MEDIA_NOT_PRESENT 0x0005
881 #define I2O_BSA_DSC_MEDIA_LOCKED 0x0006
882 #define I2O_BSA_DSC_MEDIA_FAILURE 0x0007
883 #define I2O_BSA_DSC_PROTOCOL_FAILURE 0x0008
884 #define I2O_BSA_DSC_BUS_FAILURE 0x0009
885 #define I2O_BSA_DSC_ACCESS_VIOLATION 0x000A
886 #define I2O_BSA_DSC_WRITE_PROTECTED 0x000B
887 #define I2O_BSA_DSC_DEVICE_RESET 0x000C
888 #define I2O_BSA_DSC_VOLUME_CHANGED 0x000D
889 #define I2O_BSA_DSC_TIMEOUT 0x000E
891 /* FailureStatusCodes, Table 3-3 Message Failure Codes */
893 #define I2O_FSC_TRANSPORT_SERVICE_SUSPENDED 0x81
894 #define I2O_FSC_TRANSPORT_SERVICE_TERMINATED 0x82
895 #define I2O_FSC_TRANSPORT_CONGESTION 0x83
896 #define I2O_FSC_TRANSPORT_FAILURE 0x84
897 #define I2O_FSC_TRANSPORT_STATE_ERROR 0x85
898 #define I2O_FSC_TRANSPORT_TIME_OUT 0x86
899 #define I2O_FSC_TRANSPORT_ROUTING_FAILURE 0x87
900 #define I2O_FSC_TRANSPORT_INVALID_VERSION 0x88
901 #define I2O_FSC_TRANSPORT_INVALID_OFFSET 0x89
902 #define I2O_FSC_TRANSPORT_INVALID_MSG_FLAGS 0x8A
903 #define I2O_FSC_TRANSPORT_FRAME_TOO_SMALL 0x8B
904 #define I2O_FSC_TRANSPORT_FRAME_TOO_LARGE 0x8C
905 #define I2O_FSC_TRANSPORT_INVALID_TARGET_ID 0x8D
906 #define I2O_FSC_TRANSPORT_INVALID_INITIATOR_ID 0x8E
907 #define I2O_FSC_TRANSPORT_INVALID_INITIATOR_CONTEXT 0x8F
908 #define I2O_FSC_TRANSPORT_UNKNOWN_FAILURE 0xFF
910 /* Device Claim Types */
911 #define I2O_CLAIM_PRIMARY 0x01000000
912 #define I2O_CLAIM_MANAGEMENT 0x02000000
913 #define I2O_CLAIM_AUTHORIZED 0x03000000
914 #define I2O_CLAIM_SECONDARY 0x04000000
916 /* Message header defines for VersionOffset */
917 #define I2OVER15 0x0001
918 #define I2OVER20 0x0002
920 /* Default is 1.5, FIXME: Need support for both 1.5 and 2.0 */
921 #define I2OVERSION I2OVER15
923 #define SGL_OFFSET_0 I2OVERSION
924 #define SGL_OFFSET_4 (0x0040 | I2OVERSION)
925 #define SGL_OFFSET_5 (0x0050 | I2OVERSION)
926 #define SGL_OFFSET_6 (0x0060 | I2OVERSION)
927 #define SGL_OFFSET_7 (0x0070 | I2OVERSION)
928 #define SGL_OFFSET_8 (0x0080 | I2OVERSION)
929 #define SGL_OFFSET_9 (0x0090 | I2OVERSION)
930 #define SGL_OFFSET_10 (0x00A0 | I2OVERSION)
932 #define TRL_OFFSET_5 (0x0050 | I2OVERSION)
933 #define TRL_OFFSET_6 (0x0060 | I2OVERSION)
935 /* Transaction Reply Lists (TRL) Control Word structure */
936 #define TRL_SINGLE_FIXED_LENGTH 0x00
937 #define TRL_SINGLE_VARIABLE_LENGTH 0x40
938 #define TRL_MULTIPLE_FIXED_LENGTH 0x80
940 /* msg header defines for MsgFlags */
941 #define MSG_STATIC 0x0100
942 #define MSG_64BIT_CNTXT 0x0200
943 #define MSG_MULTI_TRANS 0x1000
944 #define MSG_FAIL 0x2000
945 #define MSG_FINAL 0x4000
946 #define MSG_REPLY 0x8000
948 /* minimum size msg */
949 #define THREE_WORD_MSG_SIZE 0x00030000
950 #define FOUR_WORD_MSG_SIZE 0x00040000
951 #define FIVE_WORD_MSG_SIZE 0x00050000
952 #define SIX_WORD_MSG_SIZE 0x00060000
953 #define SEVEN_WORD_MSG_SIZE 0x00070000
954 #define EIGHT_WORD_MSG_SIZE 0x00080000
955 #define NINE_WORD_MSG_SIZE 0x00090000
956 #define TEN_WORD_MSG_SIZE 0x000A0000
957 #define ELEVEN_WORD_MSG_SIZE 0x000B0000
958 #define I2O_MESSAGE_SIZE(x) ((x)<<16)
960 /* Special TID Assignments */
962 #define ADAPTER_TID 0
965 #define MSG_FRAME_SIZE 128 /* i2o_scsi assumes >= 32 */
966 #define REPLY_FRAME_SIZE 17
967 #define SG_TABLESIZE 30
968 #define NMBR_MSG_FRAMES 128
970 #define MSG_POOL_SIZE (MSG_FRAME_SIZE*NMBR_MSG_FRAMES*sizeof(u32))
972 #define I2O_POST_WAIT_OK 0
973 #define I2O_POST_WAIT_TIMEOUT -ETIMEDOUT
975 #define I2O_CONTEXT_LIST_MIN_LENGTH 15
976 #define I2O_CONTEXT_LIST_USED 0x01
977 #define I2O_CONTEXT_LIST_DELETED 0x02
980 #define I2O_TIMEOUT_INIT_OUTBOUND_QUEUE 15
981 #define I2O_TIMEOUT_MESSAGE_GET 5
982 #define I2O_TIMEOUT_RESET 30
983 #define I2O_TIMEOUT_STATUS_GET 5
984 #define I2O_TIMEOUT_LCT_GET 360
985 #define I2O_TIMEOUT_SCSI_SCB_ABORT 240
988 #define I2O_HRT_GET_TRIES 3
989 #define I2O_LCT_GET_TRIES 3
991 /* request queue sizes */
992 #define I2O_MAX_SECTORS 1024
993 #define I2O_MAX_SEGMENTS 128
995 #define I2O_REQ_MEMPOOL_SIZE 32
997 #endif /* __KERNEL__ */