git.oblomov.eu Git - linux-2.6/blob - include/asm-x86/paravirt.h

   1 #ifndef ASM_X86__PARAVIRT_H
   2 #define ASM_X86__PARAVIRT_H
   3 /* Various instructions on x86 need to be replaced for
   4  * para-virtualization: those hooks are defined here. */
   5
   6 #ifdef CONFIG_PARAVIRT
   7 #include <asm/page.h>
   8 #include <asm/asm.h>
   9
  10 /* Bitmask of what can be clobbered: usually at least eax. */
  11 #define CLBR_NONE 0
  12 #define CLBR_EAX  (1 << 0)
  13 #define CLBR_ECX  (1 << 1)
  14 #define CLBR_EDX  (1 << 2)
  15
  16 #ifdef CONFIG_X86_64
  17 #define CLBR_RSI  (1 << 3)
  18 #define CLBR_RDI  (1 << 4)
  19 #define CLBR_R8   (1 << 5)
  20 #define CLBR_R9   (1 << 6)
  21 #define CLBR_R10  (1 << 7)
  22 #define CLBR_R11  (1 << 8)
  23 #define CLBR_ANY  ((1 << 9) - 1)
  24 #include <asm/desc_defs.h>
  25 #else
  26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
  27 #define CLBR_ANY  ((1 << 3) - 1)
  28 #endif /* X86_64 */
  29
  30 #ifndef __ASSEMBLY__
  31 #include <linux/types.h>
  32 #include <linux/cpumask.h>
  33 #include <asm/kmap_types.h>
  34 #include <asm/desc_defs.h>
  35
  36 struct page;
  37 struct thread_struct;
  38 struct desc_ptr;
  39 struct tss_struct;
  40 struct mm_struct;
  41 struct desc_struct;
  42
  43 /* general info */
  44 struct pv_info {
  45         unsigned int kernel_rpl;
  46         int shared_kernel_pmd;
  47         int paravirt_enabled;
  48         const char *name;
  49 };
  50
  51 struct pv_init_ops {
  52         /*
  53          * Patch may replace one of the defined code sequences with
  54          * arbitrary code, subject to the same register constraints.
  55          * This generally means the code is not free to clobber any
  56          * registers other than EAX.  The patch function should return
  57          * the number of bytes of code generated, as we nop pad the
  58          * rest in generic code.
  59          */
  60         unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
  61                           unsigned long addr, unsigned len);
  62
  63         /* Basic arch-specific setup */
  64         void (*arch_setup)(void);
  65         char *(*memory_setup)(void);
  66         void (*post_allocator_init)(void);
  67
  68         /* Print a banner to identify the environment */
  69         void (*banner)(void);
  70 };
  71
  72
  73 struct pv_lazy_ops {
  74         /* Set deferred update mode, used for batching operations. */
  75         void (*enter)(void);
  76         void (*leave)(void);
  77 };
  78
  79 struct pv_time_ops {
  80         void (*time_init)(void);
  81
  82         /* Set and set time of day */
  83         unsigned long (*get_wallclock)(void);
  84         int (*set_wallclock)(unsigned long);
  85
  86         unsigned long long (*sched_clock)(void);
  87         unsigned long (*get_tsc_khz)(void);
  88 };
  89
  90 struct pv_cpu_ops {
  91         /* hooks for various privileged instructions */
  92         unsigned long (*get_debugreg)(int regno);
  93         void (*set_debugreg)(int regno, unsigned long value);
  94
  95         void (*clts)(void);
  96
  97         unsigned long (*read_cr0)(void);
  98         void (*write_cr0)(unsigned long);
  99
 100         unsigned long (*read_cr4_safe)(void);
 101         unsigned long (*read_cr4)(void);
 102         void (*write_cr4)(unsigned long);
 103
 104 #ifdef CONFIG_X86_64
 105         unsigned long (*read_cr8)(void);
 106         void (*write_cr8)(unsigned long);
 107 #endif
 108
 109         /* Segment descriptor handling */
 110         void (*load_tr_desc)(void);
 111         void (*load_gdt)(const struct desc_ptr *);
 112         void (*load_idt)(const struct desc_ptr *);
 113         void (*store_gdt)(struct desc_ptr *);
 114         void (*store_idt)(struct desc_ptr *);
 115         void (*set_ldt)(const void *desc, unsigned entries);
 116         unsigned long (*store_tr)(void);
 117         void (*load_tls)(struct thread_struct *t, unsigned int cpu);
 118 #ifdef CONFIG_X86_64
 119         void (*load_gs_index)(unsigned int idx);
 120 #endif
 121         void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
 122                                 const void *desc);
 123         void (*write_gdt_entry)(struct desc_struct *,
 124                                 int entrynum, const void *desc, int size);
 125         void (*write_idt_entry)(gate_desc *,
 126                                 int entrynum, const gate_desc *gate);
 127         void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
 128
 129         void (*set_iopl_mask)(unsigned mask);
 130
 131         void (*wbinvd)(void);
 132         void (*io_delay)(void);
 133
 134         /* cpuid emulation, mostly so that caps bits can be disabled */
 135         void (*cpuid)(unsigned int *eax, unsigned int *ebx,
 136                       unsigned int *ecx, unsigned int *edx);
 137
 138         /* MSR, PMC and TSR operations.
 139            err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
 140         u64 (*read_msr)(unsigned int msr, int *err);
 141         int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
 142
 143         u64 (*read_tsc)(void);
 144         u64 (*read_pmc)(int counter);
 145         unsigned long long (*read_tscp)(unsigned int *aux);
 146
 147         /*
 148          * Atomically enable interrupts and return to userspace.  This
 149          * is only ever used to return to 32-bit processes; in a
 150          * 64-bit kernel, it's used for 32-on-64 compat processes, but
 151          * never native 64-bit processes.  (Jump, not call.)
 152          */
 153         void (*irq_enable_sysexit)(void);
 154
 155         /*
 156          * Switch to usermode gs and return to 64-bit usermode using
 157          * sysret.  Only used in 64-bit kernels to return to 64-bit
 158          * processes.  Usermode register state, including %rsp, must
 159          * already be restored.
 160          */
 161         void (*usergs_sysret64)(void);
 162
 163         /*
 164          * Switch to usermode gs and return to 32-bit usermode using
 165          * sysret.  Used to return to 32-on-64 compat processes.
 166          * Other usermode register state, including %esp, must already
 167          * be restored.
 168          */
 169         void (*usergs_sysret32)(void);
 170
 171         /* Normal iret.  Jump to this with the standard iret stack
 172            frame set up. */
 173         void (*iret)(void);
 174
 175         void (*swapgs)(void);
 176
 177         struct pv_lazy_ops lazy_mode;
 178 };
 179
 180 struct pv_irq_ops {
 181         void (*init_IRQ)(void);
 182
 183         /*
 184          * Get/set interrupt state.  save_fl and restore_fl are only
 185          * expected to use X86_EFLAGS_IF; all other bits
 186          * returned from save_fl are undefined, and may be ignored by
 187          * restore_fl.
 188          */
 189         unsigned long (*save_fl)(void);
 190         void (*restore_fl)(unsigned long);
 191         void (*irq_disable)(void);
 192         void (*irq_enable)(void);
 193         void (*safe_halt)(void);
 194         void (*halt)(void);
 195
 196 #ifdef CONFIG_X86_64
 197         void (*adjust_exception_frame)(void);
 198 #endif
 199 };
 200
 201 struct pv_apic_ops {
 202 #ifdef CONFIG_X86_LOCAL_APIC
 203         void (*setup_boot_clock)(void);
 204         void (*setup_secondary_clock)(void);
 205
 206         void (*startup_ipi_hook)(int phys_apicid,
 207                                  unsigned long start_eip,
 208                                  unsigned long start_esp);
 209 #endif
 210 };
 211
 212 struct pv_mmu_ops {
 213         /*
 214          * Called before/after init_mm pagetable setup. setup_start
 215          * may reset %cr3, and may pre-install parts of the pagetable;
 216          * pagetable setup is expected to preserve any existing
 217          * mapping.
 218          */
 219         void (*pagetable_setup_start)(pgd_t *pgd_base);
 220         void (*pagetable_setup_done)(pgd_t *pgd_base);
 221
 222         unsigned long (*read_cr2)(void);
 223         void (*write_cr2)(unsigned long);
 224
 225         unsigned long (*read_cr3)(void);
 226         void (*write_cr3)(unsigned long);
 227
 228         /*
 229          * Hooks for intercepting the creation/use/destruction of an
 230          * mm_struct.
 231          */
 232         void (*activate_mm)(struct mm_struct *prev,
 233                             struct mm_struct *next);
 234         void (*dup_mmap)(struct mm_struct *oldmm,
 235                          struct mm_struct *mm);
 236         void (*exit_mmap)(struct mm_struct *mm);
 237
 238
 239         /* TLB operations */
 240         void (*flush_tlb_user)(void);
 241         void (*flush_tlb_kernel)(void);
 242         void (*flush_tlb_single)(unsigned long addr);
 243         void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
 244                                  unsigned long va);
 245
 246         /* Hooks for allocating and freeing a pagetable top-level */
 247         int  (*pgd_alloc)(struct mm_struct *mm);
 248         void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
 249
 250         /*
 251          * Hooks for allocating/releasing pagetable pages when they're
 252          * attached to a pagetable
 253          */
 254         void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
 255         void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
 256         void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
 257         void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
 258         void (*release_pte)(u32 pfn);
 259         void (*release_pmd)(u32 pfn);
 260         void (*release_pud)(u32 pfn);
 261
 262         /* Pagetable manipulation functions */
 263         void (*set_pte)(pte_t *ptep, pte_t pteval);
 264         void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
 265                            pte_t *ptep, pte_t pteval);
 266         void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
 267         void (*pte_update)(struct mm_struct *mm, unsigned long addr,
 268                            pte_t *ptep);
 269         void (*pte_update_defer)(struct mm_struct *mm,
 270                                  unsigned long addr, pte_t *ptep);
 271
 272         pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
 273                                         pte_t *ptep);
 274         void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
 275                                         pte_t *ptep, pte_t pte);
 276
 277         pteval_t (*pte_val)(pte_t);
 278         pteval_t (*pte_flags)(pte_t);
 279         pte_t (*make_pte)(pteval_t pte);
 280
 281         pgdval_t (*pgd_val)(pgd_t);
 282         pgd_t (*make_pgd)(pgdval_t pgd);
 283
 284 #if PAGETABLE_LEVELS >= 3
 285 #ifdef CONFIG_X86_PAE
 286         void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
 287         void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
 288                                 pte_t *ptep, pte_t pte);
 289         void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
 290                           pte_t *ptep);
 291         void (*pmd_clear)(pmd_t *pmdp);
 292
 293 #endif  /* CONFIG_X86_PAE */
 294
 295         void (*set_pud)(pud_t *pudp, pud_t pudval);
 296
 297         pmdval_t (*pmd_val)(pmd_t);
 298         pmd_t (*make_pmd)(pmdval_t pmd);
 299
 300 #if PAGETABLE_LEVELS == 4
 301         pudval_t (*pud_val)(pud_t);
 302         pud_t (*make_pud)(pudval_t pud);
 303
 304         void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
 305 #endif  /* PAGETABLE_LEVELS == 4 */
 306 #endif  /* PAGETABLE_LEVELS >= 3 */
 307
 308 #ifdef CONFIG_HIGHPTE
 309         void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
 310 #endif
 311
 312         struct pv_lazy_ops lazy_mode;
 313
 314         /* dom0 ops */
 315
 316         /* Sometimes the physical address is a pfn, and sometimes its
 317            an mfn.  We can tell which is which from the index. */
 318         void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
 319                            unsigned long phys, pgprot_t flags);
 320 };
 321
 322 struct raw_spinlock;
 323 struct pv_lock_ops {
 324         int (*spin_is_locked)(struct raw_spinlock *lock);
 325         int (*spin_is_contended)(struct raw_spinlock *lock);
 326         void (*spin_lock)(struct raw_spinlock *lock);
 327         int (*spin_trylock)(struct raw_spinlock *lock);
 328         void (*spin_unlock)(struct raw_spinlock *lock);
 329 };
 330
 331 /* This contains all the paravirt structures: we get a convenient
 332  * number for each function using the offset which we use to indicate
 333  * what to patch. */
 334 struct paravirt_patch_template {
 335         struct pv_init_ops pv_init_ops;
 336         struct pv_time_ops pv_time_ops;
 337         struct pv_cpu_ops pv_cpu_ops;
 338         struct pv_irq_ops pv_irq_ops;
 339         struct pv_apic_ops pv_apic_ops;
 340         struct pv_mmu_ops pv_mmu_ops;
 341         struct pv_lock_ops pv_lock_ops;
 342 };
 343
 344 extern struct pv_info pv_info;
 345 extern struct pv_init_ops pv_init_ops;
 346 extern struct pv_time_ops pv_time_ops;
 347 extern struct pv_cpu_ops pv_cpu_ops;
 348 extern struct pv_irq_ops pv_irq_ops;
 349 extern struct pv_apic_ops pv_apic_ops;
 350 extern struct pv_mmu_ops pv_mmu_ops;
 351 extern struct pv_lock_ops pv_lock_ops;
 352
 353 #define PARAVIRT_PATCH(x)                                       \
 354         (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
 355
 356 #define paravirt_type(op)                               \
 357         [paravirt_typenum] "i" (PARAVIRT_PATCH(op)),    \
 358         [paravirt_opptr] "m" (op)
 359 #define paravirt_clobber(clobber)               \
 360         [paravirt_clobber] "i" (clobber)
 361
 362 /*
 363  * Generate some code, and mark it as patchable by the
 364  * apply_paravirt() alternate instruction patcher.
 365  */
 366 #define _paravirt_alt(insn_string, type, clobber)       \
 367         "771:\n\t" insn_string "\n" "772:\n"            \
 368         ".pushsection .parainstructions,\"a\"\n"        \
 369         _ASM_ALIGN "\n"                                 \
 370         _ASM_PTR " 771b\n"                              \
 371         "  .byte " type "\n"                            \
 372         "  .byte 772b-771b\n"                           \
 373         "  .short " clobber "\n"                        \
 374         ".popsection\n"
 375
 376 /* Generate patchable code, with the default asm parameters. */
 377 #define paravirt_alt(insn_string)                                       \
 378         _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
 379
 380 /* Simple instruction patching code. */
 381 #define DEF_NATIVE(ops, name, code)                                     \
 382         extern const char start_##ops##_##name[], end_##ops##_##name[]; \
 383         asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
 384
 385 unsigned paravirt_patch_nop(void);
 386 unsigned paravirt_patch_ignore(unsigned len);
 387 unsigned paravirt_patch_call(void *insnbuf,
 388                              const void *target, u16 tgt_clobbers,
 389                              unsigned long addr, u16 site_clobbers,
 390                              unsigned len);
 391 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
 392                             unsigned long addr, unsigned len);
 393 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
 394                                 unsigned long addr, unsigned len);
 395
 396 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
 397                               const char *start, const char *end);
 398
 399 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
 400                       unsigned long addr, unsigned len);
 401
 402 int paravirt_disable_iospace(void);
 403
 404 /*
 405  * This generates an indirect call based on the operation type number.
 406  * The type number, computed in PARAVIRT_PATCH, is derived from the
 407  * offset into the paravirt_patch_template structure, and can therefore be
 408  * freely converted back into a structure offset.
 409  */
 410 #define PARAVIRT_CALL   "call *%[paravirt_opptr];"
 411
 412 /*
 413  * These macros are intended to wrap calls through one of the paravirt
 414  * ops structs, so that they can be later identified and patched at
 415  * runtime.
 416  *
 417  * Normally, a call to a pv_op function is a simple indirect call:
 418  * (pv_op_struct.operations)(args...).
 419  *
 420  * Unfortunately, this is a relatively slow operation for modern CPUs,
 421  * because it cannot necessarily determine what the destination
 422  * address is.  In this case, the address is a runtime constant, so at
 423  * the very least we can patch the call to e a simple direct call, or
 424  * ideally, patch an inline implementation into the callsite.  (Direct
 425  * calls are essentially free, because the call and return addresses
 426  * are completely predictable.)
 427  *
 428  * For i386, these macros rely on the standard gcc "regparm(3)" calling
 429  * convention, in which the first three arguments are placed in %eax,
 430  * %edx, %ecx (in that order), and the remaining arguments are placed
 431  * on the stack.  All caller-save registers (eax,edx,ecx) are expected
 432  * to be modified (either clobbered or used for return values).
 433  * X86_64, on the other hand, already specifies a register-based calling
 434  * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
 435  * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
 436  * special handling for dealing with 4 arguments, unlike i386.
 437  * However, x86_64 also have to clobber all caller saved registers, which
 438  * unfortunately, are quite a bit (r8 - r11)
 439  *
 440  * The call instruction itself is marked by placing its start address
 441  * and size into the .parainstructions section, so that
 442  * apply_paravirt() in arch/i386/kernel/alternative.c can do the
 443  * appropriate patching under the control of the backend pv_init_ops
 444  * implementation.
 445  *
 446  * Unfortunately there's no way to get gcc to generate the args setup
 447  * for the call, and then allow the call itself to be generated by an
 448  * inline asm.  Because of this, we must do the complete arg setup and
 449  * return value handling from within these macros.  This is fairly
 450  * cumbersome.
 451  *
 452  * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
 453  * It could be extended to more arguments, but there would be little
 454  * to be gained from that.  For each number of arguments, there are
 455  * the two VCALL and CALL variants for void and non-void functions.
 456  *
 457  * When there is a return value, the invoker of the macro must specify
 458  * the return type.  The macro then uses sizeof() on that type to
 459  * determine whether its a 32 or 64 bit value, and places the return
 460  * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
 461  * 64-bit). For x86_64 machines, it just returns at %rax regardless of
 462  * the return value size.
 463  *
 464  * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
 465  * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
 466  * in low,high order
 467  *
 468  * Small structures are passed and returned in registers.  The macro
 469  * calling convention can't directly deal with this, so the wrapper
 470  * functions must do this.
 471  *
 472  * These PVOP_* macros are only defined within this header.  This
 473  * means that all uses must be wrapped in inline functions.  This also
 474  * makes sure the incoming and outgoing types are always correct.
 475  */
 476 #ifdef CONFIG_X86_32
 477 #define PVOP_VCALL_ARGS                 unsigned long __eax, __edx, __ecx
 478 #define PVOP_CALL_ARGS                  PVOP_VCALL_ARGS
 479 #define PVOP_VCALL_CLOBBERS             "=a" (__eax), "=d" (__edx),     \
 480                                         "=c" (__ecx)
 481 #define PVOP_CALL_CLOBBERS              PVOP_VCALL_CLOBBERS
 482 #define EXTRA_CLOBBERS
 483 #define VEXTRA_CLOBBERS
 484 #else
 485 #define PVOP_VCALL_ARGS         unsigned long __edi, __esi, __edx, __ecx
 486 #define PVOP_CALL_ARGS          PVOP_VCALL_ARGS, __eax
 487 #define PVOP_VCALL_CLOBBERS     "=D" (__edi),                           \
 488                                 "=S" (__esi), "=d" (__edx),             \
 489                                 "=c" (__ecx)
 490
 491 #define PVOP_CALL_CLOBBERS      PVOP_VCALL_CLOBBERS, "=a" (__eax)
 492
 493 #define EXTRA_CLOBBERS   , "r8", "r9", "r10", "r11"
 494 #define VEXTRA_CLOBBERS  , "rax", "r8", "r9", "r10", "r11"
 495 #endif
 496
 497 #ifdef CONFIG_PARAVIRT_DEBUG
 498 #define PVOP_TEST_NULL(op)      BUG_ON(op == NULL)
 499 #else
 500 #define PVOP_TEST_NULL(op)      ((void)op)
 501 #endif
 502
 503 #define __PVOP_CALL(rettype, op, pre, post, ...)                        \
 504         ({                                                              \
 505                 rettype __ret;                                          \
 506                 PVOP_CALL_ARGS;                                 \
 507                 PVOP_TEST_NULL(op);                                     \
 508                 /* This is 32-bit specific, but is okay in 64-bit */    \
 509                 /* since this condition will never hold */              \
 510                 if (sizeof(rettype) > sizeof(unsigned long)) {          \
 511                         asm volatile(pre                                \
 512                                      paravirt_alt(PARAVIRT_CALL)        \
 513                                      post                               \
 514                                      : PVOP_CALL_CLOBBERS               \
 515                                      : paravirt_type(op),               \
 516                                        paravirt_clobber(CLBR_ANY),      \
 517                                        ##__VA_ARGS__                    \
 518                                      : "memory", "cc" EXTRA_CLOBBERS);  \
 519                         __ret = (rettype)((((u64)__edx) << 32) | __eax); \
 520                 } else {                                                \
 521                         asm volatile(pre                                \
 522                                      paravirt_alt(PARAVIRT_CALL)        \
 523                                      post                               \
 524                                      : PVOP_CALL_CLOBBERS               \
 525                                      : paravirt_type(op),               \
 526                                        paravirt_clobber(CLBR_ANY),      \
 527                                        ##__VA_ARGS__                    \
 528                                      : "memory", "cc" EXTRA_CLOBBERS);  \
 529                         __ret = (rettype)__eax;                         \
 530                 }                                                       \
 531                 __ret;                                                  \
 532         })
 533 #define __PVOP_VCALL(op, pre, post, ...)                                \
 534         ({                                                              \
 535                 PVOP_VCALL_ARGS;                                        \
 536                 PVOP_TEST_NULL(op);                                     \
 537                 asm volatile(pre                                        \
 538                              paravirt_alt(PARAVIRT_CALL)                \
 539                              post                                       \
 540                              : PVOP_VCALL_CLOBBERS                      \
 541                              : paravirt_type(op),                       \
 542                                paravirt_clobber(CLBR_ANY),              \
 543                                ##__VA_ARGS__                            \
 544                              : "memory", "cc" VEXTRA_CLOBBERS);         \
 545         })
 546
 547 #define PVOP_CALL0(rettype, op)                                         \
 548         __PVOP_CALL(rettype, op, "", "")
 549 #define PVOP_VCALL0(op)                                                 \
 550         __PVOP_VCALL(op, "", "")
 551
 552 #define PVOP_CALL1(rettype, op, arg1)                                   \
 553         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
 554 #define PVOP_VCALL1(op, arg1)                                           \
 555         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
 556
 557 #define PVOP_CALL2(rettype, op, arg1, arg2)                             \
 558         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
 559         "1" ((unsigned long)(arg2)))
 560 #define PVOP_VCALL2(op, arg1, arg2)                                     \
 561         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
 562         "1" ((unsigned long)(arg2)))
 563
 564 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3)                       \
 565         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
 566         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
 567 #define PVOP_VCALL3(op, arg1, arg2, arg3)                               \
 568         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
 569         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
 570
 571 /* This is the only difference in x86_64. We can make it much simpler */
 572 #ifdef CONFIG_X86_32
 573 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 574         __PVOP_CALL(rettype, op,                                        \
 575                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 576                     "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
 577                     "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
 578 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 579         __PVOP_VCALL(op,                                                \
 580                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 581                     "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
 582                     "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
 583 #else
 584 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 585         __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)),   \
 586         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)),         \
 587         "3"((unsigned long)(arg4)))
 588 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 589         __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)),           \
 590         "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)),         \
 591         "3"((unsigned long)(arg4)))
 592 #endif
 593
 594 static inline int paravirt_enabled(void)
 595 {
 596         return pv_info.paravirt_enabled;
 597 }
 598
 599 static inline void load_sp0(struct tss_struct *tss,
 600                              struct thread_struct *thread)
 601 {
 602         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
 603 }
 604
 605 #define ARCH_SETUP                      pv_init_ops.arch_setup();
 606 static inline unsigned long get_wallclock(void)
 607 {
 608         return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
 609 }
 610
 611 static inline int set_wallclock(unsigned long nowtime)
 612 {
 613         return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
 614 }
 615
 616 static inline void (*choose_time_init(void))(void)
 617 {
 618         return pv_time_ops.time_init;
 619 }
 620
 621 /* The paravirtualized CPUID instruction. */
 622 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
 623                            unsigned int *ecx, unsigned int *edx)
 624 {
 625         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
 626 }
 627
 628 /*
 629  * These special macros can be used to get or set a debugging register
 630  */
 631 static inline unsigned long paravirt_get_debugreg(int reg)
 632 {
 633         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
 634 }
 635 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
 636 static inline void set_debugreg(unsigned long val, int reg)
 637 {
 638         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
 639 }
 640
 641 static inline void clts(void)
 642 {
 643         PVOP_VCALL0(pv_cpu_ops.clts);
 644 }
 645
 646 static inline unsigned long read_cr0(void)
 647 {
 648         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
 649 }
 650
 651 static inline void write_cr0(unsigned long x)
 652 {
 653         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
 654 }
 655
 656 static inline unsigned long read_cr2(void)
 657 {
 658         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
 659 }
 660
 661 static inline void write_cr2(unsigned long x)
 662 {
 663         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
 664 }
 665
 666 static inline unsigned long read_cr3(void)
 667 {
 668         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
 669 }
 670
 671 static inline void write_cr3(unsigned long x)
 672 {
 673         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
 674 }
 675
 676 static inline unsigned long read_cr4(void)
 677 {
 678         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
 679 }
 680 static inline unsigned long read_cr4_safe(void)
 681 {
 682         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
 683 }
 684
 685 static inline void write_cr4(unsigned long x)
 686 {
 687         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
 688 }
 689
 690 #ifdef CONFIG_X86_64
 691 static inline unsigned long read_cr8(void)
 692 {
 693         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
 694 }
 695
 696 static inline void write_cr8(unsigned long x)
 697 {
 698         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
 699 }
 700 #endif
 701
 702 static inline void raw_safe_halt(void)
 703 {
 704         PVOP_VCALL0(pv_irq_ops.safe_halt);
 705 }
 706
 707 static inline void halt(void)
 708 {
 709         PVOP_VCALL0(pv_irq_ops.safe_halt);
 710 }
 711
 712 static inline void wbinvd(void)
 713 {
 714         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 715 }
 716
 717 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 718
 719 static inline u64 paravirt_read_msr(unsigned msr, int *err)
 720 {
 721         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
 722 }
 723 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
 724 {
 725         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
 726 }
 727
 728 /* These should all do BUG_ON(_err), but our headers are too tangled. */
 729 #define rdmsr(msr, val1, val2)                  \
 730 do {                                            \
 731         int _err;                               \
 732         u64 _l = paravirt_read_msr(msr, &_err); \
 733         val1 = (u32)_l;                         \
 734         val2 = _l >> 32;                        \
 735 } while (0)
 736
 737 #define wrmsr(msr, val1, val2)                  \
 738 do {                                            \
 739         paravirt_write_msr(msr, val1, val2);    \
 740 } while (0)
 741
 742 #define rdmsrl(msr, val)                        \
 743 do {                                            \
 744         int _err;                               \
 745         val = paravirt_read_msr(msr, &_err);    \
 746 } while (0)
 747
 748 #define wrmsrl(msr, val)        wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
 749 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
 750
 751 /* rdmsr with exception handling */
 752 #define rdmsr_safe(msr, a, b)                   \
 753 ({                                              \
 754         int _err;                               \
 755         u64 _l = paravirt_read_msr(msr, &_err); \
 756         (*a) = (u32)_l;                         \
 757         (*b) = _l >> 32;                        \
 758         _err;                                   \
 759 })
 760
 761 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 762 {
 763         int err;
 764
 765         *p = paravirt_read_msr(msr, &err);
 766         return err;
 767 }
 768
 769 static inline u64 paravirt_read_tsc(void)
 770 {
 771         return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
 772 }
 773
 774 #define rdtscl(low)                             \
 775 do {                                            \
 776         u64 _l = paravirt_read_tsc();           \
 777         low = (int)_l;                          \
 778 } while (0)
 779
 780 #define rdtscll(val) (val = paravirt_read_tsc())
 781
 782 static inline unsigned long long paravirt_sched_clock(void)
 783 {
 784         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 785 }
 786 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
 787
 788 static inline unsigned long long paravirt_read_pmc(int counter)
 789 {
 790         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 791 }
 792
 793 #define rdpmc(counter, low, high)               \
 794 do {                                            \
 795         u64 _l = paravirt_read_pmc(counter);    \
 796         low = (u32)_l;                          \
 797         high = _l >> 32;                        \
 798 } while (0)
 799
 800 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
 801 {
 802         return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
 803 }
 804
 805 #define rdtscp(low, high, aux)                          \
 806 do {                                                    \
 807         int __aux;                                      \
 808         unsigned long __val = paravirt_rdtscp(&__aux);  \
 809         (low) = (u32)__val;                             \
 810         (high) = (u32)(__val >> 32);                    \
 811         (aux) = __aux;                                  \
 812 } while (0)
 813
 814 #define rdtscpll(val, aux)                              \
 815 do {                                                    \
 816         unsigned long __aux;                            \
 817         val = paravirt_rdtscp(&__aux);                  \
 818         (aux) = __aux;                                  \
 819 } while (0)
 820
 821 static inline void load_TR_desc(void)
 822 {
 823         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 824 }
 825 static inline void load_gdt(const struct desc_ptr *dtr)
 826 {
 827         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 828 }
 829 static inline void load_idt(const struct desc_ptr *dtr)
 830 {
 831         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 832 }
 833 static inline void set_ldt(const void *addr, unsigned entries)
 834 {
 835         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 836 }
 837 static inline void store_gdt(struct desc_ptr *dtr)
 838 {
 839         PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
 840 }
 841 static inline void store_idt(struct desc_ptr *dtr)
 842 {
 843         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
 844 }
 845 static inline unsigned long paravirt_store_tr(void)
 846 {
 847         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 848 }
 849 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 850 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 851 {
 852         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
 853 }
 854
 855 #ifdef CONFIG_X86_64
 856 static inline void load_gs_index(unsigned int gs)
 857 {
 858         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
 859 }
 860 #endif
 861
 862 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 863                                    const void *desc)
 864 {
 865         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
 866 }
 867
 868 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 869                                    void *desc, int type)
 870 {
 871         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
 872 }
 873
 874 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 875 {
 876         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
 877 }
 878 static inline void set_iopl_mask(unsigned mask)
 879 {
 880         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
 881 }
 882
 883 /* The paravirtualized I/O functions */
 884 static inline void slow_down_io(void)
 885 {
 886         pv_cpu_ops.io_delay();
 887 #ifdef REALLY_SLOW_IO
 888         pv_cpu_ops.io_delay();
 889         pv_cpu_ops.io_delay();
 890         pv_cpu_ops.io_delay();
 891 #endif
 892 }
 893
 894 #ifdef CONFIG_X86_LOCAL_APIC
 895 static inline void setup_boot_clock(void)
 896 {
 897         PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
 898 }
 899
 900 static inline void setup_secondary_clock(void)
 901 {
 902         PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
 903 }
 904 #endif
 905
 906 static inline void paravirt_post_allocator_init(void)
 907 {
 908         if (pv_init_ops.post_allocator_init)
 909                 (*pv_init_ops.post_allocator_init)();
 910 }
 911
 912 static inline void paravirt_pagetable_setup_start(pgd_t *base)
 913 {
 914         (*pv_mmu_ops.pagetable_setup_start)(base);
 915 }
 916
 917 static inline void paravirt_pagetable_setup_done(pgd_t *base)
 918 {
 919         (*pv_mmu_ops.pagetable_setup_done)(base);
 920 }
 921
 922 #ifdef CONFIG_SMP
 923 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
 924                                     unsigned long start_esp)
 925 {
 926         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
 927                     phys_apicid, start_eip, start_esp);
 928 }
 929 #endif
 930
 931 static inline void paravirt_activate_mm(struct mm_struct *prev,
 932                                         struct mm_struct *next)
 933 {
 934         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
 935 }
 936
 937 static inline void arch_dup_mmap(struct mm_struct *oldmm,
 938                                  struct mm_struct *mm)
 939 {
 940         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
 941 }
 942
 943 static inline void arch_exit_mmap(struct mm_struct *mm)
 944 {
 945         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
 946 }
 947
 948 static inline void __flush_tlb(void)
 949 {
 950         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
 951 }
 952 static inline void __flush_tlb_global(void)
 953 {
 954         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
 955 }
 956 static inline void __flush_tlb_single(unsigned long addr)
 957 {
 958         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
 959 }
 960
 961 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
 962                                     unsigned long va)
 963 {
 964         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
 965 }
 966
 967 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 968 {
 969         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
 970 }
 971
 972 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 973 {
 974         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
 975 }
 976
 977 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
 978 {
 979         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
 980 }
 981 static inline void paravirt_release_pte(unsigned pfn)
 982 {
 983         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
 984 }
 985
 986 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
 987 {
 988         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
 989 }
 990
 991 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
 992                                             unsigned start, unsigned count)
 993 {
 994         PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
 995 }
 996 static inline void paravirt_release_pmd(unsigned pfn)
 997 {
 998         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
 999 }
1000
1001 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
1002 {
1003         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1004 }
1005 static inline void paravirt_release_pud(unsigned pfn)
1006 {
1007         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1008 }
1009
1010 #ifdef CONFIG_HIGHPTE
1011 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1012 {
1013         unsigned long ret;
1014         ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1015         return (void *)ret;
1016 }
1017 #endif
1018
1019 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1020                               pte_t *ptep)
1021 {
1022         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1023 }
1024
1025 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1026                                     pte_t *ptep)
1027 {
1028         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1029 }
1030
1031 static inline pte_t __pte(pteval_t val)
1032 {
1033         pteval_t ret;
1034
1035         if (sizeof(pteval_t) > sizeof(long))
1036                 ret = PVOP_CALL2(pteval_t,
1037                                  pv_mmu_ops.make_pte,
1038                                  val, (u64)val >> 32);
1039         else
1040                 ret = PVOP_CALL1(pteval_t,
1041                                  pv_mmu_ops.make_pte,
1042                                  val);
1043
1044         return (pte_t) { .pte = ret };
1045 }
1046
1047 static inline pteval_t pte_val(pte_t pte)
1048 {
1049         pteval_t ret;
1050
1051         if (sizeof(pteval_t) > sizeof(long))
1052                 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1053                                  pte.pte, (u64)pte.pte >> 32);
1054         else
1055                 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1056                                  pte.pte);
1057
1058         return ret;
1059 }
1060
1061 static inline pteval_t pte_flags(pte_t pte)
1062 {
1063         pteval_t ret;
1064
1065         if (sizeof(pteval_t) > sizeof(long))
1066                 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1067                                  pte.pte, (u64)pte.pte >> 32);
1068         else
1069                 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1070                                  pte.pte);
1071
1072 #ifdef CONFIG_PARAVIRT_DEBUG
1073         BUG_ON(ret & PTE_PFN_MASK);
1074 #endif
1075         return ret;
1076 }
1077
1078 static inline pgd_t __pgd(pgdval_t val)
1079 {
1080         pgdval_t ret;
1081
1082         if (sizeof(pgdval_t) > sizeof(long))
1083                 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1084                                  val, (u64)val >> 32);
1085         else
1086                 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1087                                  val);
1088
1089         return (pgd_t) { ret };
1090 }
1091
1092 static inline pgdval_t pgd_val(pgd_t pgd)
1093 {
1094         pgdval_t ret;
1095
1096         if (sizeof(pgdval_t) > sizeof(long))
1097                 ret =  PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1098                                   pgd.pgd, (u64)pgd.pgd >> 32);
1099         else
1100                 ret =  PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1101                                   pgd.pgd);
1102
1103         return ret;
1104 }
1105
1106 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1107 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1108                                            pte_t *ptep)
1109 {
1110         pteval_t ret;
1111
1112         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1113                          mm, addr, ptep);
1114
1115         return (pte_t) { .pte = ret };
1116 }
1117
1118 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1119                                            pte_t *ptep, pte_t pte)
1120 {
1121         if (sizeof(pteval_t) > sizeof(long))
1122                 /* 5 arg words */
1123                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1124         else
1125                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1126                             mm, addr, ptep, pte.pte);
1127 }
1128
1129 static inline void set_pte(pte_t *ptep, pte_t pte)
1130 {
1131         if (sizeof(pteval_t) > sizeof(long))
1132                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1133                             pte.pte, (u64)pte.pte >> 32);
1134         else
1135                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1136                             pte.pte);
1137 }
1138
1139 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1140                               pte_t *ptep, pte_t pte)
1141 {
1142         if (sizeof(pteval_t) > sizeof(long))
1143                 /* 5 arg words */
1144                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1145         else
1146                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1147 }
1148
1149 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1150 {
1151         pmdval_t val = native_pmd_val(pmd);
1152
1153         if (sizeof(pmdval_t) > sizeof(long))
1154                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1155         else
1156                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1157 }
1158
1159 #if PAGETABLE_LEVELS >= 3
1160 static inline pmd_t __pmd(pmdval_t val)
1161 {
1162         pmdval_t ret;
1163
1164         if (sizeof(pmdval_t) > sizeof(long))
1165                 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1166                                  val, (u64)val >> 32);
1167         else
1168                 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1169                                  val);
1170
1171         return (pmd_t) { ret };
1172 }
1173
1174 static inline pmdval_t pmd_val(pmd_t pmd)
1175 {
1176         pmdval_t ret;
1177
1178         if (sizeof(pmdval_t) > sizeof(long))
1179                 ret =  PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1180                                   pmd.pmd, (u64)pmd.pmd >> 32);
1181         else
1182                 ret =  PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1183                                   pmd.pmd);
1184
1185         return ret;
1186 }
1187
1188 static inline void set_pud(pud_t *pudp, pud_t pud)
1189 {
1190         pudval_t val = native_pud_val(pud);
1191
1192         if (sizeof(pudval_t) > sizeof(long))
1193                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1194                             val, (u64)val >> 32);
1195         else
1196                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1197                             val);
1198 }
1199 #if PAGETABLE_LEVELS == 4
1200 static inline pud_t __pud(pudval_t val)
1201 {
1202         pudval_t ret;
1203
1204         if (sizeof(pudval_t) > sizeof(long))
1205                 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1206                                  val, (u64)val >> 32);
1207         else
1208                 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1209                                  val);
1210
1211         return (pud_t) { ret };
1212 }
1213
1214 static inline pudval_t pud_val(pud_t pud)
1215 {
1216         pudval_t ret;
1217
1218         if (sizeof(pudval_t) > sizeof(long))
1219                 ret =  PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1220                                   pud.pud, (u64)pud.pud >> 32);
1221         else
1222                 ret =  PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1223                                   pud.pud);
1224
1225         return ret;
1226 }
1227
1228 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1229 {
1230         pgdval_t val = native_pgd_val(pgd);
1231
1232         if (sizeof(pgdval_t) > sizeof(long))
1233                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1234                             val, (u64)val >> 32);
1235         else
1236                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1237                             val);
1238 }
1239
1240 static inline void pgd_clear(pgd_t *pgdp)
1241 {
1242         set_pgd(pgdp, __pgd(0));
1243 }
1244
1245 static inline void pud_clear(pud_t *pudp)
1246 {
1247         set_pud(pudp, __pud(0));
1248 }
1249
1250 #endif  /* PAGETABLE_LEVELS == 4 */
1251
1252 #endif  /* PAGETABLE_LEVELS >= 3 */
1253
1254 #ifdef CONFIG_X86_PAE
1255 /* Special-case pte-setting operations for PAE, which can't update a
1256    64-bit pte atomically */
1257 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1258 {
1259         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1260                     pte.pte, pte.pte >> 32);
1261 }
1262
1263 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1264                                    pte_t *ptep, pte_t pte)
1265 {
1266         /* 5 arg words */
1267         pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1268 }
1269
1270 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1271                              pte_t *ptep)
1272 {
1273         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1274 }
1275
1276 static inline void pmd_clear(pmd_t *pmdp)
1277 {
1278         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1279 }
1280 #else  /* !CONFIG_X86_PAE */
1281 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1282 {
1283         set_pte(ptep, pte);
1284 }
1285
1286 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1287                                    pte_t *ptep, pte_t pte)
1288 {
1289         set_pte(ptep, pte);
1290 }
1291
1292 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1293                              pte_t *ptep)
1294 {
1295         set_pte_at(mm, addr, ptep, __pte(0));
1296 }
1297
1298 static inline void pmd_clear(pmd_t *pmdp)
1299 {
1300         set_pmd(pmdp, __pmd(0));
1301 }
1302 #endif  /* CONFIG_X86_PAE */
1303
1304 /* Lazy mode for batching updates / context switch */
1305 enum paravirt_lazy_mode {
1306         PARAVIRT_LAZY_NONE,
1307         PARAVIRT_LAZY_MMU,
1308         PARAVIRT_LAZY_CPU,
1309 };
1310
1311 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1312 void paravirt_enter_lazy_cpu(void);
1313 void paravirt_leave_lazy_cpu(void);
1314 void paravirt_enter_lazy_mmu(void);
1315 void paravirt_leave_lazy_mmu(void);
1316 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1317
1318 #define  __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1319 static inline void arch_enter_lazy_cpu_mode(void)
1320 {
1321         PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1322 }
1323
1324 static inline void arch_leave_lazy_cpu_mode(void)
1325 {
1326         PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1327 }
1328
1329 static inline void arch_flush_lazy_cpu_mode(void)
1330 {
1331         if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1332                 arch_leave_lazy_cpu_mode();
1333                 arch_enter_lazy_cpu_mode();
1334         }
1335 }
1336
1337
1338 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1339 static inline void arch_enter_lazy_mmu_mode(void)
1340 {
1341         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1342 }
1343
1344 static inline void arch_leave_lazy_mmu_mode(void)
1345 {
1346         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1347 }
1348
1349 static inline void arch_flush_lazy_mmu_mode(void)
1350 {
1351         if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1352                 arch_leave_lazy_mmu_mode();
1353                 arch_enter_lazy_mmu_mode();
1354         }
1355 }
1356
1357 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1358                                 unsigned long phys, pgprot_t flags)
1359 {
1360         pv_mmu_ops.set_fixmap(idx, phys, flags);
1361 }
1362
1363 void _paravirt_nop(void);
1364 #define paravirt_nop    ((void *)_paravirt_nop)
1365
1366 void paravirt_use_bytelocks(void);
1367
1368 #ifdef CONFIG_SMP
1369
1370 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1371 {
1372         return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1373 }
1374
1375 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1376 {
1377         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1378 }
1379
1380 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1381 {
1382         PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1383 }
1384
1385 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1386 {
1387         return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1388 }
1389
1390 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1391 {
1392         PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1393 }
1394
1395 #endif
1396
1397 /* These all sit in the .parainstructions section to tell us what to patch. */
1398 struct paravirt_patch_site {
1399         u8 *instr;              /* original instructions */
1400         u8 instrtype;           /* type of this instruction */
1401         u8 len;                 /* length of original instruction */
1402         u16 clobbers;           /* what registers you may clobber */
1403 };
1404
1405 extern struct paravirt_patch_site __parainstructions[],
1406         __parainstructions_end[];
1407
1408 #ifdef CONFIG_X86_32
1409 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1410 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1411 #define PV_FLAGS_ARG "0"
1412 #define PV_EXTRA_CLOBBERS
1413 #define PV_VEXTRA_CLOBBERS
1414 #else
1415 /* We save some registers, but all of them, that's too much. We clobber all
1416  * caller saved registers but the argument parameter */
1417 #define PV_SAVE_REGS "pushq %%rdi;"
1418 #define PV_RESTORE_REGS "popq %%rdi;"
1419 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1420 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1421 #define PV_FLAGS_ARG "D"
1422 #endif
1423
1424 static inline unsigned long __raw_local_save_flags(void)
1425 {
1426         unsigned long f;
1427
1428         asm volatile(paravirt_alt(PV_SAVE_REGS
1429                                   PARAVIRT_CALL
1430                                   PV_RESTORE_REGS)
1431                      : "=a"(f)
1432                      : paravirt_type(pv_irq_ops.save_fl),
1433                        paravirt_clobber(CLBR_EAX)
1434                      : "memory", "cc" PV_VEXTRA_CLOBBERS);
1435         return f;
1436 }
1437
1438 static inline void raw_local_irq_restore(unsigned long f)
1439 {
1440         asm volatile(paravirt_alt(PV_SAVE_REGS
1441                                   PARAVIRT_CALL
1442                                   PV_RESTORE_REGS)
1443                      : "=a"(f)
1444                      : PV_FLAGS_ARG(f),
1445                        paravirt_type(pv_irq_ops.restore_fl),
1446                        paravirt_clobber(CLBR_EAX)
1447                      : "memory", "cc" PV_EXTRA_CLOBBERS);
1448 }
1449
1450 static inline void raw_local_irq_disable(void)
1451 {
1452         asm volatile(paravirt_alt(PV_SAVE_REGS
1453                                   PARAVIRT_CALL
1454                                   PV_RESTORE_REGS)
1455                      :
1456                      : paravirt_type(pv_irq_ops.irq_disable),
1457                        paravirt_clobber(CLBR_EAX)
1458                      : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1459 }
1460
1461 static inline void raw_local_irq_enable(void)
1462 {
1463         asm volatile(paravirt_alt(PV_SAVE_REGS
1464                                   PARAVIRT_CALL
1465                                   PV_RESTORE_REGS)
1466                      :
1467                      : paravirt_type(pv_irq_ops.irq_enable),
1468                        paravirt_clobber(CLBR_EAX)
1469                      : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1470 }
1471
1472 static inline unsigned long __raw_local_irq_save(void)
1473 {
1474         unsigned long f;
1475
1476         f = __raw_local_save_flags();
1477         raw_local_irq_disable();
1478         return f;
1479 }
1480
1481
1482 /* Make sure as little as possible of this mess escapes. */
1483 #undef PARAVIRT_CALL
1484 #undef __PVOP_CALL
1485 #undef __PVOP_VCALL
1486 #undef PVOP_VCALL0
1487 #undef PVOP_CALL0
1488 #undef PVOP_VCALL1
1489 #undef PVOP_CALL1
1490 #undef PVOP_VCALL2
1491 #undef PVOP_CALL2
1492 #undef PVOP_VCALL3
1493 #undef PVOP_CALL3
1494 #undef PVOP_VCALL4
1495 #undef PVOP_CALL4
1496
1497 #else  /* __ASSEMBLY__ */
1498
1499 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
1500 771:;                                           \
1501         ops;                                    \
1502 772:;                                           \
1503         .pushsection .parainstructions,"a";     \
1504          .align algn;                           \
1505          word 771b;                             \
1506          .byte ptype;                           \
1507          .byte 772b-771b;                       \
1508          .short clobbers;                       \
1509         .popsection
1510
1511
1512 #ifdef CONFIG_X86_64
1513 #define PV_SAVE_REGS                            \
1514         push %rax;                              \
1515         push %rcx;                              \
1516         push %rdx;                              \
1517         push %rsi;                              \
1518         push %rdi;                              \
1519         push %r8;                               \
1520         push %r9;                               \
1521         push %r10;                              \
1522         push %r11
1523 #define PV_RESTORE_REGS                         \
1524         pop %r11;                               \
1525         pop %r10;                               \
1526         pop %r9;                                \
1527         pop %r8;                                \
1528         pop %rdi;                               \
1529         pop %rsi;                               \
1530         pop %rdx;                               \
1531         pop %rcx;                               \
1532         pop %rax
1533 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
1534 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1535 #define PARA_INDIRECT(addr)     *addr(%rip)
1536 #else
1537 #define PV_SAVE_REGS   pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1538 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1539 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
1540 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1541 #define PARA_INDIRECT(addr)     *%cs:addr
1542 #endif
1543
1544 #define INTERRUPT_RETURN                                                \
1545         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
1546                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1547
1548 #define DISABLE_INTERRUPTS(clobbers)                                    \
1549         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1550                   PV_SAVE_REGS;                                         \
1551                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
1552                   PV_RESTORE_REGS;)                     \
1553
1554 #define ENABLE_INTERRUPTS(clobbers)                                     \
1555         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
1556                   PV_SAVE_REGS;                                         \
1557                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
1558                   PV_RESTORE_REGS;)
1559
1560 #define USERGS_SYSRET32                                                 \
1561         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
1562                   CLBR_NONE,                                            \
1563                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1564
1565 #ifdef CONFIG_X86_32
1566 #define GET_CR0_INTO_EAX                                \
1567         push %ecx; push %edx;                           \
1568         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1569         pop %edx; pop %ecx
1570
1571 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
1572         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1573                   CLBR_NONE,                                            \
1574                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1575
1576
1577 #else   /* !CONFIG_X86_32 */
1578
1579 /*
1580  * If swapgs is used while the userspace stack is still current,
1581  * there's no way to call a pvop.  The PV replacement *must* be
1582  * inlined, or the swapgs instruction must be trapped and emulated.
1583  */
1584 #define SWAPGS_UNSAFE_STACK                                             \
1585         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1586                   swapgs)
1587
1588 #define SWAPGS                                                          \
1589         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1590                   PV_SAVE_REGS;                                         \
1591                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs);         \
1592                   PV_RESTORE_REGS                                       \
1593                  )
1594
1595 #define GET_CR2_INTO_RCX                                \
1596         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1597         movq %rax, %rcx;                                \
1598         xorq %rax, %rax;
1599
1600 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
1601         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1602                   CLBR_NONE,                                            \
1603                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1604
1605 #define USERGS_SYSRET64                                                 \
1606         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
1607                   CLBR_NONE,                                            \
1608                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1609
1610 #define ENABLE_INTERRUPTS_SYSEXIT32                                     \
1611         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1612                   CLBR_NONE,                                            \
1613                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1614 #endif  /* CONFIG_X86_32 */
1615
1616 #endif /* __ASSEMBLY__ */
1617 #endif /* CONFIG_PARAVIRT */
1618 #endif /* ASM_X86__PARAVIRT_H */