#define STREGM std,ma
#define SHRREG shrd
#define SHLREG shld
+#define ANDCM andcm,*
+#define COND(x) * ## x
#define RP_OFFSET 16
#define FRAME_SIZE 128
#define CALLEE_REG_FRAME_SIZE 144
+#define ASM_ULONG_INSN .dword
#else /* CONFIG_64BIT */
#define LDREG ldw
#define STREG stw
#define STREGM stwm
#define SHRREG shr
#define SHLREG shlw
+#define ANDCM andcm
+#define COND(x) x
#define RP_OFFSET 20
#define FRAME_SIZE 64
#define CALLEE_REG_FRAME_SIZE 128
+#define ASM_ULONG_INSN .word
#endif
#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
#ifdef __ASSEMBLY__
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
* work around that for now... */
.level 2.0w
.endm
.macro loadgp
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
ldil L%__gp, %r27
ldo R%__gp(%r27), %r27
#else
fldd,mb -8(%r30), %fr12
.endm
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
.macro callee_save
std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
mfctl %cr27, %r3
ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
.endm
-#else /* ! __LP64__ */
+#else /* ! CONFIG_64BIT */
.macro callee_save
stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
mtctl %r3, %cr27
ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
.endm
-#endif /* ! __LP64__ */
+#endif /* ! CONFIG_64BIT */
.macro save_specials regs
mtctl %r0, %cr18
SAVE_CR (%cr18, PT_IAOQ1(\regs))
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
/* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
* For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
* reads 5 bits. Use mfctl,w to read all six bits. Otherwise