(_regs)->pc = (_pc); \
if (current->mm) \
(_regs)->p5 = current->mm->start_data; \
- current->thread_info->l1_task_info.stack_start \
+ task_thread_info(current)->l1_task_info.stack_start \
= (void *)current->mm->context.stack_start; \
- current->thread_info->l1_task_info.lowest_sp = (void *)(_usp); \
- memcpy(L1_SCRATCH_TASK_INFO, ¤t->thread_info->l1_task_info, \
+ task_thread_info(current)->l1_task_info.lowest_sp = (void *)(_usp); \
+ memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info, \
sizeof(*L1_SCRATCH_TASK_INFO)); \
wrusp(_usp); \
} while(0)
#define cpu_relax() barrier()
/* Get the Silicon Revision of the chip */
-static inline uint32_t bfin_revid(void)
+static inline __attribute_pure__ uint32_t bfin_revid(void)
{
/* stored in the upper 4 bits */
return bfin_read_CHIPID() >> 28;
}
-static inline uint32_t bfin_compiled_revid(void)
+static inline __attribute_pure__ uint32_t bfin_compiled_revid(void)
{
#if defined(CONFIG_BF_REV_0_0)
return 0;
return 4;
#elif defined(CONFIG_BF_REV_0_5)
return 5;
+#elif defined(CONFIG_BF_REV_ANY)
+ return 0xffff;
+#else
+ return -1;
#endif
}