#ifndef AT91_DBGU_H
#define AT91_DBGU_H
+#ifdef AT91_DBGU
#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */
#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */
#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */
#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */
#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */
+#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */
+#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
+
+#endif /* AT91_DBGU */
+
+/*
+ * Some AT91 parts that don't have full DEBUG units still support the ID
+ * and extensions register.
+ */
#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */
#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */
#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */
#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */
-#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */
-#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
-
#endif