<http://www.marvell.com/>. Say Y here if you wish to build a
kernel for this platform.
-config MIPS_EV96100
- bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select IRQ_CPU
- select MIPS_GT96100
- select RM7000_CPU_SCACHE
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_R5000
- select SYS_HAS_CPU_RM7000
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_BIG_ENDIAN
- help
- This is an evaluation board based on the Galileo GT-96100 LAN/WAN
- communications controllers containing a MIPS R5000 compatible core
- running at 83MHz. Their website is <http://www.marvell.com/>. Say Y
- here if you wish to build a kernel for this platform.
-
-config MIPS_IVR
- bool "Globespan IVR board"
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select ITE_BOARD_GEN
- select SYS_HAS_CPU_NEVADA
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- help
- This is an evaluation board built by Globespan to showcase thir
- iVR (Internet Video Recorder) design. It utilizes a QED RM5231
- R5000 MIPS core. More information can be found out their website
- located at <http://www.globespan.net/>. Say Y here if you wish to
- build a kernel for this platform.
-
-config MIPS_ITE8172
- bool "ITE 8172G board"
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select ITE_BOARD_GEN
- select SYS_HAS_CPU_R5432
- select SYS_HAS_CPU_NEVADA
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- help
- Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
- with ATX form factor that utilizes a MIPS R5000 to work with its
- ITE8172G companion internet appliance chip. The MIPS core can be
- either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
- a kernel for this platform.
-
config MACH_JAZZ
bool "Jazz family of machines"
select ARC
config PNX8550_V2PCI
bool "Philips PNX8550 based Viper2-PCI board"
- depends on BROKEN
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config PNX8550_JBS
bool "Philips PNX8550 based JBS board"
- depends on BROKEN
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_LITTLE_ENDIAN
select ARCH_SPARSEMEM_ENABLE
help
Qemu is a software emulator which among other architectures also
source "arch/mips/ddb5xxx/Kconfig"
source "arch/mips/gt64120/ev64120/Kconfig"
source "arch/mips/jazz/Kconfig"
-source "arch/mips/ite-boards/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/momentum/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
bool
default y
+config GENERIC_TIME
+ bool
+ default y
+
config SCHED_NO_NO_OMIT_FRAME_POINTER
bool
default y
config PCI_MARVELL
bool
-config ITE_BOARD_GEN
- bool
-
config SOC_AU1000
bool
select SOC_AU1X00
depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
default n
-config MIPS_GT96100
- bool
- select MIPS_GT64120
-
-config IT8172_CIR
- bool
- depends on MIPS_ITE8172 || MIPS_IVR
- default y
-
-config IT8712
- bool
- depends on MIPS_ITE8172
- default y
-
config BOOT_ELF32
bool
the option of an MT-enabled processor this option will be the only
option in this menu.
-config MIPS_MT_SMTC
- bool "SMTC: Use all TCs on all VPEs for SMP"
- depends on CPU_MIPS32_R2
- #depends on CPU_MIPS64_R2 # once there is hardware ...
+config MIPS_MT_SMP
+ bool "Use 1 TC on each available VPE for SMP"
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
select SMP
select SYS_SUPPORTS_SMP
help
- This is a kernel model which is known a SMTC or lately has been
- marketesed into SMVP.
+ This is a kernel model which is also known a VSMP or lately
+ has been marketesed into SMVP.
-config MIPS_MT_SMP
- bool "Use 1 TC on each available VPE for SMP"
+config MIPS_MT_SMTC
+ bool "SMTC: Use all TCs on all VPEs for SMP"
+ depends on CPU_MIPS32_R2
+ #depends on CPU_MIPS64_R2 # once there is hardware ...
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
select SMP
select SYS_SUPPORTS_SMP
help
- This is a kernel model which is also known a VSMP or lately
- has been marketesed into SMVP.
+ This is a kernel model which is known a SMTC or lately has been
+ marketesed into SMVP.
config MIPS_VPE_LOADER
bool "VPE loader support."
bool
default y
+config LOCKDEP_SUPPORT
+ bool
+ default y
+
+config STACKTRACE_SUPPORT
+ bool
+ default y
+
source "init/Kconfig"
menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"