frequency, it may or may not be the same as the external clock
crystal fitted to your board. Some processors have an internal
PLL and can have their frequency programmed at run time, others
- use internal dividers. In gernal the kernel won't setup a PLL
- if it is fitted (there are some expections). This value will be
+ use internal dividers. In general the kernel won't setup a PLL
+ if it is fitted (there are some exceptions). This value will be
specific to the exact CPU that you are using.
config CLOCK_DIV
On many SoC style CPUs the master CPU clock is also used to drive
on-chip peripherals. The clock that is distributed to these
peripherals is sometimes a fixed ratio of the master clock
- frequency. If so then set this to the divider ration of the
+ frequency. If so then set this to the divider ratio of the
master clock to the peripheral clock. If not sure then select 1.
config OLDMASK
Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII.
config XCOPILOT_BUGS
- bool " (X)Copilot support"
+ bool "(X)Copilot support"
depends on PILOT3
help
Support the bugs of Xcopilot.
Support for the DragenEngine II board.
config DIRECT_IO_ACCESS
- bool " Allow user to access IO directly"
+ bool "Allow user to access IO directly"
depends on (UCSIMM || UCDIMM || DRAGEN2)
help
Disable the CPU internal registers protection in user mode,
to allow a user application to read/write them.
config INIT_LCD
- bool " Initialize LCD"
+ bool "Initialize LCD"
depends on (UCSIMM || UCDIMM || DRAGEN2)
help
Initialize the LCD controller of the 68x328 processor.
config MEMORY_RESERVE
- int " Memory reservation (MiB)"
+ int "Memory reservation (MiB)"
depends on (UCSIMM || UCDIMM)
help
Reserve certain memory regions on 68x328 based boards.
Support for the Netburner MOD-5272 board.
config ROMFS_FROM_ROM
- bool " ROMFS image not RAM resident"
+ bool "ROMFS image not RAM resident"
depends on (NETtel || SNAPGEAR)
help
The ROMfs filesystem will stay resident in the FLASH/ROM, not be
hex "Address of the base of system vectors"
default "0"
help
- Define the address of the the system vectors. Commonly this is
+ Define the address of the system vectors. Commonly this is
put at the start of RAM, but it doesn't have to be. On ColdFire
platforms this address is programmed into the VBR register, thus
actually setting the address to use.
endchoice
+comment "ROM configuration"
+
+config ROM
+ bool "Specify ROM linker regions"
+ default n
+ help
+ Define a ROM region for the linker script. This creates a kernel
+ that can be stored in flash, with possibly the text, and data
+ regions being copied out to RAM at startup.
+
+config ROMBASE
+ hex "Address of the base of ROM device"
+ default "0"
+ depends on ROM
+ help
+ Define the address that the ROM region starts at. Some platforms
+ use this to set their chip select region accordingly for the boot
+ device.
+
+config ROMVEC
+ hex "Address of the base of the ROM vectors"
+ default "0"
+ depends on ROM
+ help
+ This is almost always the same as the base of the ROM. Since on all
+ 68000 type variants the vectors are at the base of the boot device
+ on system startup.
+
+config ROMVECSIZE
+ hex "Size of ROM vector region (in bytes)"
+ default "0x400"
+ depends on ROM
+ help
+ Define the size of the vector region in ROM. For most 68000
+ variants this would be 0x400 bytes in size. Set to 0 if you do
+ not want a vector region at the start of the ROM.
+
+config ROMSTART
+ hex "Address of the base of system image in ROM"
+ default "0x400"
+ depends on ROM
+ help
+ Define the start address of the system image in ROM. Commonly this
+ is strait after the ROM vectors.
+
+config ROMSIZE
+ hex "Size of the ROM device"
+ default "0x100000"
+ depends on ROM
+ help
+ Size of the ROM device. On some platforms this is used to setup
+ the chip select that controls the boot ROM device.
+
choice
prompt "Kernel executes from"
---help---