powerpc: rework 4xx PTE access and TLB miss
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Tue, 8 Jul 2008 05:54:40 +0000 (15:54 +1000)
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>
Wed, 9 Jul 2008 17:36:17 +0000 (13:36 -0400)
commit1bc54c03117b90716e0dedd7abb2a20405de65df
tree8e82fd610abaff36f1e20b5aaaf7bdeaee883aac
parentbeae4c03c0fe69cf7d57518aa0572ad21730b8be
powerpc: rework 4xx PTE access and TLB miss

This is some preliminary work to improve TLB management on SW loaded
TLB powerpc platforms. This introduce support for non-atomic PTE
operations in pgtable-ppc32.h and removes write back to the PTE from
the TLB miss handlers. In addition, the DSI interrupt code no longer
tries to fixup write permission, this is left to generic code, and
_PAGE_HWWRITE is gone.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
arch/powerpc/kernel/head_44x.S
arch/powerpc/kernel/head_booke.h
arch/powerpc/mm/44x_mmu.c
arch/powerpc/mm/fault.c
include/asm-powerpc/pgtable-ppc32.h