linux-2.6
16 years agox86: provide connect_bsp_APIC for x86_64
Glauber Costa [Wed, 28 May 2008 16:38:28 +0000 (13:38 -0300)] 
x86: provide connect_bsp_APIC for x86_64

Although it is not really needed, we provide it to get
closer to i386. ifdefs around it are removed in smpboot.c

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: change __setup_vector_irq with setup_vector_irq
Glauber Costa [Thu, 29 May 2008 03:34:19 +0000 (20:34 -0700)] 
x86: change __setup_vector_irq with setup_vector_irq

We create a version of it for i386, and then take the CONFIG_X86_64
ifdef out of the game. We could create a __setup_vector_irq for i386,
but it would incur in an unnecessary lock taking. Moreover, it is better
practice to only export setup_vector_irq anyway.

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: remove ifdef from stepping
Glauber Costa [Thu, 29 May 2008 03:05:46 +0000 (20:05 -0700)] 
x86: remove ifdef from stepping

The stepping won't affect x86_64, since there are not x86_64 k7's
or pentiums. So, although it adds to the binary size, remove the ifdef
for smoother integration

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: clearing io_apic harmless for x86_64
Glauber Costa [Thu, 29 May 2008 00:09:53 +0000 (17:09 -0700)] 
x86: clearing io_apic harmless for x86_64

so remove ifdef.

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: boot secondary cpus through initial_code
Glauber Costa [Wed, 28 May 2008 16:01:54 +0000 (13:01 -0300)] 
x86: boot secondary cpus through initial_code

remove "initialize_secondary". Boot both architectures via
initial_code.

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: use initial_code for i386
Glauber Costa [Wed, 28 May 2008 15:57:02 +0000 (12:57 -0300)] 
x86: use initial_code for i386

x86_64 jumps to whatever is written in "initial_code" symbol,
instead of a fixed address. Do it for i386 too. It will allow us
to integrate more of the smp boot code.

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: move x86_64 gdt closer to i386
Glauber Costa [Wed, 28 May 2008 23:19:53 +0000 (16:19 -0700)] 
x86: move x86_64 gdt closer to i386

i386 and x86_64 used two different schemes for maintaining the gdt.
With this patch, x86_64 initial gdt table is defined in a .c file,
same way as i386 is now. Also, we call it "gdt_page", and the descriptor,
"early_gdt_descr". This way we achieve common naming, which can allow for
more code integration.

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: don't use gdt_page openly.
Glauber Costa [Wed, 28 May 2008 03:14:51 +0000 (20:14 -0700)] 
x86: don't use gdt_page openly.

There's a macro available for that.

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: use stack_start in x86_64
Glauber Costa [Wed, 28 May 2008 01:22:54 +0000 (18:22 -0700)] 
x86: use stack_start in x86_64

call x86_64's init_rsp stack_start, just as i386 does.
Put a zeroed stack segment for consistency. With this,
we can eliminate one ugly ifdef in smpboot.c.

Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agobuild: add __page_aligned_data and __page_aligned_bss
Jeremy Fitzhardinge [Wed, 28 May 2008 14:02:14 +0000 (15:02 +0100)] 
build: add __page_aligned_data and __page_aligned_bss

Making a variable page-aligned by using
__attribute__((section(".data.page_aligned"))) is fragile because if
sizeof(variable) is not also a multiple of page size, it leaves
variables in the remainder of the section unaligned.

This patch introduces two new qualifiers, __page_aligned_data and
__page_aligned_bss to set the section *and* the alignment of
variables.  This makes page-aligned variables more robust because the
linker will make sure they're aligned properly.  Unfortunately it
requires *all* page-aligned data to use these macros...

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: unify crashkernel reservation for 32 and 64 bit
Bernhard Walle [Fri, 20 Jun 2008 13:38:22 +0000 (15:38 +0200)] 
x86: unify crashkernel reservation for 32 and 64 bit

This patch moves the reserve_crashkernel() to setup.c and removes the
architecture-specific version. Both versions were more or less the same.

I tested it on both x86-64 and i386, with CONFIG_KEXEC on and off (so
that it compiles).

Signed-off-by: Bernhard Walle <bwalle@suse.de>
Cc: yhlu.kernel@gmail.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoMerge branch 'x86/fixmap' into x86/devel
Ingo Molnar [Tue, 8 Jul 2008 10:24:29 +0000 (12:24 +0200)] 
Merge branch 'x86/fixmap' into x86/devel

Conflicts:

arch/x86/mm/init_64.c

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoMerge branch 'x86/uv' into x86/devel
Ingo Molnar [Tue, 8 Jul 2008 10:24:13 +0000 (12:24 +0200)] 
Merge branch 'x86/uv' into x86/devel

16 years agox86, SGI UV: uv_ptc_proc_write fix
Cliff Wickman [Mon, 23 Jun 2008 13:32:25 +0000 (08:32 -0500)] 
x86, SGI UV: uv_ptc_proc_write fix

Someone could write 0 bytes to /proc/sgi_uv/ptc_statistics,
causing
  optstr[count - 1] = '\0';
to write to who-knows-where.

(Andi Kleen noticed this need from a patch I sent for
 similar code in the ia64 world (sn2_ptc_proc_write()).)

(count less than zero is not possible here, as count is unsigned)

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86, SGI UV: TLB shootdown using broadcast assist unit, v6
Cliff Wickman [Thu, 19 Jun 2008 16:16:24 +0000 (11:16 -0500)] 
x86, SGI UV: TLB shootdown using broadcast assist unit, v6

v6: 6/19 close the security hole in uv_ptc_proc_write())

  > Found a potential security hole while doing that:
  > static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
  >                              size_t count, loff_t *data)
  >     if (copy_from_user(optstr, user, count))
  >             return -EFAULT;
  >
  > is count guaranteed to never be larger than 64?

is fixed below.

It adds tlb_uv.o to the Makefile.

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Cc: mingo@elte.hu
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: increase MAX_APICS for very large x86-64 configs
Jack Steiner [Mon, 16 Jun 2008 17:09:10 +0000 (12:09 -0500)] 
x86: increase MAX_APICS for very large x86-64 configs

Increase the maximum number of apics when running very large
configurations. This patch has no affect on most systems.

The patch has no effect on any 32-bit kernel. It adds ~4k to the size
of 64-bit kernels but only if NR_CPUS > 255.

Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: fix stack overflow for large values of MAX_APICS
Jack Steiner [Fri, 20 Jun 2008 02:51:05 +0000 (21:51 -0500)] 
x86: fix stack overflow for large values of MAX_APICS

physid_mask_of_physid() causes a huge stack (12k) to be created if the
number of APICS is large. Replace physid_mask_of_physid() with a
new function that does not create large stacks. This is a problem only
on large x86_64 systems.

this paves the way to increase MAX_APICS.

Signed-off-by: Jack Steiner <steiner@sgi.com>
Cc: linux-mm@kvack.org
Cc: mingo@elte.hu
Cc: tglx@linutronix.de
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoSGI UV: TLB shootdown using broadcast assist unit, fix
Ingo Molnar [Wed, 18 Jun 2008 12:51:57 +0000 (14:51 +0200)] 
SGI UV: TLB shootdown using broadcast assist unit, fix

fix:

arch/x86/kernel/tlb_uv.c: In function ‘uv_table_bases_init':
arch/x86/kernel/tlb_uv.c:612: error: ‘bau_tabsp' undeclared (first use in this function)
arch/x86/kernel/tlb_uv.c:612: error: (Each undeclared identifier is reported only once
arch/x86/kernel/tlb_uv.c:612: error: for each function it appears in.)

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoSGI UV: clean up arch/x86/kernel/tlb_uv.c
Ingo Molnar [Wed, 18 Jun 2008 12:28:19 +0000 (14:28 +0200)] 
SGI UV: clean up arch/x86/kernel/tlb_uv.c

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoSGI UV: TLB shootdown using broadcast assist unit
Ingo Molnar [Wed, 18 Jun 2008 12:15:43 +0000 (14:15 +0200)] 
SGI UV: TLB shootdown using broadcast assist unit

TLB shootdown for SGI UV.

v5: 6/12 corrections/improvements per Ingo's second review

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoSGI UV: TLB shootdown using broadcast assist unit, cleanups
Cliff Wickman [Thu, 12 Jun 2008 13:23:48 +0000 (08:23 -0500)] 
SGI UV: TLB shootdown using broadcast assist unit, cleanups

TLB shootdown for SGI UV.

v1: 6/2 original
v2: 6/3 corrections/improvements per Ingo's review
v3: 6/4 split atomic operations off to a separate patch (Jeremy's review)
v4: 6/12 include <mach_apic.h> rather than <asm/mach-bigsmp/mach_apic.h>
         (fixes a !SMP build problem that Ingo found)
         fix the index on uv_table_bases[blade]

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86 atomic operations: atomic_or_long() atomic_inc_short()
Cliff Wickman [Wed, 4 Jun 2008 20:33:17 +0000 (15:33 -0500)] 
x86 atomic operations: atomic_or_long() atomic_inc_short()

Provide atomic operations for increment of a 16-bit integer and
logical OR into a 64-bit integer.

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Reviewed-by: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86, SGI UV: TLB shootdown using broadcast assist unit
Cliff Wickman [Mon, 2 Jun 2008 13:56:14 +0000 (08:56 -0500)] 
x86, SGI UV: TLB shootdown using broadcast assist unit

TLB shootdown for SGI UV.

Depends on patch (in tip/x86/irq):
   x86-update-macros-used-by-uv-platform.patch   Jack Steiner May 29

This patch provides the ability to flush TLB's in cpu's that are not on
the local node.  The hardware mechanism for distributing the flush
messages is the UV's "broadcast assist unit".

The hook to intercept TLB shootdown requests is a 2-line change to
native_flush_tlb_others() (arch/x86/kernel/tlb_64.c).

This code has been tested on a hardware simulator. The real hardware
is not yet available.

The shootdown statistics are provided through /proc/sgi_uv/ptc_statistics.
The use of /sys was considered, but would have required the use of
many /sys files.  The debugfs was also considered, but these statistics
should be available on an ongoing basis, not just for debugging.

Issues to be fixed later:
- The IRQ for the messaging interrupt is currently hardcoded as 200
  (see UV_BAU_MESSAGE).  It should be dynamically assigned in the future.
- The use of appropriate udelay()'s is untested, as they are a problem
  in the simulator.

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoMerge branch 'linus' into x86/irq
Ingo Molnar [Tue, 8 Jul 2008 10:23:00 +0000 (12:23 +0200)] 
Merge branch 'linus' into x86/irq

16 years agoMerge branch 'x86/nmi' into x86/devel
Ingo Molnar [Tue, 8 Jul 2008 10:17:08 +0000 (12:17 +0200)] 
Merge branch 'x86/nmi' into x86/devel

Conflicts:

arch/x86/kernel/nmi.c
arch/x86/kernel/nmi_32.c

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoMerge branch 'x86/numa' into x86/devel
Ingo Molnar [Tue, 8 Jul 2008 09:59:23 +0000 (11:59 +0200)] 
Merge branch 'x86/numa' into x86/devel

Conflicts:

arch/x86/Kconfig
arch/x86/kernel/e820.c
arch/x86/kernel/efi_64.c
arch/x86/kernel/mpparse.c
arch/x86/kernel/setup.c
arch/x86/kernel/setup_32.c
arch/x86/mm/init_64.c
include/asm-x86/proto.h

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: use reserve_bootmem_generic() to reserve crashkernel memory on x86_64
Bernhard Walle [Sun, 8 Jun 2008 13:46:31 +0000 (15:46 +0200)] 
x86: use reserve_bootmem_generic() to reserve crashkernel memory on x86_64

This patch uses reserve_bootmem_generic() instead of reserve_bootmem()
to reserve the crashkernel memory on x86_64. That's necessary for NUMA
machines, see 00212fef814612245ed0261cbac8426d0c9a31a5:

  [PATCH] Fix kdump Crash Kernel boot memory reservation for NUMA machines

  This patch will fix a boot memory reservation bug that trashes memory on
  the ES7000 when loading the kdump crash kernel.

  The code in arch/x86_64/kernel/setup.c to reserve boot memory for the crash
  kernel uses the non-numa aware "reserve_bootmem" function instead of the
  NUMA aware "reserve_bootmem_generic".  I checked to make sure that no other
  function was using "reserve_bootmem" and found none, except the ones that
  had NUMA ifdef'ed out.

  I have tested this patch only on an ES7000 with NUMA on and off (numa=off)
  in a single (non-NUMA) and multi-cell (NUMA) configurations.

Signed-off-by: Amul Shah <amul.shah@unisys.com>
  Looks-good-to: Vivek Goyal <vgoyal@in.ibm.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
The switch-back to reserve_bootmem() was accidentally introduced in
5c3391f9f749023a49c64d607da4fb49263690eb when adding the BOOTMEM_EXCLUSIVE
parameter.

Signed-off-by: Bernhard Walle <bwalle@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: add flags parameter to reserve_bootmem_generic()
Bernhard Walle [Sun, 8 Jun 2008 13:46:30 +0000 (15:46 +0200)] 
x86: add flags parameter to reserve_bootmem_generic()

This patch adds a 'flags' parameter to reserve_bootmem_generic() like it
already has been added in reserve_bootmem() with commit
72a7fe3967dbf86cb34e24fbf1d957fe24d2f246.

It also changes all users to use BOOTMEM_DEFAULT, which doesn't effectively
change the behaviour. Since the change is x86-specific, I don't think it's
necessary to add a new API for migration. There are only 4 users of that
function.

The change is necessary for the next patch, using reserve_bootmem_generic()
for crashkernel reservation.

Signed-off-by: Bernhard Walle <bwalle@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: fix setup.c printk format warning
Randy Dunlap [Thu, 5 Jun 2008 18:10:59 +0000 (11:10 -0700)] 
x86: fix setup.c printk format warning

Fix setup.c printk format warning:

linux-next-20080605/arch/x86/kernel/setup.c: In function 'setup_per_cpu_areas':
linux-next-20080605/arch/x86/kernel/setup.c:173: warning: format '%lu' expects type 'long unsigned int', but argument 2 has type 'ssize_t'

Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: don't return invalid pointers from node_to_cpumask()
Vegard Nossum [Fri, 6 Jun 2008 14:33:25 +0000 (16:33 +0200)] 
x86: don't return invalid pointers from node_to_cpumask()

Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agosched, numa: replace MAX_NUMNODES with nr_node_ids in kernel/sched.c
Mike Travis [Mon, 12 May 2008 19:21:12 +0000 (21:21 +0200)] 
sched, numa: replace MAX_NUMNODES with nr_node_ids in kernel/sched.c

  * Replace usages of MAX_NUMNODES with nr_node_ids in kernel/sched.c,
    where appropriate.  This saves some allocated space as well as many
    wasted cycles going through node entries that are non-existent.

Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: numa_64.c fix shadowed variable
Thomas Gleixner [Mon, 12 May 2008 13:43:36 +0000 (15:43 +0200)] 
x86: numa_64.c fix shadowed variable

sparse mutters:
arch/x86/mm/numa_64.c:195:27: warning: symbol 'end_pfn' shadows an earlier one

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: numa_64.c make local variables static
Thomas Gleixner [Mon, 12 May 2008 13:43:36 +0000 (15:43 +0200)] 
x86: numa_64.c make local variables static

plat_node_bdata, cmdline, nodemap_addr, nodemap_size are local to
numa_64.c. Make them static

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: compile error fix for smpboot.c
Jeremy Fitzhardinge [Wed, 21 May 2008 10:21:13 +0000 (11:21 +0100)] 
x86: compile error fix for smpboot.c

Without this patch, my link fails with:

arch/x86/kernel/built-in.o(.cpuinit.text+0x3c6e): In function `get_local_pda':
: undefined reference to `_cpu_pda'
arch/x86/kernel/built-in.o(.cpuinit.text+0x3cd1): In function `get_local_pda':
: undefined reference to `after_bootmem'
arch/x86/kernel/built-in.o(.cpuinit.text+0x3cec): In function `get_local_pda':
: undefined reference to `_cpu_pda'
make[2]: *** [.tmp_vmlinux1] Error 1

Caused by commit 766da892634694f795b18b9538407816896fc470
    x86: remove static boot_cpu_pda array v2

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agox86: leave initial __cpu_pda array in place until cpus are booted
Mike Travis [Mon, 12 May 2008 19:21:13 +0000 (21:21 +0200)] 
x86: leave initial __cpu_pda array in place until cpus are booted

Ingo Molnar wrote:
...
> they crashed after about 3 randconfig iterations with:
>
>   early res: 4 [8000-afff] PGTABLE
>   early res: 5 [b000-b87f] MEMNODEMAP
> PANIC: early exception 0e rip 10:ffffffff8077a150 error 2 cr2 37
> Pid: 0, comm: swapper Not tainted 2.6.25-sched-devel.git-x86-latest.git #14
>
> Call Trace:
>  [<ffffffff81466196>] early_idt_handler+0x56/0x6a
>  [<ffffffff8077a150>] ? numa_set_node+0x30/0x60
>  [<ffffffff8077a129>] ? numa_set_node+0x9/0x60
>  [<ffffffff8147a543>] numa_init_array+0x93/0xf0
>  [<ffffffff8147b039>] acpi_scan_nodes+0x3b9/0x3f0
>  [<ffffffff8147a496>] numa_initmem_init+0x136/0x150
>  [<ffffffff8146da5f>] setup_arch+0x48f/0x700
>  [<ffffffff802566ea>] ? clockevents_register_notifier+0x3a/0x50
>  [<ffffffff81466a87>] start_kernel+0xd7/0x440
>  [<ffffffff81466422>] x86_64_start_kernel+0x222/0x280
...
Here's the fixup...  This one should follow the previous patches.

Thanks,
Mike
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agox86: remove static boot_cpu_pda array v2
Mike Travis [Mon, 12 May 2008 19:21:13 +0000 (21:21 +0200)] 
x86: remove static boot_cpu_pda array v2

  * Remove the boot_cpu_pda array and pointer table from the data section.
    Allocate the pointer table and array during init.  do_boot_cpu()
    will reallocate the pda in node local memory and if the cpu is being
    brought up before the bootmem array is released (after_bootmem = 0),
    then it will free the initial pda.  This will happen for all cpus
    present at system startup.

    This removes 512k + 32k bytes from the data section.

For inclusion into sched-devel/latest tree.

Based on:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
    +   sched-devel/latest  .../mingo/linux-2.6-sched-devel.git

Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agox86: remove the static 256k node_to_cpumask_map
Mike Travis [Mon, 12 May 2008 19:21:12 +0000 (21:21 +0200)] 
x86: remove the static 256k node_to_cpumask_map

  * Consolidate node_to_cpumask operations and remove the 256k
    byte node_to_cpumask_map.  This is done by allocating the
    node_to_cpumask_map array after the number of possible nodes
    (nr_node_ids) is known.

  * Debug printouts when CONFIG_DEBUG_PER_CPU_MAPS is active have
    been increased.  It now shows faults when calling node_to_cpumask()
    and node_to_cpumask_ptr().

For inclusion into sched-devel/latest tree.

Based on:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
    +   sched-devel/latest  .../mingo/linux-2.6-sched-devel.git

Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agox86: restore pda nodenumber field
Mike Travis [Mon, 12 May 2008 19:21:12 +0000 (21:21 +0200)] 
x86: restore pda nodenumber field

  * Restore the nodenumber field in the x86_64 pda.  This field is slightly
    different than the x86_cpu_to_node_map mainly because it's a static
    indication of which node the cpu is on while the cpu to node map is a
    dyanamic mapping that may get reset if the cpu goes offline.  This also
    simplifies the numa_node_id() macro.

For inclusion into sched-devel/latest tree.

Based on:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
    +   sched-devel/latest  .../mingo/linux-2.6-sched-devel.git

Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agox86: cleanup early per cpu variables/accesses v4
Mike Travis [Mon, 12 May 2008 19:21:12 +0000 (21:21 +0200)] 
x86: cleanup early per cpu variables/accesses v4

  * Introduce a new PER_CPU macro called "EARLY_PER_CPU".  This is
    used by some per_cpu variables that are initialized and accessed
    before there are per_cpu areas allocated.

    ["Early" in respect to per_cpu variables is "earlier than the per_cpu
    areas have been setup".]

    This patchset adds these new macros:

DEFINE_EARLY_PER_CPU(_type, _name, _initvalue)
EXPORT_EARLY_PER_CPU_SYMBOL(_name)
DECLARE_EARLY_PER_CPU(_type, _name)

early_per_cpu_ptr(_name)
early_per_cpu_map(_name, _idx)
early_per_cpu(_name, _cpu)

    The DEFINE macro defines the per_cpu variable as well as the early
    map and pointer.  It also initializes the per_cpu variable and map
    elements to "_initvalue".  The early_* macros provide access to
    the initial map (usually setup during system init) and the early
    pointer.  This pointer is initialized to point to the early map
    but is then NULL'ed when the actual per_cpu areas are setup.  After
    that the per_cpu variable is the correct access to the variable.

    The early_per_cpu() macro is not very efficient but does show how to
    access the variable if you have a function that can be called both
    "early" and "late".  It tests the early ptr to be NULL, and if not
    then it's still valid.  Otherwise, the per_cpu variable is used
    instead:

#define early_per_cpu(_name, _cpu)  \
(early_per_cpu_ptr(_name) ? \
early_per_cpu_ptr(_name)[_cpu] : \
per_cpu(_name, _cpu))

    A better method is to actually check the pointer manually.  In the
    case below, numa_set_node can be called both "early" and "late":

void __cpuinit numa_set_node(int cpu, int node)
{
    int *cpu_to_node_map = early_per_cpu_ptr(x86_cpu_to_node_map);

    if (cpu_to_node_map)
    cpu_to_node_map[cpu] = node;
    else
    per_cpu(x86_cpu_to_node_map, cpu) = node;
}

  * Add a flag "arch_provides_topology_pointers" that indicates pointers
    to topology cpumask_t maps are available.  Otherwise, use the function
    returning the cpumask_t value.  This is useful if cpumask_t set size
    is very large to avoid copying data on to/off of the stack.

  * The coverage of CONFIG_DEBUG_PER_CPU_MAPS has been increased while
    the non-debug case has been optimized a bit.

  * Remove an unreferenced compiler warning in drivers/base/topology.c

  * Clean up #ifdef in setup.c

For inclusion into sched-devel/latest tree.

Based on:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
    +   sched-devel/latest  .../mingo/linux-2.6-sched-devel.git

Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agox86: modify Kconfig to allow up to 4096 cpus
Mike Travis [Mon, 12 May 2008 19:21:12 +0000 (21:21 +0200)] 
x86: modify Kconfig to allow up to 4096 cpus

  * Increase the limit of NR_CPUS to 4096 and introduce a boolean
    called "MAXSMP" which when set (e.g. "allyesconfig"), will set
    NR_CPUS = 4096 and NODES_SHIFT = 9 (512).

  * Changed max setting for NODES_SHIFT from 15 to 9 to accurately
    reflect the real limit.

Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agox86: fix remove cpu_pda table patch
Mike Travis [Mon, 12 May 2008 19:21:12 +0000 (21:21 +0200)] 
x86: fix remove cpu_pda table patch

Mike Travis wrote:
> Ingo Molnar wrote:
>> * Mike Travis <travis@sgi.com> wrote:
>>
>>> [Ingo - please replace "PATCH 07/11" with this one.]
>>>
>>>     * Remove 544k bytes from the kernel by removing the boot_cpu_pda
>>>  array from the data section and allocating it during startup.
>>>
>>>  Fixed panic in setup_per_cpu_areas when HOTPLUG_CPU not set.
>>>
>>> For inclusion into sched-devel/latest tree.
>> sched-devel.git randconfig testing found another crash with your queue:
>>
>> [    0.111060] Brought up 1 CPUs
>> [    0.111986] Total of 1 processors activated (4022.73 BogoMIPS).
>> [    0.112987] Testing NMI watchdog ... <1>BUG: unable to handle kernel NULL pointer dereference at 0000000000000040
>> [    0.114982] IP: [<ffffffff8180d4a0>] check_nmi_watchdog+0xb0/0x210
>> [    0.114982] PGD 0
>> [    0.114982] Oops: 0000 [1] SMP
>> [    0.114982] CPU 0
>> [............]
>>
>>  http://redhat.com/~mingo/misc/config-Mon_Apr_28_23_25_25_CEST_2008.bad
>>  http://redhat.com/~mingo/misc/log-Mon_Apr_28_23_25_25_CEST_2008.bad
>>
>>  Ingo
>
> Hi Ingo,
>
> I need a bit more information on your hardware configuration.  Building a
> kernel with the above config file started up fine on both the Intel and AMD
> boxes.
>
> Based on the above output it looks like it might be a UP machine?
...

Ok, I think I found it.  In check_nmi_watchdog():

        for (cpu = 0; cpu < NR_CPUS; cpu++)
                prev_nmi_count[cpu] = cpu_pda(cpu)->__nmi_count;

As I mentioned it works fine on both of my systems so could you try it out?

Thanks!
Mike
--

  * Change function check_nmi_watchdog() to use nr_cpu_ids instead of NR_CPUS.

Based on:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
    +   sched-devel/latest  .../mingo/linux-2.6-sched-devel.git

Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agox86: don't call pxm_to_node again
Yinghai Lu [Sat, 19 Apr 2008 08:30:16 +0000 (01:30 -0700)] 
x86: don't call pxm_to_node again

also make bus_numa work even if ACPI_NUMA is not defined.

don't call pxm_to_node again, and use node directly.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: make dev_to_node return online node
Yinghai Lu [Wed, 20 Feb 2008 20:41:52 +0000 (12:41 -0800)] 
x86: make dev_to_node return online node

a numa system (with multi HT chains) may return node without ram. Aka it
is not online. Try to get an online node, otherwise return -1.

Signed-off-by: Yinghai Lu <yinghai.lu@sun.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agoMerge branch 'x86/mpparse' into x86/devel
Ingo Molnar [Tue, 8 Jul 2008 09:14:58 +0000 (11:14 +0200)] 
Merge branch 'x86/mpparse' into x86/devel

Conflicts:

arch/x86/Kconfig
arch/x86/kernel/io_apic_32.c
arch/x86/kernel/setup_64.c
arch/x86/mm/init_32.c

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86, ioapic, acpi quirk: disable IRQ 0 through I/O APIC for some HP systems
Matthew Garrett [Tue, 1 Jul 2008 00:12:06 +0000 (01:12 +0100)] 
x86, ioapic, acpi quirk: disable IRQ 0 through I/O APIC for some HP systems

Some HP laptops have a problem with their DSDT reporting as
HP/SB400/10000, which includes some code which overrides all temperature
trip points to 16C if the INTIN2 input of the I/O APIC is enabled.  This
input is incorrectly designated the ISA IRQ 0 via an interrupt source
override even though it is wired to the output of the master 8259A and
INTIN0 is not connected at all.  So far two models have been identified,
namely nx6125 and nx6325.

Use a knob provided by the I/O APIC interrupt registration code to
abandon any attempts to route IRQ 0 through the I/O APIC for these
systems.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Len Brown <lenb@kernel.org>
Cc: Matthew Garrett <mjg59@srcf.ucam.org>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86, ioapic, acpi: add a knob to disable IRQ 0 through I/O APIC
Maciej W. Rozycki [Tue, 1 Jul 2008 00:11:35 +0000 (01:11 +0100)] 
x86, ioapic, acpi: add a knob to disable IRQ 0 through I/O APIC

As discovered recently some systems exhibit problems when the 8254 timer
IRQ is routed through the I/O APIC.  These problems do not affect the
timer IRQ itself and therefore cannot be detected when the correctness of
operation of the interrupt is verified in check_timer().  Therefore the
I/O APIC path of the timer IRQ has to be disabled entirely.

This is a change that lets platforms ask for the timer IRQ not to be
registered in the I/O APIC interrupt tables.  The local APIC and ExtINTA
paths are unaffected.  This request is only taken into account for ACPI
platforms as MP table systems seem unaffected so far.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Len Brown <lenb@kernel.org>
Cc: Matthew Garrett <mjg59@srcf.ucam.org>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: simplify x86_mpparse dependency check
Yinghai Lu [Fri, 20 Jun 2008 14:33:31 +0000 (07:33 -0700)] 
x86: simplify x86_mpparse dependency check

"Maciej W. Rozycki" <macro@linux-mips.org> said:

> Given X86_64 selects X86_LOCAL_APIC I am not sure the redundancy seen
>above does not actually obscure the logic behind...  I think:
>
>       depends on X86_LOCAL_APIC && !X86_VISWS
>
>would be clearer and get the same.

Suggested-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoRevert parts of "x86: update mptable"
Ingo Molnar [Tue, 8 Jul 2008 08:47:39 +0000 (10:47 +0200)] 
Revert parts of "x86: update mptable"

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: fix compiling when CONFIG_X86_MPPARSE is not set
Yinghai Lu [Thu, 19 Jun 2008 19:15:01 +0000 (12:15 -0700)] 
x86: fix compiling when CONFIG_X86_MPPARSE is not set

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: let MPS support be selectable, v2
Yinghai Lu [Thu, 19 Jun 2008 19:13:09 +0000 (12:13 -0700)] 
x86: let MPS support be selectable, v2

v2: seperate "fix for compiling when MPPARSE is not set" to another patch
    make X86_MPPARSE to be selectable only when acpi is set and
    X86_MPPARSE will be set if acpi is not set.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: update mptable fix with no ioapic v2
Yinghai Lu [Thu, 19 Jun 2008 00:29:31 +0000 (17:29 -0700)] 
x86: update mptable fix with no ioapic v2

if the system doesn't have ioapic, we don't need to store entries for mptable
update

also let mp_config_acpi_gsi not call func in mpparse
so later could decouple mpparse with acpi more easily

Reported-by: Daniel Exner <dex@dragonslave.de>
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Daniel Exner <dex@dragonslave.de>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: cleanup machine_specific_memory_setup, v2
Yinghai Lu [Thu, 19 Jun 2008 00:27:08 +0000 (17:27 -0700)] 
x86: cleanup machine_specific_memory_setup, v2

1. let 64bit support 88 and e801 too
2. introduce default_machine_specific_memory_setup, and reuse it
   for voyager

v2: fix 64 bit compiling

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: remove unused file after numaq etc depends on genericarch
Yinghai Lu [Wed, 18 Jun 2008 18:54:37 +0000 (11:54 -0700)] 
x86: remove unused file after numaq etc depends on genericarch

we don't need those mach_mpspec.h files now.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: use acpi_numa_init to parse on 32-bit numa
Yinghai Lu [Tue, 17 Jun 2008 22:41:45 +0000 (15:41 -0700)] 
x86: use acpi_numa_init to parse on 32-bit numa

seperate SRAT finding and parsing from get_memcfg_from_srat,
and let getmemcfg_from_srat only handle array from previous step.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: Kconfig cleanup with genericarch
Yinghai Lu [Tue, 17 Jun 2008 22:39:01 +0000 (15:39 -0700)] 
x86: Kconfig cleanup with genericarch

we already have summit and etc depends on genericarch,
so use genericarch only.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: move some function out of setup_bootmem_alloc
Yinghai Lu [Tue, 17 Jun 2008 17:02:45 +0000 (10:02 -0700)] 
x86: move some function out of setup_bootmem_alloc

... to make it more like 64-bit.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: merge setup_memory_map with e820
Yinghai Lu [Tue, 17 Jun 2008 02:58:28 +0000 (19:58 -0700)] 
x86: merge setup_memory_map with e820

... and kill e820_32/64.c and e820_32/64.h

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: kill bad_ppro
Yinghai Lu [Mon, 16 Jun 2008 23:11:08 +0000 (16:11 -0700)] 
x86: kill bad_ppro

so don't punish all other cpus without that problem when init highmem

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: move e820_resource_resources to e820.c
Yinghai Lu [Mon, 16 Jun 2008 20:03:31 +0000 (13:03 -0700)] 
x86: move e820_resource_resources to e820.c

and make 32-bit resource registration more like 64 bit.

also move probe_roms back to setup_32.c

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86 boot: pass E820 memory map entries more than 128 via linked list of setup data
Huang, Ying [Wed, 11 Jun 2008 03:33:39 +0000 (11:33 +0800)] 
x86 boot: pass E820 memory map entries more than 128 via linked list of setup data

Because of the size limits of struct boot_params (zero page), the
maximum number of E820 memory map entries can be passed to kernel is
128. As pointed by Paul Jackson, there is some machine produced by SGI
with so many nodes that the number of E820 memory map entries is more
than 128. To enabling Linux kernel on these system, a new setup data
type named SETUP_E820_EXT is defined to pass additional memory map
entries to Linux kernel.

This patch is based on x86/auto-latest branch of git-x86 tree and has
been tested on x86_64 and i386 platform.

Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86, mm: use add_highpages_with_active_regions() for high pages init v2
Yinghai Lu [Sun, 15 Jun 2008 01:32:52 +0000 (18:32 -0700)] 
x86, mm: use add_highpages_with_active_regions() for high pages init v2

use early_node_map to init high pages, so we can remove page_is_ram() and
page_is_reserved_early() in the big loop with add_one_highpage

also remove page_is_reserved_early(), it is not needed anymore.

v2: fix the build of other platforms

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: rename two e820 related functions
Yinghai Lu [Mon, 16 Jun 2008 01:58:51 +0000 (18:58 -0700)] 
x86: rename two e820 related functions

rename update_memory_range to e820_update_range
rename add_memory_region to e820_add_region

to make it more clear that they are about e820 map operations.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: use dstapic in mp_config_acpi_legacy_irqs
Yinghai Lu [Mon, 16 Jun 2008 01:19:46 +0000 (18:19 -0700)] 
x86: use dstapic in mp_config_acpi_legacy_irqs

so we don't get the same value multiple times.

also make mp_config_acpi_legacy_irqs more readable by moving assignments
together.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: keep MP_intsrc_info untouched if we do not update mptable
Yinghai Lu [Sat, 14 Jun 2008 08:26:41 +0000 (01:26 -0700)] 
x86: keep MP_intsrc_info untouched if we do not update mptable

Daniel Exner reported IO-APIC enumeration breakage in linux-next.

Alexey Starikovskiy found out that it might be related to
commit 2944e16b25 "x86: update mptable".

use enable_update_mptable to decide if need check before add mp_irqs array.

Reported-by: Daniel Exner <webmaster@dragonslave.de>
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: clean up relocate_initrd
Yinghai Lu [Sat, 14 Jun 2008 03:07:03 +0000 (20:07 -0700)] 
x86: clean up relocate_initrd

1. move that before zone_sizes_init ...
2. add free_early for one old one, otherwise it will be be reserved again
   when we init highmem.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: replace shrink_active_range() with remove_active_range()
Yinghai Lu [Sat, 14 Jun 2008 02:08:52 +0000 (19:08 -0700)] 
x86: replace shrink_active_range() with remove_active_range()

in case we have kva before ramdisk on a node, we still need to use
those ranges.

v2: reserve_early kva ram area, in case there are holes in highmem, to avoid
    those area could be treat as free high pages.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: clean up reserve_bootmem_generic() and port it to 32-bit
Yinghai Lu [Fri, 13 Jun 2008 09:00:56 +0000 (02:00 -0700)] 
x86: clean up reserve_bootmem_generic() and port it to 32-bit

1. add reserve_bootmem_generic for 32bit
2. change len to unsigned long
3. make early_res_to_bootmem to use it

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: make generic arch support NUMAQ, fix #2
Yinghai Lu [Tue, 10 Jun 2008 01:11:36 +0000 (18:11 -0700)] 
x86: make generic arch support NUMAQ, fix #2

we are checking mptable early for numaq, so don't need to reserve_bootmem
for it. bootmem is not there yet.

do the same thing as 64-bit.

found it on 64g above system from 64-bit kernel kexec to 32 bit kernel with
numaq support.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: make generic arch support NUMAQ, fix
Yinghai Lu [Tue, 10 Jun 2008 00:00:15 +0000 (17:00 -0700)] 
x86: make generic arch support NUMAQ, fix

fix typo in bigsmp switching.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: e820 merge parsing of the mem=/memmap= boot parameters
Yinghai Lu [Tue, 10 Jun 2008 19:55:54 +0000 (12:55 -0700)] 
x86: e820 merge parsing of the mem=/memmap= boot parameters

since we now have 32-bit support for e820_register_active_regions(),
we can merge the parsing of the mem=/memmap= boot parameters.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: unify the reserve_bootmem() behavior of early_res_to_bootmem()
Ingo Molnar [Tue, 10 Jun 2008 14:38:41 +0000 (16:38 +0200)] 
x86: unify the reserve_bootmem() behavior of early_res_to_bootmem()

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: use reserve_bootmem_generic() to reserve crashkernel memory on x86_64
Bernhard Walle [Sun, 8 Jun 2008 13:46:31 +0000 (15:46 +0200)] 
x86: use reserve_bootmem_generic() to reserve crashkernel memory on x86_64

This patch uses reserve_bootmem_generic() instead of reserve_bootmem()
to reserve the crashkernel memory on x86_64. That's necessary for NUMA
machines, see 00212fef814612245ed0261cbac8426d0c9a31a5:

  [PATCH] Fix kdump Crash Kernel boot memory reservation for NUMA machines

  This patch will fix a boot memory reservation bug that trashes memory on
  the ES7000 when loading the kdump crash kernel.

  The code in arch/x86_64/kernel/setup.c to reserve boot memory for the crash
  kernel uses the non-numa aware "reserve_bootmem" function instead of the
  NUMA aware "reserve_bootmem_generic".  I checked to make sure that no other
  function was using "reserve_bootmem" and found none, except the ones that
  had NUMA ifdef'ed out.

  I have tested this patch only on an ES7000 with NUMA on and off (numa=off)
  in a single (non-NUMA) and multi-cell (NUMA) configurations.

Signed-off-by: Amul Shah <amul.shah@unisys.com>
  Looks-good-to: Vivek Goyal <vgoyal@in.ibm.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
The switch-back to reserve_bootmem() was accidentally introduced in
5c3391f9f749023a49c64d607da4fb49263690eb when adding the BOOTMEM_EXCLUSIVE
parameter.

Signed-off-by: Bernhard Walle <bwalle@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: add flags parameter to reserve_bootmem_generic()
Bernhard Walle [Sun, 8 Jun 2008 13:46:30 +0000 (15:46 +0200)] 
x86: add flags parameter to reserve_bootmem_generic()

This patch adds a 'flags' parameter to reserve_bootmem_generic() like it
already has been added in reserve_bootmem() with commit
72a7fe3967dbf86cb34e24fbf1d957fe24d2f246.

It also changes all users to use BOOTMEM_DEFAULT, which doesn't effectively
change the behaviour. Since the change is x86-specific, I don't think it's
necessary to add a new API for migration. There are only 4 users of that
function.

The change is necessary for the next patch, using reserve_bootmem_generic()
for crashkernel reservation.

Signed-off-by: Bernhard Walle <bwalle@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoMerge branch 'linus' into tmp.x86.mpparse.new
Ingo Molnar [Tue, 8 Jul 2008 08:32:56 +0000 (10:32 +0200)] 
Merge branch 'linus' into tmp.x86.mpparse.new

16 years agoMerge branch 'x86/irq' into x86/devel
Ingo Molnar [Tue, 8 Jul 2008 07:53:57 +0000 (09:53 +0200)] 
Merge branch 'x86/irq' into x86/devel

Conflicts:

arch/x86/kernel/i8259.c
arch/x86/kernel/irqinit_64.c

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoMerge branches 'x86/mmio', 'x86/delay', 'x86/idle', 'x86/oprofile', 'x86/debug',...
Ingo Molnar [Tue, 8 Jul 2008 07:46:15 +0000 (09:46 +0200)] 
Merge branches 'x86/mmio', 'x86/delay', 'x86/idle', 'x86/oprofile', 'x86/debug', 'x86/ptrace' and 'x86/amd-iommu' into x86/devel

16 years agoMerge branch 'x86/setup' into x86/devel
Ingo Molnar [Tue, 8 Jul 2008 07:43:01 +0000 (09:43 +0200)] 
Merge branch 'x86/setup' into x86/devel

16 years agoMerge branches 'x86/numa-fixes', 'x86/apic', 'x86/apm', 'x86/bitops', 'x86/build...
Ingo Molnar [Tue, 8 Jul 2008 07:16:56 +0000 (09:16 +0200)] 
Merge branches 'x86/numa-fixes', 'x86/apic', 'x86/apm', 'x86/bitops', 'x86/build', 'x86/cleanups', 'x86/cpa', 'x86/cpu', 'x86/defconfig', 'x86/gart', 'x86/i8259', 'x86/intel', 'x86/irqstats', 'x86/kconfig', 'x86/ldt', 'x86/mce', 'x86/memtest', 'x86/pat', 'x86/ptemask', 'x86/resumetrace', 'x86/threadinfo', 'x86/timers', 'x86/vdso' and 'x86/xen' into x86/devel

16 years agox86, arch/x86/kernel/io_apic_32.c: use kzalloc instead of kmalloc/memset
Christophe Jaillet [Sun, 22 Jun 2008 20:13:48 +0000 (22:13 +0200)] 
x86, arch/x86/kernel/io_apic_32.c: use kzalloc instead of kmalloc/memset

1) replace kmalloc/memset with equivalent kzalloc.

Signed-off-by: Christophe Jaillet <jaillet.christophe@wanadoo.fr>
Cc: cj <jaillet.christophe@wanadoo.fr>
Cc: petero2@telia.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: fix IO APIC breakage on HP nx6325, v2
Maciej W. Rozycki [Fri, 20 Jun 2008 00:35:07 +0000 (01:35 +0100)] 
x86: fix IO APIC breakage on HP nx6325, v2

> That helped a lot, the system seems to work normally now.
>
> Here's the relevant snippet from dmesg:
>
> [    0.108006] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
> [    0.108006] ..MP-BIOS bug: 8254 timer not connected to IO-APIC
> [    0.108006] ...trying to set up timer (IRQ0) through the 8259A ... <3>
> [    0.108006] ..... (found apic 0 pin 2) ...<3> failed.
> [    0.108006] ...trying to set up timer as Virtual Wire IRQ...<3> works.
>
> and the whole thing is at: http://www.sisk.pl/kernel/debug/20080618/dmesg-2.log

 Hmm, that only proved the 8259A is indeed wired to the pin #2 of the I/O
APIC.

> I, personally, don't have any and AMD only has SB600 documentation on its
> web page (it's still marked as "AMD confidential" ;-)).

 Well, the IC block is most likely the same as that's not rocket science
and once done there is no need to fiddle with that.  That written, I am
afraid there is nothing useful about the IC in the document, except that
it's there and consists of an I/O APIC providing 24 inputs and the usual
pair of 8259A cores.  Thanks for the reference anyway.

> There is an interrupt controller in there, but I'm not sure if there's any
> 8259A.  The northbridge is on the CPU, actually.

 I will praise the day someone ships an x86 machine without an 8259A core!

 As expressed in another mail I suspect there may actually be a direct
route from the 8254 to INTIN0 in the southbridge -- this is what other
bootstrap logs seen in the Internet suggest.  This would mean this
particular BIOS is buggy (is it the latest version?) and provides an
incorrect IRQ override in its ACPI tables, for example because the
responsible block has been blindly copied from a machine using a commoner
wiring.  This could be moderately easily fixed up with a quirk based on
the PCI ID (after checking it again, we actually used to have a quirk for
ATI in this area, but the way it was done suggests the issue was not
understood well enough).

 Could you please remove the hack sent yesterday and test the patch
provided below?  I do hope it builds, but I have no immediate means to
check it.  Please report the output.  The intent is to test INTIN0
directly before testing INTIN2 through the 8259A.  Thanks.

 Aside of that, what I have gathered from your reports (please correct me
if I have got it wrong) is that when the through-8259A mode is used, then
after a while 8254 timer interrupts stop arriving.  What's interesting,
the "Virtual Wire IRQ" seems to work for you correctly (that's quite an
odd setup where a local APIC input is used in the native mode -- please
post /proc/interrupts for confirmation), which in turn implies the master
8259A drives its INT output as we expect.  Why would the I/O APIC input
have problems then?  Hmm...

[ mingo@elte.hu: revert the "x86: fix IO APIC breakage on HP nx6325"
  version. ]

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: fix IO APIC breakage on HP nx6325
Maciej W. Rozycki [Wed, 18 Jun 2008 23:39:33 +0000 (00:39 +0100)] 
x86: fix IO APIC breakage on HP nx6325

On Thu, 19 Jun 2008, Rafael J. Wysocki wrote:

> >  With such a configuration the "x86: I/O APIC: timer through 8259A
> > second-chance" patch should not matter, because the only change it
> > introduces is an attempt to try the same I/O APIC pin again, but with the
> > IRQ0 line of the master 8259A enabled.  That's not a terribly unusual
> > configuration and nothing should get confused in the system.
>
> But it _does_ get confused, really.

 Something certainly gets confused, but so far I am not sure which bit
exactly it is, are you?

> >  Barring the unlikely possibility of the 8259A actually being wired to
> > INTIN2 of the I/O APIC I can see two possible explanations:
> >
> > 1. The 8259A interrupt actually escapes to the CPU somehow and is handled
> >    as an ExtINTA interrupt.  This would make the code in check_timer()
> >    decide it has found a working configuration, while actually it has been
> >    fooled.
[...]
> Here you go:
>
> [    0.108006] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
> [    0.108006] ..MP-BIOS bug: 8254 timer not connected to IO-APIC
> [    0.108006] ...trying to set up timer (IRQ0) through the 8259A ... <3>
> [    0.108006] ..... (found apic 0 pin 2) ...<3> works.
>
> The full dmesg is at: http://www.sisk.pl/kernel/debug/20080618/dmesg-1.log

Thanks.  In this case I suspect the case #1 quoted above happens, that is
the 8259A manages to deliver its interrupt somehow.  Note at this stage it
is meant to be in the AEOI mode, so it can happily resubmit the interrupt
indefinitely with no additional handling as long as it receives INTA
cycles.

Can you please try the patch below on top of "x86: I/O APIC: timer
through 8259A second-chance" to see whether my hypothesis is true?  It
modifies the through-8259A setup path so that the APIC input gets masked,
but the 8259A has the timer interrupt still enabled.  Let me know how the
timer interrupt is routed in this case.

Bisected-by: "Rafael J. Wysocki" <rjw@sisk.pl>
Tested-by: "Rafael J. Wysocki" <rjw@sisk.pl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: coding style fixes to arch/x86/kernel/io_apic_32.c
Paolo Ciarrocchi [Sun, 8 Jun 2008 11:07:18 +0000 (13:07 +0200)] 
x86: coding style fixes to arch/x86/kernel/io_apic_32.c

Before:
total: 91 errors, 73 warnings, 2850 lines checked

After:
total: 1 errors, 47 warnings, 2848 lines checked

Compile tested:

paolo@paolo-desktop:/tmp$ size io*
   text    data     bss     dec     hex filename
  13836    1756   11104   26696    6848 io_apic_32.o.after
  13836    1756   11104   26696    6848 io_apic_32.o.before

Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86, io-apic: use predefined names instead of numeric constants
Cyrill Gorcunov [Sat, 7 Jun 2008 15:53:57 +0000 (19:53 +0400)] 
x86, io-apic: use predefined names instead of numeric constants

This patch replaces some hard-coded numbers with predefined names.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86, io-apic: define names for redirection table entry fields
Cyrill Gorcunov [Sat, 7 Jun 2008 15:53:56 +0000 (19:53 +0400)] 
x86, io-apic: define names for redirection table entry fields

Each I/O APIC redirection table entry has a number of fields.
Define names for them to eliminate reference by hard coded
numbers.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: APIC/SMP: Downgrade the NMI watchdog for "noapic"
Maciej W. Rozycki [Fri, 6 Jun 2008 02:28:13 +0000 (03:28 +0100)] 
x86: APIC/SMP: Downgrade the NMI watchdog for "noapic"

 If configured to use the I/O APIC, the NMI watchdog is deemed to fail if
the chip has been deactivated as a result of "noapic".  Downgrade to the
local APIC watchdog similarly to what is done for the UP case.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: APIC/SMP: Downgrade the NMI watchdog for "nosmp"
Maciej W. Rozycki [Fri, 6 Jun 2008 02:28:02 +0000 (03:28 +0100)] 
x86: APIC/SMP: Downgrade the NMI watchdog for "nosmp"

 If configured to use the I/O APIC, the NMI watchdog is deemed to fail if
the chip has been deactivated as a result of "nosmp".  Downgrade to the
local APIC watchdog similarly to what is done for the UP case.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: APIC/UP: Remove redundant NMI watchdog downgrade
Maciej W. Rozycki [Fri, 6 Jun 2008 02:27:56 +0000 (03:27 +0100)] 
x86: APIC/UP: Remove redundant NMI watchdog downgrade

For the UP case the NMI watchdog downgrade is done consistently in
APIC_init_uniprocessor() now.  Remove redundant code used only when
BIOS-disabled local APIC is activated.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: APIC/UP: Downgrade the NMI watchdog for no I/O APIC
Maciej W. Rozycki [Fri, 6 Jun 2008 02:27:49 +0000 (03:27 +0100)] 
x86: APIC/UP: Downgrade the NMI watchdog for no I/O APIC

 If configured to use the I/O APIC, the NMI watchdog is deemed to fail if
the chip will not be used in the UP configuration, because "noapic" has
been specified or the chip is simply not there.  Downgrade to the local
APIC watchdog to rectify.

The new #ifdef is ugly, I know.  A proper solution is to provide suitable
definitions of smp_found_config, etc. for !CONFIG_X86_IO_APIC in a header.
Likewise the whole if () condition should be moved to a static inline
function.  Such clean-ups are beyond the scope of this change and can be
done once the whole issue of the timer has been sorted out.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: NMI watchdog: Downgrade helper
Maciej W. Rozycki [Fri, 6 Jun 2008 02:27:41 +0000 (03:27 +0100)] 
x86: NMI watchdog: Downgrade helper

A downgrade helper for the NMI watchdog to be used in all places where
the I/O APIC watchdog may have been requested, but the I/O APIC is found
not to be there or meant to be left disabled.  This is so that the
reconfiguration is cosistent and defined in a single place only.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoRevert "x86: APIC/SMP: downgrade the NMI watchdog for "nosmp""
Ingo Molnar [Sun, 8 Jun 2008 08:14:40 +0000 (10:14 +0200)] 
Revert "x86: APIC/SMP: downgrade the NMI watchdog for "nosmp""

This reverts commit 791b93d3dfaf16c23e978bec0cc0a3dd9d855d63.

A better fix from Maciej will be merged.

16 years agoRevert "x86, io-apic: fix nmi_watchdog=1 bootup hang"
Ingo Molnar [Sun, 8 Jun 2008 08:13:33 +0000 (10:13 +0200)] 
Revert "x86, io-apic: fix nmi_watchdog=1 bootup hang"

This reverts commit 2229ff84f01746d02fb6b79e156fb5cce48c908f.

A better fix from Maciej will be merged.

16 years agox86, io-apic: fix nmi_watchdog=1 bootup hang
Ingo Molnar [Thu, 5 Jun 2008 09:17:16 +0000 (11:17 +0200)] 
x86, io-apic: fix nmi_watchdog=1 bootup hang

nmi_watchdog=1 hangs on 64-bit:

[    0.250000] Detected 12.564 MHz APIC timer.
[    0.254178] APIC timer registered as dummy, due to nmi_watchdog=1!
[    0.260366] Testing NMI watchdog ... <4>WARNING: CPU#0: NMI appears to be stuck (0->0)!
[    ...     ]
[    0.470003] calling  genl_init+0x0/0xd0
[  hard hang ]

bisected it down to:

 git-bisect start
 git-bisect good 1beee8dc8cf58e3f605bd7b34d7a39939be7d8d2
 git-bisect bad 11582ece0aaa2d0f94f345c08a4ab9997078a083
 git-bisect bad 5479c623bb44089844022c03d4c0eb16d5b7a15f
 git-bisect bad cfb4c7fabeb499e1c29f9d1878968e37a938e28a
 git-bisect good 246dd412d31e4f5de1d43aa6422a325b785f36e4
 git-bisect bad 3f8237eaff7dc1e35fa791dae095574fd974e671
 git-bisect good 90e23b13ab849e2a11f00c655eb3a2011b4623be
 git-bisect bad 833526a34eeefc117df3191a594c3c3a4f15a9ac
 git-bisect good 791b93d3dfaf16c23e978bec0cc0a3dd9d855d63
 git-bisect bad 65767c64068f2c93e56a1accfed5c78230ac12d7
 git-bisect bad 2abc5c05dd82c188e3bdf6641a274f013348d14b
 git-bisect bad 317e1f2597ffb4d4db940577bbe56dc6e881ef07

317e1f2597ffb4d4db940577bbe56dc6e881ef07 is first bad commit
| commit 317e1f2597ffb4d4db940577bbe56dc6e881ef07
| Author: Maciej W. Rozycki <macro@linux-mips.org>
| Date:   Wed May 21 22:10:22 2008 +0100
|     x86: I/O APIC: clean up the 8259A on a NMI watchdog failure

the problem is that in the dummy-lapic branch we rely on the i8259A
but if the NMI watchdog fails we turn off IRQ 0 - which doesnt work
too well ;-)

Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: IO-APIC - use NMI_NONE instead of numeric constant
Cyrill Gorcunov [Thu, 29 May 2008 18:32:30 +0000 (22:32 +0400)] 
x86: IO-APIC - use NMI_NONE instead of numeric constant

Not sure but maybe it is better to use NMI_DISABLED,
will take a look. But for now this patch is not change
anything in logic so it will not hurt/broke the kernel.
For most cases nmi_watchdog assignment is by one of NMI_*
macro so I think there it make sense too.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86 build fix:
Ingo Molnar [Sat, 31 May 2008 10:20:10 +0000 (12:20 +0200)] 
x86 build fix:

  arch/x86/kernel/io_apic_64.c: In function 'check_timer':
  arch/x86/kernel/io_apic_64.c:1688: error: 'vector' undeclared (first use in this function)
  arch/x86/kernel/io_apic_64.c:1688: error: (Each undeclared identifier is reported only once
  arch/x86/kernel/io_apic_64.c:1688: error: for each function it appears in.)

16 years agox86: apic_64.c fix sparse warnings about shadowed variables
Thomas Gleixner [Mon, 12 May 2008 13:43:35 +0000 (15:43 +0200)] 
x86: apic_64.c fix sparse warnings about shadowed variables

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: make irq_cfg static
Thomas Gleixner [Mon, 12 May 2008 13:43:36 +0000 (15:43 +0200)] 
x86: make irq_cfg static

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: move pci_routirq declaration to pci.h
Thomas Gleixner [Mon, 12 May 2008 13:43:37 +0000 (15:43 +0200)] 
x86: move pci_routirq declaration to pci.h

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: I/O APIC: timer through 8259A second-chance
Maciej W. Rozycki [Tue, 27 May 2008 20:19:51 +0000 (21:19 +0100)] 
x86: I/O APIC: timer through 8259A second-chance

Some systems incorrectly report the ExtINTA pin of the I/O APIC as the
genuine target of the timer interrupt.  Here is a change that copies timer
pin information found to the other pin if one has been found only.  This
way both a direct and a through-8259A route is tested with the pin letting
these problematic systems work well enough.  If no timer pin information
has been found for the I/O APIC, then local APIC variations are tried
only, similarly to what is done without the change (except without the
misleading messages).

Obviously if we try the first-chance path without being told by the BIOS
to do so, we should not complain either, so do not print the message in
this case.

The 64-bit variation should be updated with a call to
replace_pin_at_irq() which can be done with the upcoming merge.  Since
add_pin_to_irq() is now always called in the first-chance path, the
condition to require it in the second-chance path no longer happens.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: I/O APIC: keep the timer IRQ masked during set-up
Maciej W. Rozycki [Tue, 27 May 2008 20:19:45 +0000 (21:19 +0100)] 
x86: I/O APIC: keep the timer IRQ masked during set-up

Keep the timer interrupt line masked when reconfiguring its interrupt
redirection entry in the I/O APIC.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: I/O APIC: unmask the second-chance timer interrupt
Maciej W. Rozycki [Tue, 27 May 2008 20:19:40 +0000 (21:19 +0100)] 
x86: I/O APIC: unmask the second-chance timer interrupt

Unmask the timer interrupt line set up in the through-8259A mode
explicitly after setup_timer_IRQ0_pin() has set up the I/O APIC interrupt
redirection entry to let the two operations be unbound from each other.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>