git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/rtl8187_dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * Magic delays and register offsets below are taken from the original
  11  * r8187 driver sources.  Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/usb.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8187.h"
  26 #include "rtl8187_rtl8225.h"
  27
  28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  31 MODULE_LICENSE("GPL");
  32
  33 static struct usb_device_id rtl8187_table[] __devinitdata = {
  34         /* Realtek */
  35         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  36         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  37         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  38         /* Netgear */
  39         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  40         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  41         /* HP */
  42         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  43         /* Sitecom */
  44         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  45         {}
  46 };
  47
  48 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  49
  50 static const struct ieee80211_rate rtl818x_rates[] = {
  51         { .bitrate = 10, .hw_value = 0, },
  52         { .bitrate = 20, .hw_value = 1, },
  53         { .bitrate = 55, .hw_value = 2, },
  54         { .bitrate = 110, .hw_value = 3, },
  55         { .bitrate = 60, .hw_value = 4, },
  56         { .bitrate = 90, .hw_value = 5, },
  57         { .bitrate = 120, .hw_value = 6, },
  58         { .bitrate = 180, .hw_value = 7, },
  59         { .bitrate = 240, .hw_value = 8, },
  60         { .bitrate = 360, .hw_value = 9, },
  61         { .bitrate = 480, .hw_value = 10, },
  62         { .bitrate = 540, .hw_value = 11, },
  63 };
  64
  65 static const struct ieee80211_channel rtl818x_channels[] = {
  66         { .center_freq = 2412 },
  67         { .center_freq = 2417 },
  68         { .center_freq = 2422 },
  69         { .center_freq = 2427 },
  70         { .center_freq = 2432 },
  71         { .center_freq = 2437 },
  72         { .center_freq = 2442 },
  73         { .center_freq = 2447 },
  74         { .center_freq = 2452 },
  75         { .center_freq = 2457 },
  76         { .center_freq = 2462 },
  77         { .center_freq = 2467 },
  78         { .center_freq = 2472 },
  79         { .center_freq = 2484 },
  80 };
  81
  82 static void rtl8187_iowrite_async_cb(struct urb *urb)
  83 {
  84         kfree(urb->context);
  85         usb_free_urb(urb);
  86 }
  87
  88 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  89                                   void *data, u16 len)
  90 {
  91         struct usb_ctrlrequest *dr;
  92         struct urb *urb;
  93         struct rtl8187_async_write_data {
  94                 u8 data[4];
  95                 struct usb_ctrlrequest dr;
  96         } *buf;
  97         int rc;
  98
  99         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 100         if (!buf)
 101                 return;
 102
 103         urb = usb_alloc_urb(0, GFP_ATOMIC);
 104         if (!urb) {
 105                 kfree(buf);
 106                 return;
 107         }
 108
 109         dr = &buf->dr;
 110
 111         dr->bRequestType = RTL8187_REQT_WRITE;
 112         dr->bRequest = RTL8187_REQ_SET_REG;
 113         dr->wValue = addr;
 114         dr->wIndex = 0;
 115         dr->wLength = cpu_to_le16(len);
 116
 117         memcpy(buf, data, len);
 118
 119         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 120                              (unsigned char *)dr, buf, len,
 121                              rtl8187_iowrite_async_cb, buf);
 122         rc = usb_submit_urb(urb, GFP_ATOMIC);
 123         if (rc < 0) {
 124                 kfree(buf);
 125                 usb_free_urb(urb);
 126         }
 127 }
 128
 129 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 130                                            __le32 *addr, u32 val)
 131 {
 132         __le32 buf = cpu_to_le32(val);
 133
 134         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 135                               &buf, sizeof(buf));
 136 }
 137
 138 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 139 {
 140         struct rtl8187_priv *priv = dev->priv;
 141
 142         data <<= 8;
 143         data |= addr | 0x80;
 144
 145         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 146         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 147         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 148         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 149
 150         msleep(1);
 151 }
 152
 153 static void rtl8187_tx_cb(struct urb *urb)
 154 {
 155         struct sk_buff *skb = (struct sk_buff *)urb->context;
 156         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 157         struct ieee80211_hw *hw = info->driver_data[0];
 158         struct rtl8187_priv *priv = hw->priv;
 159
 160         usb_free_urb(info->driver_data[1]);
 161         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 162                                           sizeof(struct rtl8187_tx_hdr));
 163         memset(&info->status, 0, sizeof(info->status));
 164         info->flags |= IEEE80211_TX_STAT_ACK;
 165         ieee80211_tx_status_irqsafe(hw, skb);
 166 }
 167
 168 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 169 {
 170         struct rtl8187_priv *priv = dev->priv;
 171         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 172         struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 173         unsigned int ep;
 174         void *buf;
 175         struct urb *urb;
 176         __le16 rts_dur = 0;
 177         u32 flags;
 178         int rc;
 179
 180         urb = usb_alloc_urb(0, GFP_ATOMIC);
 181         if (!urb) {
 182                 kfree_skb(skb);
 183                 return 0;
 184         }
 185
 186         flags = skb->len;
 187         flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
 188
 189         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 190         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 191                 flags |= RTL8187_TX_FLAG_MORE_FRAG;
 192         if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
 193                 flags |= RTL8187_TX_FLAG_RTS;
 194                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 195                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 196                                                  skb->len, info);
 197         } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
 198                 flags |= RTL8187_TX_FLAG_CTS;
 199                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 200         }
 201
 202         if (!priv->is_rtl8187b) {
 203                 struct rtl8187_tx_hdr *hdr =
 204                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 205                 hdr->flags = cpu_to_le32(flags);
 206                 hdr->len = 0;
 207                 hdr->rts_duration = rts_dur;
 208                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
 209                 buf = hdr;
 210
 211                 ep = 2;
 212         } else {
 213                 /* fc needs to be calculated before skb_push() */
 214                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 215                 struct ieee80211_hdr *tx_hdr =
 216                         (struct ieee80211_hdr *)(skb->data);
 217                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 218
 219                 struct rtl8187b_tx_hdr *hdr =
 220                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 221                 struct ieee80211_rate *txrate =
 222                         ieee80211_get_tx_rate(dev, info);
 223                 memset(hdr, 0, sizeof(*hdr));
 224                 hdr->flags = cpu_to_le32(flags);
 225                 hdr->rts_duration = rts_dur;
 226                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
 227                 hdr->tx_duration =
 228                         ieee80211_generic_frame_duration(dev, priv->vif,
 229                                                          skb->len, txrate);
 230                 buf = hdr;
 231
 232                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 233                         ep = 12;
 234                 else
 235                         ep = epmap[skb_get_queue_mapping(skb)];
 236         }
 237
 238         /* FIXME: The sequence that follows is needed for this driver to
 239          * work with mac80211 since "mac80211: fix TX sequence numbers".
 240          * As with the temporary code in rt2x00, changes will be needed
 241          * to get proper sequence numbers on beacons. In addition, this
 242          * patch places the sequence number in the hardware state, which
 243          * limits us to a single virtual state.
 244          */
 245         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
 246                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
 247                         priv->seqno += 0x10;
 248                 ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
 249                 ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
 250         }
 251
 252         info->driver_data[0] = dev;
 253         info->driver_data[1] = urb;
 254
 255         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 256                           buf, skb->len, rtl8187_tx_cb, skb);
 257         rc = usb_submit_urb(urb, GFP_ATOMIC);
 258         if (rc < 0) {
 259                 usb_free_urb(urb);
 260                 kfree_skb(skb);
 261         }
 262
 263         return 0;
 264 }
 265
 266 static void rtl8187_rx_cb(struct urb *urb)
 267 {
 268         struct sk_buff *skb = (struct sk_buff *)urb->context;
 269         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 270         struct ieee80211_hw *dev = info->dev;
 271         struct rtl8187_priv *priv = dev->priv;
 272         struct ieee80211_rx_status rx_status = { 0 };
 273         int rate, signal;
 274         u32 flags;
 275         u32 quality;
 276
 277         spin_lock(&priv->rx_queue.lock);
 278         if (skb->next)
 279                 __skb_unlink(skb, &priv->rx_queue);
 280         else {
 281                 spin_unlock(&priv->rx_queue.lock);
 282                 return;
 283         }
 284         spin_unlock(&priv->rx_queue.lock);
 285
 286         if (unlikely(urb->status)) {
 287                 usb_free_urb(urb);
 288                 dev_kfree_skb_irq(skb);
 289                 return;
 290         }
 291
 292         skb_put(skb, urb->actual_length);
 293         if (!priv->is_rtl8187b) {
 294                 struct rtl8187_rx_hdr *hdr =
 295                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 296                 flags = le32_to_cpu(hdr->flags);
 297                 signal = hdr->signal & 0x7f;
 298                 rx_status.antenna = (hdr->signal >> 7) & 1;
 299                 rx_status.noise = hdr->noise;
 300                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 301                 priv->quality = signal;
 302                 rx_status.qual = priv->quality;
 303                 priv->noise = hdr->noise;
 304                 rate = (flags >> 20) & 0xF;
 305                 if (rate > 3) { /* OFDM rate */
 306                         if (signal > 90)
 307                                 signal = 90;
 308                         else if (signal < 25)
 309                                 signal = 25;
 310                         signal = 90 - signal;
 311                 } else {        /* CCK rate */
 312                         if (signal > 95)
 313                                 signal = 95;
 314                         else if (signal < 30)
 315                                 signal = 30;
 316                         signal = 95 - signal;
 317                 }
 318                 rx_status.signal = signal;
 319                 priv->signal = signal;
 320         } else {
 321                 struct rtl8187b_rx_hdr *hdr =
 322                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 323                 /* The Realtek datasheet for the RTL8187B shows that the RX
 324                  * header contains the following quantities: signal quality,
 325                  * RSSI, AGC, the received power in dB, and the measured SNR.
 326                  * In testing, none of these quantities show qualitative
 327                  * agreement with AP signal strength, except for the AGC,
 328                  * which is inversely proportional to the strength of the
 329                  * signal. In the following, the quality and signal strength
 330                  * are derived from the AGC. The arbitrary scaling constants
 331                  * are chosen to make the results close to the values obtained
 332                  * for a BCM4312 using b43 as the driver. The noise is ignored
 333                  * for now.
 334                  */
 335                 flags = le32_to_cpu(hdr->flags);
 336                 quality = 170 - hdr->agc;
 337                 if (quality > 100)
 338                         quality = 100;
 339                 signal = 14 - hdr->agc / 2;
 340                 rx_status.qual = quality;
 341                 priv->quality = quality;
 342                 rx_status.signal = signal;
 343                 priv->signal = signal;
 344                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 345                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 346                 rate = (flags >> 20) & 0xF;
 347         }
 348
 349         skb_trim(skb, flags & 0x0FFF);
 350         rx_status.rate_idx = rate;
 351         rx_status.freq = dev->conf.channel->center_freq;
 352         rx_status.band = dev->conf.channel->band;
 353         rx_status.flag |= RX_FLAG_TSFT;
 354         if (flags & (1 << 13))
 355                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 356         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 357
 358         skb = dev_alloc_skb(RTL8187_MAX_RX);
 359         if (unlikely(!skb)) {
 360                 usb_free_urb(urb);
 361                 /* TODO check rx queue length and refill *somewhere* */
 362                 return;
 363         }
 364
 365         info = (struct rtl8187_rx_info *)skb->cb;
 366         info->urb = urb;
 367         info->dev = dev;
 368         urb->transfer_buffer = skb_tail_pointer(skb);
 369         urb->context = skb;
 370         skb_queue_tail(&priv->rx_queue, skb);
 371
 372         usb_submit_urb(urb, GFP_ATOMIC);
 373 }
 374
 375 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 376 {
 377         struct rtl8187_priv *priv = dev->priv;
 378         struct urb *entry;
 379         struct sk_buff *skb;
 380         struct rtl8187_rx_info *info;
 381
 382         while (skb_queue_len(&priv->rx_queue) < 8) {
 383                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 384                 if (!skb)
 385                         break;
 386                 entry = usb_alloc_urb(0, GFP_KERNEL);
 387                 if (!entry) {
 388                         kfree_skb(skb);
 389                         break;
 390                 }
 391                 usb_fill_bulk_urb(entry, priv->udev,
 392                                   usb_rcvbulkpipe(priv->udev,
 393                                   priv->is_rtl8187b ? 3 : 1),
 394                                   skb_tail_pointer(skb),
 395                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 396                 info = (struct rtl8187_rx_info *)skb->cb;
 397                 info->urb = entry;
 398                 info->dev = dev;
 399                 skb_queue_tail(&priv->rx_queue, skb);
 400                 usb_submit_urb(entry, GFP_KERNEL);
 401         }
 402
 403         return 0;
 404 }
 405
 406 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 407 {
 408         struct rtl8187_priv *priv = dev->priv;
 409         u8 reg;
 410         int i;
 411
 412         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 413         reg &= (1 << 1);
 414         reg |= RTL818X_CMD_RESET;
 415         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 416
 417         i = 10;
 418         do {
 419                 msleep(2);
 420                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 421                       RTL818X_CMD_RESET))
 422                         break;
 423         } while (--i);
 424
 425         if (!i) {
 426                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
 427                 return -ETIMEDOUT;
 428         }
 429
 430         /* reload registers from eeprom */
 431         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 432
 433         i = 10;
 434         do {
 435                 msleep(4);
 436                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 437                       RTL818X_EEPROM_CMD_CONFIG))
 438                         break;
 439         } while (--i);
 440
 441         if (!i) {
 442                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
 443                        wiphy_name(dev->wiphy));
 444                 return -ETIMEDOUT;
 445         }
 446
 447         return 0;
 448 }
 449
 450 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 451 {
 452         struct rtl8187_priv *priv = dev->priv;
 453         u8 reg;
 454         int res;
 455
 456         /* reset */
 457         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 458                          RTL818X_EEPROM_CMD_CONFIG);
 459         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 460         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 461                          RTL818X_CONFIG3_ANAPARAM_WRITE);
 462         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 463                           RTL8187_RTL8225_ANAPARAM_ON);
 464         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 465                           RTL8187_RTL8225_ANAPARAM2_ON);
 466         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 467                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 468         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 469                          RTL818X_EEPROM_CMD_NORMAL);
 470
 471         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 472
 473         msleep(200);
 474         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 475         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 476         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 477         msleep(200);
 478
 479         res = rtl8187_cmd_reset(dev);
 480         if (res)
 481                 return res;
 482
 483         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 484         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 485         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 486                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 487         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 488                           RTL8187_RTL8225_ANAPARAM_ON);
 489         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 490                           RTL8187_RTL8225_ANAPARAM2_ON);
 491         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 492                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 493         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 494
 495         /* setup card */
 496         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 497         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 498
 499         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 500         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
 501         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 502
 503         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 504
 505         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 506         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 507         reg &= 0x3F;
 508         reg |= 0x80;
 509         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 510
 511         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 512
 513         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 514         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 515         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 516
 517         // TODO: set RESP_RATE and BRSR properly
 518         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 519         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 520
 521         /* host_usb_init */
 522         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 523         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 524         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 525         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 526         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 527         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
 528         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 529         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 530         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 531         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 532         msleep(100);
 533
 534         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 535         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 536         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 537         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 538                          RTL818X_EEPROM_CMD_CONFIG);
 539         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 540         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 541                          RTL818X_EEPROM_CMD_NORMAL);
 542         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 543         msleep(100);
 544
 545         priv->rf->init(dev);
 546
 547         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 548         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 549         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 550         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 551         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 552         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 553         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 554
 555         return 0;
 556 }
 557
 558 static const u8 rtl8187b_reg_table[][3] = {
 559         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 560         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 561         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 562         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 563
 564         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 565         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 566         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
 567         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
 568         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
 569         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 570
 571         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 572         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 573         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 574         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 575         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 576         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 577         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
 578         {0x73, 0x9A, 2},
 579
 580         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
 581         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
 582         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
 583         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
 584         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
 585
 586         {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
 587         {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
 588 };
 589
 590 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 591 {
 592         struct rtl8187_priv *priv = dev->priv;
 593         int res, i;
 594         u8 reg;
 595
 596         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 597                          RTL818X_EEPROM_CMD_CONFIG);
 598
 599         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 600         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
 601         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 602         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 603                           RTL8187B_RTL8225_ANAPARAM2_ON);
 604         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 605                           RTL8187B_RTL8225_ANAPARAM_ON);
 606         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
 607                          RTL8187B_RTL8225_ANAPARAM3_ON);
 608
 609         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 610         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 611         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 612         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 613
 614         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 615         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 616         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 617
 618         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 619                          RTL818X_EEPROM_CMD_NORMAL);
 620
 621         res = rtl8187_cmd_reset(dev);
 622         if (res)
 623                 return res;
 624
 625         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
 626         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 627         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 628         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 629         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 630         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
 631                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 632         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 633
 634         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 635         reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
 636         reg |= RTL818X_RATE_FALLBACK_ENABLE;
 637         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
 638
 639         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 640         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 641         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 642
 643         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 644                          RTL818X_EEPROM_CMD_CONFIG);
 645         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 646         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 647         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 648                          RTL818X_EEPROM_CMD_NORMAL);
 649
 650         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 651         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 652                 rtl818x_iowrite8_idx(priv,
 653                                      (u8 *)(uintptr_t)
 654                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 655                                      rtl8187b_reg_table[i][1],
 656                                      rtl8187b_reg_table[i][2]);
 657         }
 658
 659         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 660         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 661
 662         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 663         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 664         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 665
 666         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 667
 668         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 669
 670         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 671                          RTL818X_EEPROM_CMD_CONFIG);
 672         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 673         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 674         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 675         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 676                          RTL818X_EEPROM_CMD_NORMAL);
 677
 678         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 679         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 680         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 681         msleep(1100);
 682
 683         priv->rf->init(dev);
 684
 685         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 686         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 687         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 688
 689         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 690         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 691         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 692         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 693         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 694         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 695         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 696
 697         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 698         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 699         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 700         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 701         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 702         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 703         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 704         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 705         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 706         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 707         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 708         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 709         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 710
 711         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 712
 713         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 714
 715         return 0;
 716 }
 717
 718 static int rtl8187_start(struct ieee80211_hw *dev)
 719 {
 720         struct rtl8187_priv *priv = dev->priv;
 721         u32 reg;
 722         int ret;
 723
 724         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 725                                      rtl8187b_init_hw(dev);
 726         if (ret)
 727                 return ret;
 728
 729         if (priv->is_rtl8187b) {
 730                 reg = RTL818X_RX_CONF_MGMT |
 731                       RTL818X_RX_CONF_DATA |
 732                       RTL818X_RX_CONF_BROADCAST |
 733                       RTL818X_RX_CONF_NICMAC |
 734                       RTL818X_RX_CONF_BSSID |
 735                       (7 << 13 /* RX FIFO threshold NONE */) |
 736                       (7 << 10 /* MAX RX DMA */) |
 737                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 738                       RTL818X_RX_CONF_ONLYERLPKT |
 739                       RTL818X_RX_CONF_MULTICAST;
 740                 priv->rx_conf = reg;
 741                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 742
 743                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 744                                   RTL818X_TX_CONF_HW_SEQNUM |
 745                                   RTL818X_TX_CONF_DISREQQSIZE |
 746                                   (7 << 8  /* short retry limit */) |
 747                                   (7 << 0  /* long retry limit */) |
 748                                   (7 << 21 /* MAX TX DMA */));
 749                 rtl8187_init_urbs(dev);
 750                 return 0;
 751         }
 752
 753         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 754
 755         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 756         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 757
 758         rtl8187_init_urbs(dev);
 759
 760         reg = RTL818X_RX_CONF_ONLYERLPKT |
 761               RTL818X_RX_CONF_RX_AUTORESETPHY |
 762               RTL818X_RX_CONF_BSSID |
 763               RTL818X_RX_CONF_MGMT |
 764               RTL818X_RX_CONF_DATA |
 765               (7 << 13 /* RX FIFO threshold NONE */) |
 766               (7 << 10 /* MAX RX DMA */) |
 767               RTL818X_RX_CONF_BROADCAST |
 768               RTL818X_RX_CONF_NICMAC;
 769
 770         priv->rx_conf = reg;
 771         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 772
 773         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 774         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 775         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 776         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 777
 778         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 779         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 780         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 781         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 782         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 783
 784         reg  = RTL818X_TX_CONF_CW_MIN |
 785                (7 << 21 /* MAX TX DMA */) |
 786                RTL818X_TX_CONF_NO_ICV;
 787         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 788
 789         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 790         reg |= RTL818X_CMD_TX_ENABLE;
 791         reg |= RTL818X_CMD_RX_ENABLE;
 792         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 793
 794         return 0;
 795 }
 796
 797 static void rtl8187_stop(struct ieee80211_hw *dev)
 798 {
 799         struct rtl8187_priv *priv = dev->priv;
 800         struct rtl8187_rx_info *info;
 801         struct sk_buff *skb;
 802         u32 reg;
 803
 804         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 805
 806         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 807         reg &= ~RTL818X_CMD_TX_ENABLE;
 808         reg &= ~RTL818X_CMD_RX_ENABLE;
 809         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 810
 811         priv->rf->stop(dev);
 812
 813         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 814         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 815         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 816         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 817
 818         while ((skb = skb_dequeue(&priv->rx_queue))) {
 819                 info = (struct rtl8187_rx_info *)skb->cb;
 820                 usb_kill_urb(info->urb);
 821                 kfree_skb(skb);
 822         }
 823         return;
 824 }
 825
 826 static int rtl8187_add_interface(struct ieee80211_hw *dev,
 827                                  struct ieee80211_if_init_conf *conf)
 828 {
 829         struct rtl8187_priv *priv = dev->priv;
 830         int i;
 831
 832         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
 833                 return -EOPNOTSUPP;
 834
 835         switch (conf->type) {
 836         case IEEE80211_IF_TYPE_STA:
 837                 priv->mode = conf->type;
 838                 break;
 839         default:
 840                 return -EOPNOTSUPP;
 841         }
 842
 843         priv->vif = conf->vif;
 844
 845         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 846         for (i = 0; i < ETH_ALEN; i++)
 847                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
 848                                  ((u8 *)conf->mac_addr)[i]);
 849         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 850
 851         return 0;
 852 }
 853
 854 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
 855                                      struct ieee80211_if_init_conf *conf)
 856 {
 857         struct rtl8187_priv *priv = dev->priv;
 858         priv->mode = IEEE80211_IF_TYPE_MNTR;
 859         priv->vif = NULL;
 860 }
 861
 862 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 863 {
 864         struct rtl8187_priv *priv = dev->priv;
 865         u32 reg;
 866
 867         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 868         /* Enable TX loopback on MAC level to avoid TX during channel
 869          * changes, as this has be seen to causes problems and the
 870          * card will stop work until next reset
 871          */
 872         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 873                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
 874         msleep(10);
 875         priv->rf->set_chan(dev, conf);
 876         msleep(10);
 877         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 878
 879         if (!priv->is_rtl8187b) {
 880                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
 881
 882                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
 883                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
 884                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
 885                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
 886                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
 887                 } else {
 888                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
 889                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
 890                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
 891                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
 892                 }
 893         }
 894
 895         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 896         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
 897         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 898         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
 899         return 0;
 900 }
 901
 902 static int rtl8187_config_interface(struct ieee80211_hw *dev,
 903                                     struct ieee80211_vif *vif,
 904                                     struct ieee80211_if_conf *conf)
 905 {
 906         struct rtl8187_priv *priv = dev->priv;
 907         int i;
 908         u8 reg;
 909
 910         for (i = 0; i < ETH_ALEN; i++)
 911                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 912
 913         if (is_valid_ether_addr(conf->bssid)) {
 914                 reg = RTL818X_MSR_INFRA;
 915                 if (priv->is_rtl8187b)
 916                         reg |= RTL818X_MSR_ENEDCA;
 917                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
 918         } else {
 919                 reg = RTL818X_MSR_NO_LINK;
 920                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
 921         }
 922
 923         return 0;
 924 }
 925
 926 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
 927                                      unsigned int changed_flags,
 928                                      unsigned int *total_flags,
 929                                      int mc_count, struct dev_addr_list *mclist)
 930 {
 931         struct rtl8187_priv *priv = dev->priv;
 932
 933         if (changed_flags & FIF_FCSFAIL)
 934                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 935         if (changed_flags & FIF_CONTROL)
 936                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 937         if (changed_flags & FIF_OTHER_BSS)
 938                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 939         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
 940                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 941         else
 942                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 943
 944         *total_flags = 0;
 945
 946         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 947                 *total_flags |= FIF_FCSFAIL;
 948         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 949                 *total_flags |= FIF_CONTROL;
 950         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 951                 *total_flags |= FIF_OTHER_BSS;
 952         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 953                 *total_flags |= FIF_ALLMULTI;
 954
 955         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
 956 }
 957
 958 static const struct ieee80211_ops rtl8187_ops = {
 959         .tx                     = rtl8187_tx,
 960         .start                  = rtl8187_start,
 961         .stop                   = rtl8187_stop,
 962         .add_interface          = rtl8187_add_interface,
 963         .remove_interface       = rtl8187_remove_interface,
 964         .config                 = rtl8187_config,
 965         .config_interface       = rtl8187_config_interface,
 966         .configure_filter       = rtl8187_configure_filter,
 967 };
 968
 969 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 970 {
 971         struct ieee80211_hw *dev = eeprom->data;
 972         struct rtl8187_priv *priv = dev->priv;
 973         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 974
 975         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 976         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 977         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 978         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 979 }
 980
 981 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 982 {
 983         struct ieee80211_hw *dev = eeprom->data;
 984         struct rtl8187_priv *priv = dev->priv;
 985         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
 986
 987         if (eeprom->reg_data_in)
 988                 reg |= RTL818X_EEPROM_CMD_WRITE;
 989         if (eeprom->reg_data_out)
 990                 reg |= RTL818X_EEPROM_CMD_READ;
 991         if (eeprom->reg_data_clock)
 992                 reg |= RTL818X_EEPROM_CMD_CK;
 993         if (eeprom->reg_chip_select)
 994                 reg |= RTL818X_EEPROM_CMD_CS;
 995
 996         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 997         udelay(10);
 998 }
 999
1000 static int __devinit rtl8187_probe(struct usb_interface *intf,
1001                                    const struct usb_device_id *id)
1002 {
1003         struct usb_device *udev = interface_to_usbdev(intf);
1004         struct ieee80211_hw *dev;
1005         struct rtl8187_priv *priv;
1006         struct eeprom_93cx6 eeprom;
1007         struct ieee80211_channel *channel;
1008         const char *chip_name;
1009         u16 txpwr, reg;
1010         int err, i;
1011         DECLARE_MAC_BUF(mac);
1012
1013         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1014         if (!dev) {
1015                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1016                 return -ENOMEM;
1017         }
1018
1019         priv = dev->priv;
1020         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1021
1022         SET_IEEE80211_DEV(dev, &intf->dev);
1023         usb_set_intfdata(intf, dev);
1024         priv->udev = udev;
1025
1026         usb_get_dev(udev);
1027
1028         skb_queue_head_init(&priv->rx_queue);
1029
1030         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1031         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1032
1033         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1034         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1035         priv->map = (struct rtl818x_csr *)0xFF00;
1036
1037         priv->band.band = IEEE80211_BAND_2GHZ;
1038         priv->band.channels = priv->channels;
1039         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1040         priv->band.bitrates = priv->rates;
1041         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1042         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1043
1044
1045         priv->mode = IEEE80211_IF_TYPE_MNTR;
1046         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1047                      IEEE80211_HW_RX_INCLUDES_FCS;
1048
1049         eeprom.data = dev;
1050         eeprom.register_read = rtl8187_eeprom_register_read;
1051         eeprom.register_write = rtl8187_eeprom_register_write;
1052         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1053                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1054         else
1055                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1056
1057         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1058         udelay(10);
1059
1060         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1061                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1062         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1063                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1064                        "generated MAC address\n");
1065                 random_ether_addr(dev->wiphy->perm_addr);
1066         }
1067
1068         channel = priv->channels;
1069         for (i = 0; i < 3; i++) {
1070                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1071                                   &txpwr);
1072                 (*channel++).hw_value = txpwr & 0xFF;
1073                 (*channel++).hw_value = txpwr >> 8;
1074         }
1075         for (i = 0; i < 2; i++) {
1076                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1077                                   &txpwr);
1078                 (*channel++).hw_value = txpwr & 0xFF;
1079                 (*channel++).hw_value = txpwr >> 8;
1080         }
1081
1082         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1083                           &priv->txpwr_base);
1084
1085         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1086         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1087         /* 0 means asic B-cut, we should use SW 3 wire
1088          * bit-by-bit banging for radio. 1 means we can use
1089          * USB specific request to write radio registers */
1090         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1091         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1092         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1093
1094         if (!priv->is_rtl8187b) {
1095                 u32 reg32;
1096                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1097                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1098                 switch (reg32) {
1099                 case RTL818X_TX_CONF_R8187vD_B:
1100                         /* Some RTL8187B devices have a USB ID of 0x8187
1101                          * detect them here */
1102                         chip_name = "RTL8187BvB(early)";
1103                         priv->is_rtl8187b = 1;
1104                         priv->hw_rev = RTL8187BvB;
1105                         break;
1106                 case RTL818X_TX_CONF_R8187vD:
1107                         chip_name = "RTL8187vD";
1108                         break;
1109                 default:
1110                         chip_name = "RTL8187vB (default)";
1111                 }
1112        } else {
1113                 /*
1114                  * Force USB request to write radio registers for 8187B, Realtek
1115                  * only uses it in their sources
1116                  */
1117                 /*if (priv->asic_rev == 0) {
1118                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1119                                "requests to write to radio registers\n");
1120                         priv->asic_rev = 1;
1121                 }*/
1122                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1123                 case RTL818X_R8187B_B:
1124                         chip_name = "RTL8187BvB";
1125                         priv->hw_rev = RTL8187BvB;
1126                         break;
1127                 case RTL818X_R8187B_D:
1128                         chip_name = "RTL8187BvD";
1129                         priv->hw_rev = RTL8187BvD;
1130                         break;
1131                 case RTL818X_R8187B_E:
1132                         chip_name = "RTL8187BvE";
1133                         priv->hw_rev = RTL8187BvE;
1134                         break;
1135                 default:
1136                         chip_name = "RTL8187BvB (default)";
1137                         priv->hw_rev = RTL8187BvB;
1138                 }
1139         }
1140
1141         if (!priv->is_rtl8187b) {
1142                 for (i = 0; i < 2; i++) {
1143                         eeprom_93cx6_read(&eeprom,
1144                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1145                                           &txpwr);
1146                         (*channel++).hw_value = txpwr & 0xFF;
1147                         (*channel++).hw_value = txpwr >> 8;
1148                 }
1149         } else {
1150                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1151                                   &txpwr);
1152                 (*channel++).hw_value = txpwr & 0xFF;
1153
1154                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1155                 (*channel++).hw_value = txpwr & 0xFF;
1156
1157                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1158                 (*channel++).hw_value = txpwr & 0xFF;
1159                 (*channel++).hw_value = txpwr >> 8;
1160         }
1161
1162         if (priv->is_rtl8187b) {
1163                 printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
1164                         "is EXPERIMENTAL, and could damage your\n"
1165                         "         hardware, use at your own risk\n");
1166                 dev->flags |= IEEE80211_HW_SIGNAL_DBM;
1167         } else {
1168                 dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC;
1169                 dev->max_signal = 65;
1170         }
1171
1172         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1173                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1174                        " info!\n");
1175
1176         priv->rf = rtl8187_detect_rf(dev);
1177         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1178                                   sizeof(struct rtl8187_tx_hdr) :
1179                                   sizeof(struct rtl8187b_tx_hdr);
1180         if (!priv->is_rtl8187b)
1181                 dev->queues = 1;
1182         else
1183                 dev->queues = 4;
1184
1185         err = ieee80211_register_hw(dev);
1186         if (err) {
1187                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1188                 goto err_free_dev;
1189         }
1190
1191         printk(KERN_INFO "%s: hwaddr %s, %s V%d + %s\n",
1192                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
1193                chip_name, priv->asic_rev, priv->rf->name);
1194
1195         return 0;
1196
1197  err_free_dev:
1198         ieee80211_free_hw(dev);
1199         usb_set_intfdata(intf, NULL);
1200         usb_put_dev(udev);
1201         return err;
1202 }
1203
1204 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1205 {
1206         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1207         struct rtl8187_priv *priv;
1208
1209         if (!dev)
1210                 return;
1211
1212         ieee80211_unregister_hw(dev);
1213
1214         priv = dev->priv;
1215         usb_put_dev(interface_to_usbdev(intf));
1216         ieee80211_free_hw(dev);
1217 }
1218
1219 static struct usb_driver rtl8187_driver = {
1220         .name           = KBUILD_MODNAME,
1221         .id_table       = rtl8187_table,
1222         .probe          = rtl8187_probe,
1223         .disconnect     = __devexit_p(rtl8187_disconnect),
1224 };
1225
1226 static int __init rtl8187_init(void)
1227 {
1228         return usb_register(&rtl8187_driver);
1229 }
1230
1231 static void __exit rtl8187_exit(void)
1232 {
1233         usb_deregister(&rtl8187_driver);
1234 }
1235
1236 module_init(rtl8187_init);
1237 module_exit(rtl8187_exit);