[PATCH] x86: adjust inclusion of asm/fixmap.h
[linux-2.6] / arch / x86_64 / kernel / genapic_flat.c
1 /*
2  * Copyright 2004 James Cleverdon, IBM.
3  * Subject to the GNU Public License, v.2
4  *
5  * Flat APIC subarch code.
6  *
7  * Hacked for x86-64 by James Cleverdon from i386 architecture code by
8  * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
9  * James Cleverdon.
10  */
11 #include <linux/threads.h>
12 #include <linux/cpumask.h>
13 #include <linux/string.h>
14 #include <linux/kernel.h>
15 #include <linux/ctype.h>
16 #include <linux/init.h>
17 #include <asm/smp.h>
18 #include <asm/ipi.h>
19 #include <asm/genapic.h>
20
21 static cpumask_t flat_target_cpus(void)
22 {
23         return cpu_online_map;
24 }
25
26 static cpumask_t flat_vector_allocation_domain(int cpu)
27 {
28         /* Careful. Some cpus do not strictly honor the set of cpus
29          * specified in the interrupt destination when using lowest
30          * priority interrupt delivery mode.
31          *
32          * In particular there was a hyperthreading cpu observed to
33          * deliver interrupts to the wrong hyperthread when only one
34          * hyperthread was specified in the interrupt desitination.
35          */
36         cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
37         return domain;
38 }
39
40 /*
41  * Set up the logical destination ID.
42  *
43  * Intel recommends to set DFR, LDR and TPR before enabling
44  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
45  * document number 292116).  So here it goes...
46  */
47 static void flat_init_apic_ldr(void)
48 {
49         unsigned long val;
50         unsigned long num, id;
51
52         num = smp_processor_id();
53         id = 1UL << num;
54         x86_cpu_to_log_apicid[num] = id;
55         apic_write(APIC_DFR, APIC_DFR_FLAT);
56         val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
57         val |= SET_APIC_LOGICAL_ID(id);
58         apic_write(APIC_LDR, val);
59 }
60
61 static void flat_send_IPI_mask(cpumask_t cpumask, int vector)
62 {
63         unsigned long mask = cpus_addr(cpumask)[0];
64         unsigned long cfg;
65         unsigned long flags;
66
67         local_irq_save(flags);
68
69         /*
70          * Wait for idle.
71          */
72         apic_wait_icr_idle();
73
74         /*
75          * prepare target chip field
76          */
77         cfg = __prepare_ICR2(mask);
78         apic_write(APIC_ICR2, cfg);
79
80         /*
81          * program the ICR
82          */
83         cfg = __prepare_ICR(0, vector, APIC_DEST_LOGICAL);
84
85         /*
86          * Send the IPI. The write to APIC_ICR fires this off.
87          */
88         apic_write(APIC_ICR, cfg);
89         local_irq_restore(flags);
90 }
91
92 static void flat_send_IPI_allbutself(int vector)
93 {
94 #ifdef  CONFIG_HOTPLUG_CPU
95         int hotplug = 1;
96 #else
97         int hotplug = 0;
98 #endif
99         if (hotplug || vector == NMI_VECTOR) {
100                 cpumask_t allbutme = cpu_online_map;
101
102                 cpu_clear(smp_processor_id(), allbutme);
103
104                 if (!cpus_empty(allbutme))
105                         flat_send_IPI_mask(allbutme, vector);
106         } else if (num_online_cpus() > 1) {
107                 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
108         }
109 }
110
111 static void flat_send_IPI_all(int vector)
112 {
113         if (vector == NMI_VECTOR)
114                 flat_send_IPI_mask(cpu_online_map, vector);
115         else
116                 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
117 }
118
119 static int flat_apic_id_registered(void)
120 {
121         return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
122 }
123
124 static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask)
125 {
126         return cpus_addr(cpumask)[0] & APIC_ALL_CPUS;
127 }
128
129 static unsigned int phys_pkg_id(int index_msb)
130 {
131         return hard_smp_processor_id() >> index_msb;
132 }
133
134 struct genapic apic_flat =  {
135         .name = "flat",
136         .int_delivery_mode = dest_LowestPrio,
137         .int_dest_mode = (APIC_DEST_LOGICAL != 0),
138         .target_cpus = flat_target_cpus,
139         .vector_allocation_domain = flat_vector_allocation_domain,
140         .apic_id_registered = flat_apic_id_registered,
141         .init_apic_ldr = flat_init_apic_ldr,
142         .send_IPI_all = flat_send_IPI_all,
143         .send_IPI_allbutself = flat_send_IPI_allbutself,
144         .send_IPI_mask = flat_send_IPI_mask,
145         .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
146         .phys_pkg_id = phys_pkg_id,
147 };
148
149 /*
150  * Physflat mode is used when there are more than 8 CPUs on a AMD system.
151  * We cannot use logical delivery in this case because the mask
152  * overflows, so use physical mode.
153  */
154
155 static cpumask_t physflat_target_cpus(void)
156 {
157         return cpu_online_map;
158 }
159
160 static cpumask_t physflat_vector_allocation_domain(int cpu)
161 {
162         cpumask_t domain = CPU_MASK_NONE;
163         cpu_set(cpu, domain);
164         return domain;
165 }
166
167
168 static void physflat_send_IPI_mask(cpumask_t cpumask, int vector)
169 {
170         send_IPI_mask_sequence(cpumask, vector);
171 }
172
173 static void physflat_send_IPI_allbutself(int vector)
174 {
175         cpumask_t allbutme = cpu_online_map;
176
177         cpu_clear(smp_processor_id(), allbutme);
178         physflat_send_IPI_mask(allbutme, vector);
179 }
180
181 static void physflat_send_IPI_all(int vector)
182 {
183         physflat_send_IPI_mask(cpu_online_map, vector);
184 }
185
186 static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask)
187 {
188         int cpu;
189
190         /*
191          * We're using fixed IRQ delivery, can only return one phys APIC ID.
192          * May as well be the first.
193          */
194         cpu = first_cpu(cpumask);
195         if ((unsigned)cpu < NR_CPUS)
196                 return x86_cpu_to_apicid[cpu];
197         else
198                 return BAD_APICID;
199 }
200
201 struct genapic apic_physflat =  {
202         .name = "physical flat",
203         .int_delivery_mode = dest_Fixed,
204         .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
205         .target_cpus = physflat_target_cpus,
206         .vector_allocation_domain = physflat_vector_allocation_domain,
207         .apic_id_registered = flat_apic_id_registered,
208         .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/
209         .send_IPI_all = physflat_send_IPI_all,
210         .send_IPI_allbutself = physflat_send_IPI_allbutself,
211         .send_IPI_mask = physflat_send_IPI_mask,
212         .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
213         .phys_pkg_id = phys_pkg_id,
214 };