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   1 /*
   2  * arch/ppc/platforms/mvme5100.c
   3  *
   4  * Board setup routines for the Motorola MVME5100.
   5  *
   6  * Author: Matt Porter <mporter@mvista.com>
   7  *
   8  * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
   9  * the terms of the GNU General Public License version 2.  This program
  10  * is licensed "as is" without any warranty of any kind, whether express
  11  * or implied.
  12  */
  13
  14 #include <linux/config.h>
  15 #include <linux/stddef.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/errno.h>
  19 #include <linux/pci.h>
  20 #include <linux/initrd.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/ide.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/kdev_t.h>
  26 #include <linux/root_dev.h>
  27
  28 #include <asm/system.h>
  29 #include <asm/pgtable.h>
  30 #include <asm/page.h>
  31 #include <asm/dma.h>
  32 #include <asm/io.h>
  33 #include <asm/machdep.h>
  34 #include <asm/open_pic.h>
  35 #include <asm/i8259.h>
  36 #include <asm/todc.h>
  37 #include <asm/pci-bridge.h>
  38 #include <asm/bootinfo.h>
  39 #include <asm/hawk.h>
  40
  41 #include <platforms/pplus.h>
  42 #include <platforms/mvme5100.h>
  43
  44 static u_char mvme5100_openpic_initsenses[16] __initdata = {
  45         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* i8259 cascade */
  46         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* TL16C550 UART 1,2 */
  47         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet1 front panel or P2 */
  48         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Hawk Watchdog 1,2 */
  49         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* DS1621 thermal alarm */
  50         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT0# */
  51         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT1# */
  52         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT2# */
  53         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT3# */
  54         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTA#, PMC2 INTB# */
  55         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTB#, PMC2 INTC# */
  56         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTC#, PMC2 INTD# */
  57         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTD#, PMC2 INTA# */
  58         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet 2 (front panel) */
  59         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Abort Switch */
  60         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* RTC Alarm */
  61 };
  62
  63 static inline int
  64 mvme5100_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  65 {
  66         int irq;
  67
  68         static char pci_irq_table[][4] =
  69         /*
  70          *      PCI IDSEL/INTPIN->INTLINE
  71          *         A   B   C   D
  72          */
  73         {
  74                 {  0,  0,  0,  0 },     /* IDSEL 11 - Winbond */
  75                 {  0,  0,  0,  0 },     /* IDSEL 12 - unused */
  76                 { 21, 22, 23, 24 },     /* IDSEL 13 - Universe II */
  77                 { 18,  0,  0,  0 },     /* IDSEL 14 - Enet 1 */
  78                 {  0,  0,  0,  0 },     /* IDSEL 15 - unused */
  79                 { 25, 26, 27, 28 },     /* IDSEL 16 - PMC Slot 1 */
  80                 { 28, 25, 26, 27 },     /* IDSEL 17 - PMC Slot 2 */
  81                 {  0,  0,  0,  0 },     /* IDSEL 18 - unused */
  82                 { 29,  0,  0,  0 },     /* IDSEL 19 - Enet 2 */
  83                 {  0,  0,  0,  0 },     /* IDSEL 20 - PMCSPAN */
  84         };
  85
  86         const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
  87         irq = PCI_IRQ_TABLE_LOOKUP;
  88         /* If lookup is zero, always return 0 */
  89         if (!irq)
  90                 return 0;
  91         else
  92 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
  93         /* If IPMC761 present, return table value */
  94         return irq;
  95 #else
  96         /* If IPMC761 not present, we don't have an i8259 so adjust */
  97         return (irq - NUM_8259_INTERRUPTS);
  98 #endif
  99 }
 100
 101 static void
 102 mvme5100_pcibios_fixup_resources(struct pci_dev *dev)
 103 {
 104         int i;
 105
 106         if ((dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
 107                         (dev->device == PCI_DEVICE_ID_MOTOROLA_HAWK))
 108                 for (i=0; i<DEVICE_COUNT_RESOURCE; i++)
 109                 {
 110                         dev->resource[i].start = 0;
 111                         dev->resource[i].end = 0;
 112                 }
 113 }
 114
 115 static void __init
 116 mvme5100_setup_bridge(void)
 117 {
 118         struct pci_controller*  hose;
 119
 120         hose = pcibios_alloc_controller();
 121
 122         if (!hose)
 123                 return;
 124
 125         hose->first_busno = 0;
 126         hose->last_busno = 0xff;
 127         hose->pci_mem_offset = MVME5100_PCI_MEM_OFFSET;
 128
 129         pci_init_resource(&hose->io_resource, MVME5100_PCI_LOWER_IO,
 130                         MVME5100_PCI_UPPER_IO, IORESOURCE_IO,
 131                         "PCI host bridge");
 132
 133         pci_init_resource(&hose->mem_resources[0], MVME5100_PCI_LOWER_MEM,
 134                         MVME5100_PCI_UPPER_MEM, IORESOURCE_MEM,
 135                         "PCI host bridge");
 136
 137         hose->io_space.start = MVME5100_PCI_LOWER_IO;
 138         hose->io_space.end = MVME5100_PCI_UPPER_IO;
 139         hose->mem_space.start = MVME5100_PCI_LOWER_MEM;
 140         hose->mem_space.end = MVME5100_PCI_UPPER_MEM;
 141         hose->io_base_virt = (void *)MVME5100_ISA_IO_BASE;
 142
 143         /* Use indirect method of Hawk */
 144         setup_indirect_pci(hose, MVME5100_PCI_CONFIG_ADDR,
 145                         MVME5100_PCI_CONFIG_DATA);
 146
 147         hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
 148
 149         ppc_md.pcibios_fixup_resources = mvme5100_pcibios_fixup_resources;
 150         ppc_md.pci_swizzle = common_swizzle;
 151         ppc_md.pci_map_irq = mvme5100_map_irq;
 152 }
 153
 154 static void __init
 155 mvme5100_setup_arch(void)
 156 {
 157         if ( ppc_md.progress )
 158                 ppc_md.progress("mvme5100_setup_arch: enter", 0);
 159
 160         loops_per_jiffy = 50000000 / HZ;
 161
 162 #ifdef CONFIG_BLK_DEV_INITRD
 163         if (initrd_start)
 164                 ROOT_DEV = Root_RAM0;
 165         else
 166 #endif
 167 #ifdef  CONFIG_ROOT_NFS
 168                 ROOT_DEV = Root_NFS;
 169 #else
 170                 ROOT_DEV = Root_SDA2;
 171 #endif
 172
 173         if ( ppc_md.progress )
 174                 ppc_md.progress("mvme5100_setup_arch: find_bridges", 0);
 175
 176         /* Setup PCI host bridge */
 177         mvme5100_setup_bridge();
 178
 179         /* Find and map our OpenPIC */
 180         hawk_mpic_init(MVME5100_PCI_MEM_OFFSET);
 181         OpenPIC_InitSenses = mvme5100_openpic_initsenses;
 182         OpenPIC_NumInitSenses = sizeof(mvme5100_openpic_initsenses);
 183
 184         printk("MVME5100 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
 185
 186         if ( ppc_md.progress )
 187                 ppc_md.progress("mvme5100_setup_arch: exit", 0);
 188
 189         return;
 190 }
 191
 192 static void __init
 193 mvme5100_init2(void)
 194 {
 195 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
 196                 request_region(0x00,0x20,"dma1");
 197                 request_region(0x20,0x20,"pic1");
 198                 request_region(0x40,0x20,"timer");
 199                 request_region(0x80,0x10,"dma page reg");
 200                 request_region(0xa0,0x20,"pic2");
 201                 request_region(0xc0,0x20,"dma2");
 202 #endif
 203         return;
 204 }
 205
 206 /*
 207  * Interrupt setup and service.
 208  * Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC.
 209  */
 210 static void __init
 211 mvme5100_init_IRQ(void)
 212 {
 213 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
 214         int i;
 215 #endif
 216
 217         if ( ppc_md.progress )
 218                 ppc_md.progress("init_irq: enter", 0);
 219
 220         openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
 221 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
 222         openpic_init(NUM_8259_INTERRUPTS);
 223         openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
 224                         &i8259_irq);
 225
 226         /* Map i8259 interrupts. */
 227         for (i = 0; i < NUM_8259_INTERRUPTS; i++)
 228                 irq_desc[i].handler = &i8259_pic;
 229
 230         i8259_init(0);
 231 #else
 232         openpic_init(0);
 233 #endif
 234
 235         if ( ppc_md.progress )
 236                 ppc_md.progress("init_irq: exit", 0);
 237
 238         return;
 239 }
 240
 241 /*
 242  * Set BAT 3 to map 0xf0000000 to end of physical memory space.
 243  */
 244 static __inline__ void
 245 mvme5100_set_bat(void)
 246 {
 247         mb();
 248         mtspr(SPRN_DBAT1U, 0xf0001ffe);
 249         mtspr(SPRN_DBAT1L, 0xf000002a);
 250         mb();
 251 }
 252
 253 static unsigned long __init
 254 mvme5100_find_end_of_memory(void)
 255 {
 256         return hawk_get_mem_size(MVME5100_HAWK_SMC_BASE);
 257 }
 258
 259 static void __init
 260 mvme5100_map_io(void)
 261 {
 262         io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
 263         ioremap_base = 0xfe000000;
 264 }
 265
 266 static void
 267 mvme5100_reset_board(void)
 268 {
 269         local_irq_disable();
 270
 271         /* Set exception prefix high - to the firmware */
 272         _nmask_and_or_msr(0, MSR_IP);
 273
 274         out_8((u_char *)MVME5100_BOARD_MODRST_REG, 0x01);
 275
 276         return;
 277 }
 278
 279 static void
 280 mvme5100_restart(char *cmd)
 281 {
 282         volatile ulong i = 10000000;
 283
 284         mvme5100_reset_board();
 285
 286         while (i-- > 0);
 287         panic("restart failed\n");
 288 }
 289
 290 static void
 291 mvme5100_halt(void)
 292 {
 293         local_irq_disable();
 294         while (1);
 295 }
 296
 297 static void
 298 mvme5100_power_off(void)
 299 {
 300         mvme5100_halt();
 301 }
 302
 303 static int
 304 mvme5100_show_cpuinfo(struct seq_file *m)
 305 {
 306         seq_printf(m, "vendor\t\t: Motorola\n");
 307         seq_printf(m, "machine\t\t: MVME5100\n");
 308
 309         return 0;
 310 }
 311
 312 TODC_ALLOC();
 313
 314 void __init
 315 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 316               unsigned long r6, unsigned long r7)
 317 {
 318         parse_bootinfo(find_bootinfo());
 319         mvme5100_set_bat();
 320
 321         isa_io_base = MVME5100_ISA_IO_BASE;
 322         isa_mem_base = MVME5100_ISA_MEM_BASE;
 323         pci_dram_offset = MVME5100_PCI_DRAM_OFFSET;
 324
 325         ppc_md.setup_arch = mvme5100_setup_arch;
 326         ppc_md.show_cpuinfo = mvme5100_show_cpuinfo;
 327         ppc_md.init_IRQ = mvme5100_init_IRQ;
 328         ppc_md.get_irq = openpic_get_irq;
 329         ppc_md.init = mvme5100_init2;
 330
 331         ppc_md.restart = mvme5100_restart;
 332         ppc_md.power_off = mvme5100_power_off;
 333         ppc_md.halt = mvme5100_halt;
 334
 335         ppc_md.find_end_of_memory = mvme5100_find_end_of_memory;
 336         ppc_md.setup_io_mappings = mvme5100_map_io;
 337
 338         TODC_INIT(TODC_TYPE_MK48T37, MVME5100_NVRAM_AS0, MVME5100_NVRAM_AS1,
 339                         MVME5100_NVRAM_DATA, 8);
 340
 341         ppc_md.time_init = todc_time_init;
 342         ppc_md.set_rtc_time = todc_set_rtc_time;
 343         ppc_md.get_rtc_time = todc_get_rtc_time;
 344         ppc_md.calibrate_decr = todc_calibrate_decr;
 345
 346         ppc_md.nvram_read_val = todc_m48txx_read_val;
 347         ppc_md.nvram_write_val = todc_m48txx_write_val;
 348 }