2 * File: include/asm-blackfin/simple_bf533_dma.h
3 * Based on: none - original work
4 * Author: LG Soft India
5 * Copyright (C) 2004-2005 Analog Devices Inc.
6 * Created: Tue Sep 21 2004
7 * Description: This file contains the major Data structures and constants
8 * used for DMA Implementation in BF533
11 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2, or (at your option)
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; see the file COPYING.
25 * If not, write to the Free Software Foundation,
26 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 #ifndef _BLACKFIN_DMA_H_
30 #define _BLACKFIN_DMA_H_
33 #include <linux/slab.h>
35 #include <asm/signal.h>
37 #include <linux/kernel.h>
38 #include <asm/mach/dma.h>
40 #include <linux/interrupt.h>
41 #include <asm/blackfin.h>
43 #define MAX_DMA_ADDRESS PAGE_OFFSET
45 /*****************************************************************************
46 * Generic DMA Declarations
48 ****************************************************************************/
49 enum dma_chan_status {
51 DMA_CHANNEL_REQUESTED,
55 /*-------------------------
56 * config reg bits value
57 *-------------------------*/
59 #define DATA_SIZE_16 1
60 #define DATA_SIZE_32 2
62 #define DMA_FLOW_STOP 0
63 #define DMA_FLOW_AUTO 1
64 #define DMA_FLOW_ARRAY 4
65 #define DMA_FLOW_SMALL 6
66 #define DMA_FLOW_LARGE 7
68 #define DIMENSION_LINEAR 0
69 #define DIMENSION_2D 1
74 #define INTR_DISABLE 0
78 #define DMA_NOSYNC_KEEP_DMA_BUF 0
79 #define DMA_SYNC_RESTART 1
82 unsigned long next_desc_addr;
83 unsigned long start_addr;
85 unsigned short x_count;
87 unsigned short y_count;
89 } __attribute__((packed));
92 unsigned long next_desc_ptr; /* DMA Next Descriptor Pointer register */
93 unsigned long start_addr; /* DMA Start address register */
95 unsigned short cfg; /* DMA Configuration register */
96 unsigned short dummy1; /* DMA Configuration register */
98 unsigned long reserved;
100 unsigned short x_count; /* DMA x_count register */
101 unsigned short dummy2;
103 short x_modify; /* DMA x_modify register */
104 unsigned short dummy3;
106 unsigned short y_count; /* DMA y_count register */
107 unsigned short dummy4;
109 short y_modify; /* DMA y_modify register */
110 unsigned short dummy5;
112 unsigned long curr_desc_ptr; /* DMA Current Descriptor Pointer
114 unsigned long curr_addr_ptr; /* DMA Current Address Pointer
116 unsigned short irq_status; /* DMA irq status register */
117 unsigned short dummy6;
119 unsigned short peripheral_map; /* DMA peripheral map register */
120 unsigned short dummy7;
122 unsigned short curr_x_count; /* DMA Current x-count register */
123 unsigned short dummy8;
125 unsigned long reserved2;
127 unsigned short curr_y_count; /* DMA Current y-count register */
128 unsigned short dummy9;
130 unsigned long reserved3;
134 typedef irqreturn_t(*dma_interrupt_t) (int irq, void *dev_id);
137 struct mutex dmalock;
139 enum dma_chan_status chan_status;
140 struct dma_register *regs;
141 struct dmasg *sg; /* large mode descriptor */
142 unsigned int ctrl_num; /* controller number */
143 dma_interrupt_t irq_callback;
145 unsigned int dma_enable_flag;
146 unsigned int loopback_flag;
149 /*******************************************************************************
151 *******************************************************************************/
152 /* functions to set register mode */
153 void set_dma_start_addr(unsigned int channel, unsigned long addr);
154 void set_dma_next_desc_addr(unsigned int channel, unsigned long addr);
155 void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr);
156 void set_dma_x_count(unsigned int channel, unsigned short x_count);
157 void set_dma_x_modify(unsigned int channel, short x_modify);
158 void set_dma_y_count(unsigned int channel, unsigned short y_count);
159 void set_dma_y_modify(unsigned int channel, short y_modify);
160 void set_dma_config(unsigned int channel, unsigned short config);
161 unsigned short set_bfin_dma_config(char direction, char flow_mode,
162 char intr_mode, char dma_mode, char width,
164 void set_dma_curr_addr(unsigned int channel, unsigned long addr);
166 /* get curr status for polling */
167 unsigned short get_dma_curr_irqstat(unsigned int channel);
168 unsigned short get_dma_curr_xcount(unsigned int channel);
169 unsigned short get_dma_curr_ycount(unsigned int channel);
170 unsigned long get_dma_next_desc_ptr(unsigned int channel);
171 unsigned long get_dma_curr_desc_ptr(unsigned int channel);
172 unsigned long get_dma_curr_addr(unsigned int channel);
174 /* set large DMA mode descriptor */
175 void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg);
177 /* check if current channel is in use */
178 int dma_channel_active(unsigned int channel);
180 /* common functions must be called in any mode */
181 void free_dma(unsigned int channel);
182 int dma_channel_active(unsigned int channel); /* check if a channel is in use */
183 void disable_dma(unsigned int channel);
184 void enable_dma(unsigned int channel);
185 int request_dma(unsigned int channel, char *device_id);
186 int set_dma_callback(unsigned int channel, dma_interrupt_t callback,
188 void dma_disable_irq(unsigned int channel);
189 void dma_enable_irq(unsigned int channel);
190 void clear_dma_irqstat(unsigned int channel);
191 void *dma_memcpy(void *dest, const void *src, size_t count);
192 void *safe_dma_memcpy(void *dest, const void *src, size_t count);
194 extern int channel2irq(unsigned int channel);
195 extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL];