1 /******************************************************************************
2 * arch/ia64/include/asm/native/inst.h
4 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #define DO_SAVE_MIN IA64_NATIVE_DO_SAVE_MIN
25 #define __paravirt_switch_to ia64_native_switch_to
26 #define __paravirt_leave_syscall ia64_native_leave_syscall
27 #define __paravirt_work_processed_syscall ia64_native_work_processed_syscall
28 #define __paravirt_leave_kernel ia64_native_leave_kernel
29 #define __paravirt_pending_syscall_end ia64_work_pending_syscall_end
30 #define __paravirt_work_processed_syscall_target \
31 ia64_work_processed_syscall
33 #ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK
34 # define PARAVIRT_POISON 0xdeadbeefbaadf00d
35 # define CLOBBER(clob) \
37 movl clob = PARAVIRT_POISON; \
40 # define CLOBBER(clob) /* nothing */
43 #define MOV_FROM_IFA(reg) \
46 #define MOV_FROM_ITIR(reg) \
49 #define MOV_FROM_ISR(reg) \
52 #define MOV_FROM_IHA(reg) \
55 #define MOV_FROM_IPSR(pred, reg) \
56 (pred) mov reg = cr.ipsr
58 #define MOV_FROM_IIM(reg) \
61 #define MOV_FROM_IIP(reg) \
64 #define MOV_FROM_IVR(reg, clob) \
68 #define MOV_FROM_PSR(pred, reg, clob) \
69 (pred) mov reg = psr \
72 #define MOV_TO_IFA(reg, clob) \
76 #define MOV_TO_ITIR(pred, reg, clob) \
77 (pred) mov cr.itir = reg \
80 #define MOV_TO_IHA(pred, reg, clob) \
81 (pred) mov cr.iha = reg \
84 #define MOV_TO_IPSR(pred, reg, clob) \
85 (pred) mov cr.ipsr = reg \
88 #define MOV_TO_IFS(pred, reg, clob) \
89 (pred) mov cr.ifs = reg \
92 #define MOV_TO_IIP(reg, clob) \
96 #define MOV_TO_KR(kr, reg, clob0, clob1) \
97 mov IA64_KR(kr) = reg \
101 #define ITC_I(pred, reg, clob) \
105 #define ITC_D(pred, reg, clob) \
109 #define ITC_I_AND_D(pred_i, pred_d, reg, clob) \
110 (pred_i) itc.i reg; \
114 #define THASH(pred, reg0, reg1, clob) \
115 (pred) thash reg0 = reg1 \
118 #define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \
119 ssm psr.ic | PSR_DEFAULT_BITS \
123 srlz.i /* guarantee that interruption collectin is on */ \
126 #define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \
133 #define RSM_PSR_IC(clob) \
137 #define SSM_PSR_I(pred, pred_clob, clob) \
141 #define RSM_PSR_I(pred, clob0, clob1) \
146 #define RSM_PSR_I_IC(clob0, clob1, clob2) \
155 #define SSM_PSR_DT_AND_SRLZ_I \
160 #define BSW_0(clob0, clob1, clob2) \
166 #define BSW_1(clob0, clob1) \