2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
16 config RWSEM_GENERIC_SPINLOCK
20 config RWSEM_XCHGADD_ALGORITHM
36 config SEMAPHORE_SLEEPERS
40 config GENERIC_FIND_NEXT_BIT
44 config GENERIC_HWEIGHT
48 config GENERIC_HARDIRQS
52 config GENERIC_IRQ_PROBE
64 config FORCE_MAX_ZONEORDER
68 config GENERIC_CALIBRATE_DELAY
72 config IRQCHIP_DEMUX_GPIO
74 depends on (BF53x || BF561 || BF54x)
78 source "kernel/Kconfig.preempt"
80 menu "Blackfin Processor Options"
82 comment "Processor and Board Settings"
91 BF531 Processor Support.
96 BF532 Processor Support.
101 BF533 Processor Support.
106 BF534 Processor Support.
111 BF536 Processor Support.
116 BF537 Processor Support.
121 BF542 Processor Support.
126 BF544 Processor Support.
131 BF548 Processor Support.
136 BF549 Processor Support.
141 Not Supported Yet - Work in progress - BF561 Processor Support.
147 default BF_REV_0_2 if BF537
148 default BF_REV_0_3 if BF533
149 default BF_REV_0_0 if BF549
157 depends on (BF537 || BF536 || BF534)
161 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
165 depends on (BF561 || BF533 || BF532 || BF531)
169 depends on (BF561 || BF533 || BF532 || BF531)
181 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
186 depends on (BF542 || BF544 || BF548 || BF549)
189 config BFIN_DUAL_CORE
194 config BFIN_SINGLE_CORE
196 depends on !BFIN_DUAL_CORE
201 default BFIN533_STAMP
203 Do NOT change the board here. Please use the top level
204 configuration to ensure that all the other settings are
209 depends on (BF533 || BF532 || BF531)
211 BF533-EZKIT-LITE board Support.
215 depends on (BF533 || BF532 || BF531)
217 BF533-STAMP board Support.
221 depends on (BF537 || BF536 || BF534)
223 BF537-STAMP board Support.
225 config BFIN533_BLUETECHNIX_CM
226 bool "Bluetechnix CM-BF533"
229 CM-BF533 support for EVAL- and DEV-Board.
231 config BFIN537_BLUETECHNIX_CM
232 bool "Bluetechnix CM-BF537"
235 CM-BF537 support for EVAL- and DEV-Board.
239 depends on (BF548 || BF549)
241 BFIN548-EZKIT board Support.
243 config BFIN561_BLUETECHNIX_CM
244 bool "Bluetechnix CM-BF561"
247 CM-BF561 support for EVAL- and DEV-Board.
253 BF561-EZKIT-LITE board Support.
259 BF561-TEPLA board Support.
262 bool "PNAV 1.0 board"
265 PNAV 1.0 board Support.
269 depends on (BF537 || BF536 \
270 || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
272 GENERIC or Custom board Support.
276 config MEM_GENERIC_BOARD
278 depends on GENERIC_BOARD
281 config MEM_MT48LC64M4A2FB_7E
283 depends on (BFIN533_STAMP)
286 config MEM_MT48LC16M16A2TG_75
288 depends on (BFIN533_EZKIT || BFIN561_EZKIT \
289 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
292 config MEM_MT48LC32M8A2_75
294 depends on (BFIN537_STAMP || PNAV10)
297 config MEM_MT48LC8M32B2B5_7
299 depends on (BFIN561_BLUETECHNIX_CM)
302 config BFIN_SHARED_FLASH_ENET
304 depends on (BFIN533_STAMP)
307 source "arch/blackfin/mach-bf533/Kconfig"
308 source "arch/blackfin/mach-bf561/Kconfig"
309 source "arch/blackfin/mach-bf537/Kconfig"
310 source "arch/blackfin/mach-bf548/Kconfig"
312 menu "Board customizations"
315 bool "Default bootloader kernel arguments"
318 string "Initial kernel command string"
319 depends on CMDLINE_BOOL
320 default "console=ttyBF0,57600"
322 If you don't have a boot loader capable of passing a command line string
323 to the kernel, you may specify one here. As a minimum, you should specify
324 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
326 comment "Clock/PLL Setup"
329 int "Crystal Frequency in Hz"
330 default "11059200" if BFIN533_STAMP
331 default "27000000" if BFIN533_EZKIT
332 default "25000000" if BFIN537_STAMP
333 default "30000000" if BFIN561_EZKIT
334 default "24576000" if PNAV10
336 The frequency of CLKIN crystal oscillator on the board in Hz.
338 config BFIN_KERNEL_CLOCK
339 bool "Re-program Clocks while Kernel boots?"
342 This option decides if kernel clocks are re-programed from the
343 bootloader settings. If the clocks are not set, the SDRAM settings
344 are also not changed, and the Bootloader does 100% of the hardware
349 depends on BFIN_KERNEL_CLOCK
354 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
357 If this is set the clock will be divided by 2, before it goes to the PLL.
361 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
363 default "22" if BFIN533_EZKIT
364 default "45" if BFIN533_STAMP
365 default "20" if BFIN537_STAMP
366 default "22" if BFIN533_BLUETECHNIX_CM
367 default "20" if BFIN537_BLUETECHNIX_CM
368 default "20" if BFIN561_BLUETECHNIX_CM
369 default "20" if BFIN561_EZKIT
371 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
372 PLL Frequency = (Crystal Frequency) * (this setting)
375 prompt "Core Clock Divider"
376 depends on BFIN_KERNEL_CLOCK
379 This sets the frequency of the core. It can be 1, 2, 4 or 8
380 Core Frequency = (PLL frequency) / (this setting)
396 int "System Clock Divider"
397 depends on BFIN_KERNEL_CLOCK
399 default 5 if BFIN533_EZKIT
400 default 5 if BFIN533_STAMP
401 default 4 if BFIN537_STAMP
402 default 5 if BFIN533_BLUETECHNIX_CM
403 default 4 if BFIN537_BLUETECHNIX_CM
404 default 4 if BFIN561_BLUETECHNIX_CM
405 default 5 if BFIN561_EZKIT
407 This sets the frequency of the system clock (including SDRAM or DDR).
408 This can be between 1 and 15
409 System Clock = (PLL frequency) / (this setting)
412 # Max & Min Speeds for various Chips
416 default 600000000 if BF522
417 default 600000000 if BF525
418 default 600000000 if BF527
419 default 400000000 if BF531
420 default 400000000 if BF532
421 default 750000000 if BF533
422 default 500000000 if BF534
423 default 400000000 if BF536
424 default 600000000 if BF537
425 default 533000000 if BF538
426 default 533000000 if BF539
427 default 600000000 if BF542
428 default 533000000 if BF544
429 default 533000000 if BF549
430 default 600000000 if BF561
444 comment "Kernel Timer/Scheduler"
446 source kernel/Kconfig.hz
448 comment "Memory Setup"
451 int "SDRAM Memory Size in MBytes"
452 default 32 if BFIN533_EZKIT
453 default 64 if BFIN537_STAMP
454 default 64 if BFIN561_EZKIT
455 default 128 if BFIN533_STAMP
459 int "SDRAM Memory Address Width"
460 default 9 if BFIN533_EZKIT
461 default 9 if BFIN561_EZKIT
462 default 10 if BFIN537_STAMP
463 default 11 if BFIN533_STAMP
466 config ENET_FLASH_PIN
467 int "PF port/pin used for flash and ethernet sharing"
468 depends on (BFIN533_STAMP)
471 PF port/pin used for flash and ethernet sharing to allow other PF
472 pins to be used on other platforms without having to touch common
474 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
477 hex "Kernel load address for booting"
479 range 0x1000 0x20000000
481 This option allows you to set the load address of the kernel.
482 This can be useful if you are on a board which has a small amount
483 of memory or you wish to reserve some memory at the beginning of
486 Note that you need to keep this value above 4k (0x1000) as this
487 memory region is used to capture NULL pointer references as well
488 as some core kernel functions.
490 comment "LED Status Indicators"
491 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
493 config BFIN_ALIVE_LED
494 bool "Enable Board Alive"
495 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
498 Blink the LEDs you select when the kernel is running. Helps detect
501 config BFIN_ALIVE_LED_NUM
503 depends on BFIN_ALIVE_LED
504 range 1 3 if BFIN533_STAMP
505 default "3" if BFIN533_STAMP
507 Select the LED (marked on the board) for you to blink.
510 bool "Enable System Load/Idle LED"
511 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
514 Blinks the LED you select when to determine kernel load.
516 config BFIN_IDLE_LED_NUM
518 depends on BFIN_IDLE_LED
519 range 1 3 if BFIN533_STAMP
520 default "2" if BFIN533_STAMP
522 Select the LED (marked on the board) for you to blink.
525 prompt "Blackfin Exception Scratch Register"
526 default BFIN_SCRATCH_REG_RETN
528 Select the resource to reserve for the Exception handler:
529 - RETN: Non-Maskable Interrupt (NMI)
530 - RETE: Exception Return (JTAG/ICE)
531 - CYCLES: Performance counter
533 If you are unsure, please select "RETN".
535 config BFIN_SCRATCH_REG_RETN
538 Use the RETN register in the Blackfin exception handler
539 as a stack scratch register. This means you cannot
540 safely use NMI on the Blackfin while running Linux, but
541 you can debug the system with a JTAG ICE and use the
542 CYCLES performance registers.
544 If you are unsure, please select "RETN".
546 config BFIN_SCRATCH_REG_RETE
549 Use the RETE register in the Blackfin exception handler
550 as a stack scratch register. This means you cannot
551 safely use a JTAG ICE while debugging a Blackfin board,
552 but you can safely use the CYCLES performance registers
555 If you are unsure, please select "RETN".
557 config BFIN_SCRATCH_REG_CYCLES
560 Use the CYCLES register in the Blackfin exception handler
561 as a stack scratch register. This means you cannot
562 safely use the CYCLES performance registers on a Blackfin
563 board at anytime, but you can debug the system with a JTAG
566 If you are unsure, please select "RETN".
571 # Sorry - but you need to put the hex address here -
575 config BFIN_ALIVE_LED_PORT
577 default 0xFFC00700 if (BFIN533_STAMP)
579 # Peripheral Flag Direction Register
580 config BFIN_ALIVE_LED_DPORT
582 default 0xFFC00730 if (BFIN533_STAMP)
584 config BFIN_ALIVE_LED_PIN
586 default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
587 default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
588 default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
590 config BFIN_IDLE_LED_PORT
592 default 0xFFC00700 if (BFIN533_STAMP)
594 # Peripheral Flag Direction Register
595 config BFIN_IDLE_LED_DPORT
597 default 0xFFC00730 if (BFIN533_STAMP)
599 config BFIN_IDLE_LED_PIN
601 default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
602 default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
603 default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
608 menu "Blackfin Kernel Optimizations"
610 comment "Memory Optimizations"
613 bool "Locate interrupt entry code in L1 Memory"
616 If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked
617 into L1 instruction memory. (less latency)
619 config EXCPT_IRQ_SYSC_L1
620 bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory"
623 If enabled, the entire ASM lowlevel exception and interrupt entry code
624 (STORE/RESTORE CONTEXT) is linked into L1 instruction memory.
628 bool "Locate frequently called do_irq dispatcher function in L1 Memory"
631 If enabled, the frequently called do_irq dispatcher function is linked
632 into L1 instruction memory. (less latency)
634 config CORE_TIMER_IRQ_L1
635 bool "Locate frequently called timer_interrupt() function in L1 Memory"
638 If enabled, the frequently called timer_interrupt() function is linked
639 into L1 instruction memory. (less latency)
642 bool "Locate frequently idle function in L1 Memory"
645 If enabled, the frequently called idle function is linked
646 into L1 instruction memory. (less latency)
649 bool "Locate kernel schedule function in L1 Memory"
652 If enabled, the frequently called kernel schedule is linked
653 into L1 instruction memory. (less latency)
655 config ARITHMETIC_OPS_L1
656 bool "Locate kernel owned arithmetic functions in L1 Memory"
659 If enabled, arithmetic functions are linked
660 into L1 instruction memory. (less latency)
663 bool "Locate access_ok function in L1 Memory"
666 If enabled, the access_ok function is linked
667 into L1 instruction memory. (less latency)
670 bool "Locate memset function in L1 Memory"
673 If enabled, the memset function is linked
674 into L1 instruction memory. (less latency)
677 bool "Locate memcpy function in L1 Memory"
680 If enabled, the memcpy function is linked
681 into L1 instruction memory. (less latency)
683 config SYS_BFIN_SPINLOCK_L1
684 bool "Locate sys_bfin_spinlock function in L1 Memory"
687 If enabled, sys_bfin_spinlock function is linked
688 into L1 instruction memory. (less latency)
690 config IP_CHECKSUM_L1
691 bool "Locate IP Checksum function in L1 Memory"
694 If enabled, the IP Checksum function is linked
695 into L1 instruction memory. (less latency)
697 config CACHELINE_ALIGNED_L1
698 bool "Locate cacheline_aligned data to L1 Data Memory"
703 If enabled, cacheline_anligned data is linked
704 into L1 data memory. (less latency)
706 config SYSCALL_TAB_L1
707 bool "Locate Syscall Table L1 Data Memory"
711 If enabled, the Syscall LUT is linked
712 into L1 data memory. (less latency)
714 config CPLB_SWITCH_TAB_L1
715 bool "Locate CPLB Switch Tables L1 Data Memory"
719 If enabled, the CPLB Switch Tables are linked
720 into L1 data memory. (less latency)
726 prompt "Kernel executes from"
728 Choose the memory type that the kernel will be running in.
733 The kernel will be resident in RAM when running.
738 The kernel will be resident in FLASH/ROM when running.
745 bool "Allow allocating large blocks (> 1MB) of memory"
747 Allow the slab memory allocator to keep chains for very large
748 memory sizes - upto 32MB. You may need this if your system has
749 a lot of RAM, and you need to able to allocate very large
750 contiguous chunks. If unsure, say N.
753 bool "Enable DMA Support"
754 depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
757 DMA driver for BF5xx.
760 prompt "Uncached SDRAM region"
761 default DMA_UNCACHED_1M
762 depends on BFIN_DMA_5XX
763 config DMA_UNCACHED_2M
764 bool "Enable 2M DMA region"
765 config DMA_UNCACHED_1M
766 bool "Enable 1M DMA region"
767 config DMA_UNCACHED_NONE
768 bool "Disable DMA region"
772 comment "Cache Support"
777 config BFIN_DCACHE_BANKA
778 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
779 depends on BFIN_DCACHE && !BF531
781 config BFIN_ICACHE_LOCK
782 bool "Enable Instruction Cache Locking"
786 depends on BFIN_DCACHE
792 Cached data will be written back to SDRAM only when needed.
793 This can give a nice increase in performance, but beware of
794 broken drivers that do not properly invalidate/flush their
797 Write Through Policy:
798 Cached data will always be written back to SDRAM when the
799 cache is updated. This is a completely safe setting, but
800 performance is worse than Write Back.
802 If you are unsure of the options and you want to be safe,
803 then go with Write Through.
809 Cached data will be written back to SDRAM only when needed.
810 This can give a nice increase in performance, but beware of
811 broken drivers that do not properly invalidate/flush their
814 Write Through Policy:
815 Cached data will always be written back to SDRAM when the
816 cache is updated. This is a completely safe setting, but
817 performance is worse than Write Back.
819 If you are unsure of the options and you want to be safe,
820 then go with Write Through.
825 int "Set the max L1 SRAM pieces"
828 Set the max memory pieces for the L1 SRAM allocation algorithm.
829 Min value is 16. Max value is 1024.
831 comment "Asynchonous Memory Configuration"
833 menu "EBIU_AMGCTL Global Control"
839 bool "DMA has priority over core for ext. accesses"
845 bool "Bank 0 16 bit packing enable"
850 bool "Bank 1 16 bit packing enable"
855 bool "Bank 2 16 bit packing enable"
860 bool "Bank 3 16 bit packing enable"
864 prompt"Enable Asynchonous Memory Banks"
868 bool "Disable All Banks"
874 bool "Enable Bank 0 & 1"
876 config C_AMBEN_B0_B1_B2
877 bool "Enable Bank 0 & 1 & 2"
880 bool "Enable All Banks"
884 menu "EBIU_AMBCTL Control"
904 #############################################################################
905 menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
912 source "drivers/pci/Kconfig"
915 bool "Support for hot-pluggable device"
917 Say Y here if you want to plug devices into your computer while
918 the system is running, and be able to use them quickly. In many
919 cases, the devices can likewise be unplugged at any time too.
921 One well known example of this is PCMCIA- or PC-cards, credit-card
922 size devices such as network cards, modems or hard drives which are
923 plugged into slots found on all modern laptop computers. Another
924 example, used on modern desktops as well as laptops, is USB.
926 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
927 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
928 Then your kernel will automatically call out to a user mode "policy
929 agent" (/sbin/hotplug) to load modules and set up software needed
930 to use devices as you hotplug them.
932 source "drivers/pcmcia/Kconfig"
934 source "drivers/pci/hotplug/Kconfig"
938 menu "Executable file formats"
940 source "fs/Kconfig.binfmt"
944 menu "Power management options"
945 source "kernel/power/Kconfig"
948 prompt "Select PM Wakeup Event Source"
949 default PM_WAKEUP_GPIO_BY_SIC_IWR
952 If you have a GPIO already configured as input with the corresponding PORTx_MASK
953 bit set - "Specify Wakeup Event by SIC_IWR value"
955 config PM_WAKEUP_GPIO_BY_SIC_IWR
956 bool "Specify Wakeup Event by SIC_IWR value"
957 config PM_WAKEUP_BY_GPIO
958 bool "Cause Wakeup Event by GPIO"
959 config PM_WAKEUP_GPIO_API
960 bool "Configure Wakeup Event by PM GPIO API"
964 config PM_WAKEUP_SIC_IWR
965 hex "Wakeup Events (SIC_IWR)"
966 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
967 default 0x80000000 if (BF537 || BF536 || BF534)
968 default 0x100000 if (BF533 || BF532 || BF531)
970 config PM_WAKEUP_GPIO_NUMBER
971 int "Wakeup GPIO number"
973 depends on PM_WAKEUP_BY_GPIO
974 default 2 if BFIN537_STAMP
977 prompt "GPIO Polarity"
978 depends on PM_WAKEUP_BY_GPIO
979 default PM_WAKEUP_GPIO_POLAR_H
980 config PM_WAKEUP_GPIO_POLAR_H
982 config PM_WAKEUP_GPIO_POLAR_L
984 config PM_WAKEUP_GPIO_POLAR_EDGE_F
986 config PM_WAKEUP_GPIO_POLAR_EDGE_R
988 config PM_WAKEUP_GPIO_POLAR_EDGE_B
994 if (BF537 || BF533 || BF54x)
996 menu "CPU Frequency scaling"
998 source "drivers/cpufreq/Kconfig"
1004 If you want to enable this option, you should select the
1005 DPMC driver from Character Devices.
1010 source "net/Kconfig"
1012 source "drivers/Kconfig"
1016 source "kernel/Kconfig.instrumentation"
1018 menu "Kernel hacking"
1020 source "lib/Kconfig.debug"
1023 bool "Hardware error interrupt debugging"
1024 depends on DEBUG_KERNEL
1026 When enabled, the hardware error interrupt is never disabled, and
1027 will happen immediately when an error condition occurs. This comes
1028 at a slight cost in code size, but is necessary if you are getting
1029 hardware error interrupts and need to know where they are coming
1032 config DEBUG_ICACHE_CHECK
1033 bool "Check Instruction cache coherency"
1034 depends on DEBUG_KERNEL
1035 depends on DEBUG_HWERR
1037 Say Y here if you are getting weird unexplained errors. This will
1038 ensure that icache is what SDRAM says it should be by doing a
1039 byte wise comparison between SDRAM and instruction cache. This
1040 also relocates the irq_panic() function to L1 memory, (which is
1043 config DEBUG_HUNT_FOR_ZERO
1044 bool "Catch NULL pointer reads/writes"
1047 Say Y here to catch reads/writes to anywhere in the memory range
1048 from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
1049 catching common programming errors such as NULL pointer dereferences.
1051 Misbehaving applications will be killed (generate a SEGV) while the
1052 kernel will trigger a panic.
1054 Enabling this option will take up an extra entry in CPLB table.
1055 Otherwise, there is no extra overhead.
1057 config DEBUG_BFIN_HWTRACE_ON
1058 bool "Turn on Blackfin's Hardware Trace"
1061 All Blackfins include a Trace Unit which stores a history of the last
1062 16 changes in program flow taken by the program sequencer. The history
1063 allows the user to recreate the program sequencer’s recent path. This
1064 can be handy when an application dies - we print out the execution
1065 path of how it got to the offending instruction.
1067 By turning this off, you may save a tiny amount of power.
1070 prompt "Omit loop Tracing"
1071 default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1072 depends on DEBUG_BFIN_HWTRACE_ON
1074 The trace buffer can be configured to omit recording of changes in
1075 program flow that match either the last entry or one of the last
1076 two entries. Omitting one of these entries from the record prevents
1077 the trace buffer from overflowing because of any sort of loop (for, do
1078 while, etc) in the program.
1080 Because zero-overhead Hardware loops are not recorded in the trace buffer,
1081 this feature can be used to prevent trace overflow from loops that
1082 are nested four deep.
1084 config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1085 bool "Trace all Loops"
1087 The trace buffer records all changes of flow
1089 config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1090 bool "Compress single-level loops"
1092 The trace buffer does not record single loops - helpful if trace
1093 is spinning on a while or do loop.
1095 config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1096 bool "Compress two-level loops"
1098 The trace buffer does not record loops two levels deep. Helpful if
1099 the trace is spinning in a nested loop
1103 config DEBUG_BFIN_HWTRACE_COMPRESSION
1105 depends on DEBUG_BFIN_HWTRACE_ON
1106 default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1107 default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1108 default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1111 config DEBUG_BFIN_HWTRACE_EXPAND
1112 bool "Expand Trace Buffer greater than 16 entries"
1113 depends on DEBUG_BFIN_HWTRACE_ON
1116 By selecting this option, every time the 16 hardware entries in
1117 the Blackfin's HW Trace buffer are full, the kernel will move them
1118 into a software buffer, for dumping when there is an issue. This
1119 has a great impact on performance, (an interrupt every 16 change of
1120 flows) and should normally be turned off, except in those nasty
1123 config DEBUG_BFIN_HWTRACE_EXPAND_LEN
1124 int "Size of Trace buffer (in power of 2k)"
1126 depends on DEBUG_BFIN_HWTRACE_EXPAND
1129 This sets the size of the software buffer that the trace information
1131 0 for (2^0) 1k, or 256 entries,
1132 1 for (2^1) 2k, or 512 entries,
1133 2 for (2^2) 4k, or 1024 entries,
1134 3 for (2^3) 8k, or 2048 entries,
1135 4 for (2^4) 16k, or 4096 entries
1137 config DEBUG_BFIN_NO_KERN_HWTRACE
1138 bool "Trace user apps (turn off hwtrace in kernel)"
1139 depends on DEBUG_BFIN_HWTRACE_ON
1142 Some pieces of the kernel contain a lot of flow changes which can
1143 quickly fill up the hardware trace buffer. When debugging crashes,
1144 the hardware trace may indicate that the problem lies in kernel
1145 space when in reality an application is buggy.
1147 Say Y here to disable hardware tracing in some known "jumpy" pieces
1148 of code so that the trace buffer will extend further back.
1154 This option enables special console drivers which allow the kernel
1155 to print messages very early in the bootup process.
1157 This is useful for kernel debugging when your machine crashes very
1158 early before the console code is initialized. After enabling this
1159 feature, you must add "earlyprintk=serial,uart0,57600" to the
1160 command line (bootargs). It is safe to say Y here in all cases, as
1161 all of this lives in the init section and is thrown away after the
1162 kernel boots completely.
1164 config DUAL_CORE_TEST_MODULE
1165 tristate "Dual Core Test Module"
1169 Say Y here to build-in dual core test module for dual core test.
1172 bool "Display the CPLB information"
1174 Display the CPLB information.
1177 bool "Check the user pointer address"
1180 Usually the pointer transfer from user space is checked to see if its
1181 address is in the kernel space.
1183 Say N here to disable that check to improve the performance.
1187 source "security/Kconfig"
1189 source "crypto/Kconfig"
1191 source "lib/Kconfig"