2 * (C) 2001 Dave Jones, Arjan van de ven.
3 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
5 * Licensed under the terms of the GNU GPL License version 2.
6 * Based upon reverse engineered information, and on Intel documentation
7 * for chipsets ICH2-M and ICH3-M.
9 * Many thanks to Ducrot Bruno for finding and fixing the last
10 * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
11 * for extensive testing.
13 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
17 /*********************************************************************
18 * SPEEDSTEP - DEFINITIONS *
19 *********************************************************************/
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/cpufreq.h>
25 #include <linux/pci.h>
26 #include <linux/slab.h>
27 #include <linux/sched.h>
29 #include "speedstep-lib.h"
33 * It is necessary to know which chipset is used. As accesses to
34 * this device occur at various places in this module, we need a
35 * static struct pci_dev * pointing to that device.
37 static struct pci_dev *speedstep_chipset_dev;
40 /* speedstep_processor
42 static unsigned int speedstep_processor;
47 * There are only two frequency states for each processor. Values
48 * are in kHz for the time being.
50 static struct cpufreq_frequency_table speedstep_freqs[] = {
53 {0, CPUFREQ_TABLE_END},
57 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
62 * speedstep_find_register - read the PMBASE address
64 * Returns: -ENODEV if no register could be found
66 static int speedstep_find_register(void)
68 if (!speedstep_chipset_dev)
72 pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
73 if (!(pmbase & 0x01)) {
74 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
80 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
84 dprintk("pmbase is 0x%x\n", pmbase);
89 * speedstep_set_state - set the SpeedStep state
90 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
92 * Tries to change the SpeedStep state.
94 static void speedstep_set_state(unsigned int state)
104 local_irq_save(flags);
107 value = inb(pmbase + 0x50);
109 dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
111 /* write new state */
115 dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
117 /* Disable bus master arbitration */
118 pm2_blk = inb(pmbase + 0x20);
120 outb(pm2_blk, (pmbase + 0x20));
122 /* Actual transition */
123 outb(value, (pmbase + 0x50));
125 /* Restore bus master arbitration */
127 outb(pm2_blk, (pmbase + 0x20));
129 /* check if transition was successful */
130 value = inb(pmbase + 0x50);
133 local_irq_restore(flags);
135 dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
137 if (state == (value & 0x1))
138 dprintk("change to %u MHz succeeded\n",
139 speedstep_get_frequency(speedstep_processor) / 1000);
141 printk(KERN_ERR "cpufreq: change failed - I/O error\n");
148 * speedstep_activate - activate SpeedStep control in the chipset
150 * Tries to activate the SpeedStep status and control registers.
151 * Returns -EINVAL on an unsupported chipset, and zero on success.
153 static int speedstep_activate(void)
157 if (!speedstep_chipset_dev)
160 pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
161 if (!(value & 0x08)) {
163 dprintk("activating SpeedStep (TM) registers\n");
164 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
172 * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
174 * Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
175 * the LPC bridge / PM module which contains all power-management
176 * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
177 * chipset, or zero on failure.
179 static unsigned int speedstep_detect_chipset(void)
181 speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
182 PCI_DEVICE_ID_INTEL_82801DB_12,
183 PCI_ANY_ID, PCI_ANY_ID,
185 if (speedstep_chipset_dev)
188 speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
189 PCI_DEVICE_ID_INTEL_82801CA_12,
190 PCI_ANY_ID, PCI_ANY_ID,
192 if (speedstep_chipset_dev)
196 speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
197 PCI_DEVICE_ID_INTEL_82801BA_10,
198 PCI_ANY_ID, PCI_ANY_ID,
200 if (speedstep_chipset_dev) {
201 /* speedstep.c causes lockups on Dell Inspirons 8000 and
202 * 8100 which use a pretty old revision of the 82815
203 * host brige. Abort on these systems.
205 static struct pci_dev *hostbridge;
207 hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
208 PCI_DEVICE_ID_INTEL_82815_MC,
209 PCI_ANY_ID, PCI_ANY_ID,
215 if (hostbridge->revision < 5) {
216 dprintk("hostbridge does not support speedstep\n");
217 speedstep_chipset_dev = NULL;
218 pci_dev_put(hostbridge);
222 pci_dev_put(hostbridge);
229 static unsigned int _speedstep_get(const struct cpumask *cpus)
232 cpumask_t cpus_allowed;
234 cpus_allowed = current->cpus_allowed;
235 set_cpus_allowed_ptr(current, cpus);
236 speed = speedstep_get_frequency(speedstep_processor);
237 set_cpus_allowed_ptr(current, &cpus_allowed);
238 dprintk("detected %u kHz as current frequency\n", speed);
242 static unsigned int speedstep_get(unsigned int cpu)
244 return _speedstep_get(cpumask_of(cpu));
248 * speedstep_target - set a new CPUFreq policy
249 * @policy: new policy
250 * @target_freq: the target frequency
251 * @relation: how that frequency relates to achieved frequency
252 * (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
254 * Sets a new CPUFreq policy.
256 static int speedstep_target(struct cpufreq_policy *policy,
257 unsigned int target_freq,
258 unsigned int relation)
260 unsigned int newstate = 0;
261 struct cpufreq_freqs freqs;
262 cpumask_t cpus_allowed;
265 if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
266 target_freq, relation, &newstate))
269 freqs.old = _speedstep_get(policy->cpus);
270 freqs.new = speedstep_freqs[newstate].frequency;
271 freqs.cpu = policy->cpu;
273 dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
275 /* no transition necessary */
276 if (freqs.old == freqs.new)
279 cpus_allowed = current->cpus_allowed;
281 for_each_cpu(i, policy->cpus) {
283 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
286 /* switch to physical CPU where state is to be changed */
287 set_cpus_allowed_ptr(current, policy->cpus);
289 speedstep_set_state(newstate);
291 /* allow to be run on all CPUs */
292 set_cpus_allowed_ptr(current, &cpus_allowed);
294 for_each_cpu(i, policy->cpus) {
296 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
304 * speedstep_verify - verifies a new CPUFreq policy
305 * @policy: new policy
307 * Limit must be within speedstep_low_freq and speedstep_high_freq, with
308 * at least one border included.
310 static int speedstep_verify(struct cpufreq_policy *policy)
312 return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
316 static int speedstep_cpu_init(struct cpufreq_policy *policy)
320 cpumask_t cpus_allowed;
322 /* only run on CPU to be set, or on its sibling */
324 cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
327 cpus_allowed = current->cpus_allowed;
328 set_cpus_allowed_ptr(current, policy->cpus);
330 /* detect low and high frequency and transition latency */
331 result = speedstep_get_freqs(speedstep_processor,
332 &speedstep_freqs[SPEEDSTEP_LOW].frequency,
333 &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
334 &policy->cpuinfo.transition_latency,
335 &speedstep_set_state);
336 set_cpus_allowed_ptr(current, &cpus_allowed);
340 /* get current speed setting */
341 speed = _speedstep_get(policy->cpus);
345 dprintk("currently at %s speed setting - %i MHz\n",
346 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
350 /* cpuinfo and default policy values */
353 result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
357 cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
363 static int speedstep_cpu_exit(struct cpufreq_policy *policy)
365 cpufreq_frequency_table_put_attr(policy->cpu);
369 static struct freq_attr *speedstep_attr[] = {
370 &cpufreq_freq_attr_scaling_available_freqs,
375 static struct cpufreq_driver speedstep_driver = {
376 .name = "speedstep-ich",
377 .verify = speedstep_verify,
378 .target = speedstep_target,
379 .init = speedstep_cpu_init,
380 .exit = speedstep_cpu_exit,
381 .get = speedstep_get,
382 .owner = THIS_MODULE,
383 .attr = speedstep_attr,
388 * speedstep_init - initializes the SpeedStep CPUFreq driver
390 * Initializes the SpeedStep support. Returns -ENODEV on unsupported
391 * devices, -EINVAL on problems during initiatization, and zero on
394 static int __init speedstep_init(void)
396 /* detect processor */
397 speedstep_processor = speedstep_detect_processor();
398 if (!speedstep_processor) {
399 dprintk("Intel(R) SpeedStep(TM) capable processor "
405 if (!speedstep_detect_chipset()) {
406 dprintk("Intel(R) SpeedStep(TM) for this chipset not "
407 "(yet) available.\n");
411 /* activate speedstep support */
412 if (speedstep_activate()) {
413 pci_dev_put(speedstep_chipset_dev);
417 if (speedstep_find_register())
420 return cpufreq_register_driver(&speedstep_driver);
425 * speedstep_exit - unregisters SpeedStep support
427 * Unregisters SpeedStep support.
429 static void __exit speedstep_exit(void)
431 pci_dev_put(speedstep_chipset_dev);
432 cpufreq_unregister_driver(&speedstep_driver);
436 MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
437 "Dominik Brodowski <linux@brodo.de>");
438 MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
439 "with ICH-M southbridges.");
440 MODULE_LICENSE("GPL");
442 module_init(speedstep_init);
443 module_exit(speedstep_exit);