git.oblomov.eu Git - linux-2.6/blob - drivers/infiniband/hw/ipath/ipath_driver.c

   1 /*
   2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/spinlock.h>
  35 #include <linux/idr.h>
  36 #include <linux/pci.h>
  37 #include <linux/delay.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/vmalloc.h>
  40
  41 #include "ipath_kernel.h"
  42 #include "ipath_layer.h"
  43 #include "ipath_common.h"
  44
  45 static void ipath_update_pio_bufs(struct ipath_devdata *);
  46
  47 const char *ipath_get_unit_name(int unit)
  48 {
  49         static char iname[16];
  50         snprintf(iname, sizeof iname, "infinipath%u", unit);
  51         return iname;
  52 }
  53
  54 EXPORT_SYMBOL_GPL(ipath_get_unit_name);
  55
  56 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
  57 #define PFX IPATH_DRV_NAME ": "
  58
  59 /*
  60  * The size has to be longer than this string, so we can append
  61  * board/chip information to it in the init code.
  62  */
  63 const char ipath_core_version[] = IPATH_IDSTR "\n";
  64
  65 static struct idr unit_table;
  66 DEFINE_SPINLOCK(ipath_devs_lock);
  67 LIST_HEAD(ipath_dev_list);
  68
  69 wait_queue_head_t ipath_sma_state_wait;
  70
  71 unsigned ipath_debug = __IPATH_INFO;
  72
  73 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
  74 MODULE_PARM_DESC(debug, "mask for debug prints");
  75 EXPORT_SYMBOL_GPL(ipath_debug);
  76
  77 MODULE_LICENSE("GPL");
  78 MODULE_AUTHOR("QLogic <support@pathscale.com>");
  79 MODULE_DESCRIPTION("QLogic InfiniPath driver");
  80
  81 const char *ipath_ibcstatus_str[] = {
  82         "Disabled",
  83         "LinkUp",
  84         "PollActive",
  85         "PollQuiet",
  86         "SleepDelay",
  87         "SleepQuiet",
  88         "LState6",              /* unused */
  89         "LState7",              /* unused */
  90         "CfgDebounce",
  91         "CfgRcvfCfg",
  92         "CfgWaitRmt",
  93         "CfgIdle",
  94         "RecovRetrain",
  95         "LState0xD",            /* unused */
  96         "RecovWaitRmt",
  97         "RecovIdle",
  98 };
  99
 100 /*
 101  * These variables are initialized in the chip-specific files
 102  * but are defined here.
 103  */
 104 u16 ipath_gpio_sda_num, ipath_gpio_scl_num;
 105 u64 ipath_gpio_sda, ipath_gpio_scl;
 106 u64 infinipath_i_bitsextant;
 107 ipath_err_t infinipath_e_bitsextant, infinipath_hwe_bitsextant;
 108 u32 infinipath_i_rcvavail_mask, infinipath_i_rcvurg_mask;
 109
 110 static void __devexit ipath_remove_one(struct pci_dev *);
 111 static int __devinit ipath_init_one(struct pci_dev *,
 112                                     const struct pci_device_id *);
 113
 114 /* Only needed for registration, nothing else needs this info */
 115 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
 116 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
 117 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
 118
 119 static const struct pci_device_id ipath_pci_tbl[] = {
 120         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
 121         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_PE800) },
 122         { 0, }
 123 };
 124
 125 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
 126
 127 static struct pci_driver ipath_driver = {
 128         .name = IPATH_DRV_NAME,
 129         .probe = ipath_init_one,
 130         .remove = __devexit_p(ipath_remove_one),
 131         .id_table = ipath_pci_tbl,
 132 };
 133
 134
 135 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
 136                              u32 *bar0, u32 *bar1)
 137 {
 138         int ret;
 139
 140         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 141         if (ret)
 142                 ipath_dev_err(dd, "failed to read bar0 before enable: "
 143                               "error %d\n", -ret);
 144
 145         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
 146         if (ret)
 147                 ipath_dev_err(dd, "failed to read bar1 before enable: "
 148                               "error %d\n", -ret);
 149
 150         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
 151 }
 152
 153 static void ipath_free_devdata(struct pci_dev *pdev,
 154                                struct ipath_devdata *dd)
 155 {
 156         unsigned long flags;
 157
 158         pci_set_drvdata(pdev, NULL);
 159
 160         if (dd->ipath_unit != -1) {
 161                 spin_lock_irqsave(&ipath_devs_lock, flags);
 162                 idr_remove(&unit_table, dd->ipath_unit);
 163                 list_del(&dd->ipath_list);
 164                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
 165         }
 166         vfree(dd);
 167 }
 168
 169 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
 170 {
 171         unsigned long flags;
 172         struct ipath_devdata *dd;
 173         int ret;
 174
 175         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
 176                 dd = ERR_PTR(-ENOMEM);
 177                 goto bail;
 178         }
 179
 180         dd = vmalloc(sizeof(*dd));
 181         if (!dd) {
 182                 dd = ERR_PTR(-ENOMEM);
 183                 goto bail;
 184         }
 185         memset(dd, 0, sizeof(*dd));
 186         dd->ipath_unit = -1;
 187
 188         spin_lock_irqsave(&ipath_devs_lock, flags);
 189
 190         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
 191         if (ret < 0) {
 192                 printk(KERN_ERR IPATH_DRV_NAME
 193                        ": Could not allocate unit ID: error %d\n", -ret);
 194                 ipath_free_devdata(pdev, dd);
 195                 dd = ERR_PTR(ret);
 196                 goto bail_unlock;
 197         }
 198
 199         dd->pcidev = pdev;
 200         pci_set_drvdata(pdev, dd);
 201
 202         list_add(&dd->ipath_list, &ipath_dev_list);
 203
 204 bail_unlock:
 205         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 206
 207 bail:
 208         return dd;
 209 }
 210
 211 static inline struct ipath_devdata *__ipath_lookup(int unit)
 212 {
 213         return idr_find(&unit_table, unit);
 214 }
 215
 216 struct ipath_devdata *ipath_lookup(int unit)
 217 {
 218         struct ipath_devdata *dd;
 219         unsigned long flags;
 220
 221         spin_lock_irqsave(&ipath_devs_lock, flags);
 222         dd = __ipath_lookup(unit);
 223         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 224
 225         return dd;
 226 }
 227
 228 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp)
 229 {
 230         int nunits, npresent, nup;
 231         struct ipath_devdata *dd;
 232         unsigned long flags;
 233         u32 maxports;
 234
 235         nunits = npresent = nup = maxports = 0;
 236
 237         spin_lock_irqsave(&ipath_devs_lock, flags);
 238
 239         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 240                 nunits++;
 241                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
 242                         npresent++;
 243                 if (dd->ipath_lid &&
 244                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
 245                                          | IPATH_LINKUNK)))
 246                         nup++;
 247                 if (dd->ipath_cfgports > maxports)
 248                         maxports = dd->ipath_cfgports;
 249         }
 250
 251         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 252
 253         if (npresentp)
 254                 *npresentp = npresent;
 255         if (nupp)
 256                 *nupp = nup;
 257         if (maxportsp)
 258                 *maxportsp = maxports;
 259
 260         return nunits;
 261 }
 262
 263 /*
 264  * These next two routines are placeholders in case we don't have per-arch
 265  * code for controlling write combining.  If explicit control of write
 266  * combining is not available, performance will probably be awful.
 267  */
 268
 269 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
 270 {
 271         return -EOPNOTSUPP;
 272 }
 273
 274 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
 275 {
 276 }
 277
 278 static int __devinit ipath_init_one(struct pci_dev *pdev,
 279                                     const struct pci_device_id *ent)
 280 {
 281         int ret, len, j;
 282         struct ipath_devdata *dd;
 283         unsigned long long addr;
 284         u32 bar0 = 0, bar1 = 0;
 285         u8 rev;
 286
 287         dd = ipath_alloc_devdata(pdev);
 288         if (IS_ERR(dd)) {
 289                 ret = PTR_ERR(dd);
 290                 printk(KERN_ERR IPATH_DRV_NAME
 291                        ": Could not allocate devdata: error %d\n", -ret);
 292                 goto bail;
 293         }
 294
 295         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
 296
 297         read_bars(dd, pdev, &bar0, &bar1);
 298
 299         ret = pci_enable_device(pdev);
 300         if (ret) {
 301                 /* This can happen iff:
 302                  *
 303                  * We did a chip reset, and then failed to reprogram the
 304                  * BAR, or the chip reset due to an internal error.  We then
 305                  * unloaded the driver and reloaded it.
 306                  *
 307                  * Both reset cases set the BAR back to initial state.  For
 308                  * the latter case, the AER sticky error bit at offset 0x718
 309                  * should be set, but the Linux kernel doesn't yet know
 310                  * about that, it appears.  If the original BAR was retained
 311                  * in the kernel data structures, this may be OK.
 312                  */
 313                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
 314                               dd->ipath_unit, -ret);
 315                 goto bail_devdata;
 316         }
 317         addr = pci_resource_start(pdev, 0);
 318         len = pci_resource_len(pdev, 0);
 319         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d irq %x, vend %x/%x "
 320                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
 321                    ent->device, ent->driver_data);
 322
 323         read_bars(dd, pdev, &bar0, &bar1);
 324
 325         if (!bar1 && !(bar0 & ~0xf)) {
 326                 if (addr) {
 327                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
 328                                  "rewriting as %llx\n", addr);
 329                         ret = pci_write_config_dword(
 330                                 pdev, PCI_BASE_ADDRESS_0, addr);
 331                         if (ret) {
 332                                 ipath_dev_err(dd, "rewrite of BAR0 "
 333                                               "failed: err %d\n", -ret);
 334                                 goto bail_disable;
 335                         }
 336                         ret = pci_write_config_dword(
 337                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
 338                         if (ret) {
 339                                 ipath_dev_err(dd, "rewrite of BAR1 "
 340                                               "failed: err %d\n", -ret);
 341                                 goto bail_disable;
 342                         }
 343                 } else {
 344                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
 345                                       "not usable until reboot\n");
 346                         ret = -ENODEV;
 347                         goto bail_disable;
 348                 }
 349         }
 350
 351         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
 352         if (ret) {
 353                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
 354                          "err %d\n", dd->ipath_unit, -ret);
 355                 goto bail_disable;
 356         }
 357
 358         ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 359         if (ret) {
 360                 /*
 361                  * if the 64 bit setup fails, try 32 bit.  Some systems
 362                  * do not setup 64 bit maps on systems with 2GB or less
 363                  * memory installed.
 364                  */
 365                 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 366                 if (ret) {
 367                         dev_info(&pdev->dev,
 368                                 "Unable to set DMA mask for unit %u: %d\n",
 369                                 dd->ipath_unit, ret);
 370                         goto bail_regions;
 371                 }
 372                 else {
 373                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
 374                         ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 375                         if (ret)
 376                                 dev_info(&pdev->dev,
 377                                         "Unable to set DMA consistent mask "
 378                                         "for unit %u: %d\n",
 379                                         dd->ipath_unit, ret);
 380
 381                 }
 382         }
 383         else {
 384                 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 385                 if (ret)
 386                         dev_info(&pdev->dev,
 387                                 "Unable to set DMA consistent mask "
 388                                 "for unit %u: %d\n",
 389                                 dd->ipath_unit, ret);
 390         }
 391
 392         pci_set_master(pdev);
 393
 394         /*
 395          * Save BARs to rewrite after device reset.  Save all 64 bits of
 396          * BAR, just in case.
 397          */
 398         dd->ipath_pcibar0 = addr;
 399         dd->ipath_pcibar1 = addr >> 32;
 400         dd->ipath_deviceid = ent->device;       /* save for later use */
 401         dd->ipath_vendorid = ent->vendor;
 402
 403         /* setup the chip-specific functions, as early as possible. */
 404         switch (ent->device) {
 405         case PCI_DEVICE_ID_INFINIPATH_HT:
 406                 ipath_init_ht400_funcs(dd);
 407                 break;
 408         case PCI_DEVICE_ID_INFINIPATH_PE800:
 409                 ipath_init_pe800_funcs(dd);
 410                 break;
 411         default:
 412                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
 413                               "failing\n", ent->device);
 414                 return -ENODEV;
 415         }
 416
 417         for (j = 0; j < 6; j++) {
 418                 if (!pdev->resource[j].start)
 419                         continue;
 420                 ipath_cdbg(VERBOSE, "BAR %d start %llx, end %llx, len %llx\n",
 421                            j, (unsigned long long)pdev->resource[j].start,
 422                            (unsigned long long)pdev->resource[j].end,
 423                            (unsigned long long)pci_resource_len(pdev, j));
 424         }
 425
 426         if (!addr) {
 427                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
 428                 ret = -ENODEV;
 429                 goto bail_regions;
 430         }
 431
 432         dd->ipath_deviceid = ent->device;       /* save for later use */
 433         dd->ipath_vendorid = ent->vendor;
 434
 435         ret = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
 436         if (ret) {
 437                 ipath_dev_err(dd, "Failed to read PCI revision ID unit "
 438                               "%u: err %d\n", dd->ipath_unit, -ret);
 439                 goto bail_regions;      /* shouldn't ever happen */
 440         }
 441         dd->ipath_pcirev = rev;
 442
 443         dd->ipath_kregbase = ioremap_nocache(addr, len);
 444
 445         if (!dd->ipath_kregbase) {
 446                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
 447                           addr);
 448                 ret = -ENOMEM;
 449                 goto bail_iounmap;
 450         }
 451         dd->ipath_kregend = (u64 __iomem *)
 452                 ((void __iomem *)dd->ipath_kregbase + len);
 453         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
 454         /* for user mmap */
 455         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
 456                    addr, dd->ipath_kregbase);
 457
 458         /*
 459          * clear ipath_flags here instead of in ipath_init_chip as it is set
 460          * by ipath_setup_htconfig.
 461          */
 462         dd->ipath_flags = 0;
 463         dd->ipath_lli_counter = 0;
 464         dd->ipath_lli_errors = 0;
 465
 466         if (dd->ipath_f_bus(dd, pdev))
 467                 ipath_dev_err(dd, "Failed to setup config space; "
 468                               "continuing anyway\n");
 469
 470         /*
 471          * set up our interrupt handler; IRQF_SHARED probably not needed,
 472          * since MSI interrupts shouldn't be shared but won't  hurt for now.
 473          * check 0 irq after we return from chip-specific bus setup, since
 474          * that can affect this due to setup
 475          */
 476         if (!pdev->irq)
 477                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
 478                               "work\n");
 479         else {
 480                 ret = request_irq(pdev->irq, ipath_intr, IRQF_SHARED,
 481                                   IPATH_DRV_NAME, dd);
 482                 if (ret) {
 483                         ipath_dev_err(dd, "Couldn't setup irq handler, "
 484                                       "irq=%u: %d\n", pdev->irq, ret);
 485                         goto bail_iounmap;
 486                 }
 487         }
 488
 489         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
 490         if (ret)
 491                 goto bail_iounmap;
 492
 493         ret = ipath_enable_wc(dd);
 494
 495         if (ret) {
 496                 ipath_dev_err(dd, "Write combining not enabled "
 497                               "(err %d): performance may be poor\n",
 498                               -ret);
 499                 ret = 0;
 500         }
 501
 502         ipath_device_create_group(&pdev->dev, dd);
 503         ipathfs_add_device(dd);
 504         ipath_user_add(dd);
 505         ipath_diag_add(dd);
 506         ipath_layer_add(dd);
 507
 508         goto bail;
 509
 510 bail_iounmap:
 511         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 512
 513 bail_regions:
 514         pci_release_regions(pdev);
 515
 516 bail_disable:
 517         pci_disable_device(pdev);
 518
 519 bail_devdata:
 520         ipath_free_devdata(pdev, dd);
 521
 522 bail:
 523         return ret;
 524 }
 525
 526 static void __devexit ipath_remove_one(struct pci_dev *pdev)
 527 {
 528         struct ipath_devdata *dd;
 529
 530         ipath_cdbg(VERBOSE, "removing, pdev=%p\n", pdev);
 531         if (!pdev)
 532                 return;
 533
 534         dd = pci_get_drvdata(pdev);
 535         ipath_layer_remove(dd);
 536         ipath_diag_remove(dd);
 537         ipath_user_remove(dd);
 538         ipathfs_remove_device(dd);
 539         ipath_device_remove_group(&pdev->dev, dd);
 540         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
 541                    "unit %u\n", dd, (u32) dd->ipath_unit);
 542         if (dd->ipath_kregbase) {
 543                 ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n",
 544                            dd->ipath_kregbase);
 545                 iounmap((volatile void __iomem *) dd->ipath_kregbase);
 546                 dd->ipath_kregbase = NULL;
 547         }
 548         pci_release_regions(pdev);
 549         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
 550         pci_disable_device(pdev);
 551
 552         ipath_free_devdata(pdev, dd);
 553 }
 554
 555 /* general driver use */
 556 DEFINE_MUTEX(ipath_mutex);
 557
 558 static DEFINE_SPINLOCK(ipath_pioavail_lock);
 559
 560 /**
 561  * ipath_disarm_piobufs - cancel a range of PIO buffers
 562  * @dd: the infinipath device
 563  * @first: the first PIO buffer to cancel
 564  * @cnt: the number of PIO buffers to cancel
 565  *
 566  * cancel a range of PIO buffers, used when they might be armed, but
 567  * not triggered.  Used at init to ensure buffer state, and also user
 568  * process close, in case it died while writing to a PIO buffer
 569  * Also after errors.
 570  */
 571 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
 572                           unsigned cnt)
 573 {
 574         unsigned i, last = first + cnt;
 575         u64 sendctrl, sendorig;
 576
 577         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
 578         sendorig = dd->ipath_sendctrl | INFINIPATH_S_DISARM;
 579         for (i = first; i < last; i++) {
 580                 sendctrl = sendorig |
 581                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT);
 582                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 583                                  sendctrl);
 584         }
 585
 586         /*
 587          * Write it again with current value, in case ipath_sendctrl changed
 588          * while we were looping; no critical bits that would require
 589          * locking.
 590          *
 591          * Write a 0, and then the original value, reading scratch in
 592          * between.  This seems to avoid a chip timing race that causes
 593          * pioavail updates to memory to stop.
 594          */
 595         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 596                          0);
 597         sendorig = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 598         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 599                          dd->ipath_sendctrl);
 600 }
 601
 602 /**
 603  * ipath_wait_linkstate - wait for an IB link state change to occur
 604  * @dd: the infinipath device
 605  * @state: the state to wait for
 606  * @msecs: the number of milliseconds to wait
 607  *
 608  * wait up to msecs milliseconds for IB link state change to occur for
 609  * now, take the easy polling route.  Currently used only by
 610  * ipath_layer_set_linkstate.  Returns 0 if state reached, otherwise
 611  * -ETIMEDOUT state can have multiple states set, for any of several
 612  * transitions.
 613  */
 614 int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state, int msecs)
 615 {
 616         dd->ipath_sma_state_wanted = state;
 617         wait_event_interruptible_timeout(ipath_sma_state_wait,
 618                                          (dd->ipath_flags & state),
 619                                          msecs_to_jiffies(msecs));
 620         dd->ipath_sma_state_wanted = 0;
 621
 622         if (!(dd->ipath_flags & state)) {
 623                 u64 val;
 624                 ipath_cdbg(SMA, "Didn't reach linkstate %s within %u ms\n",
 625                            /* test INIT ahead of DOWN, both can be set */
 626                            (state & IPATH_LINKINIT) ? "INIT" :
 627                            ((state & IPATH_LINKDOWN) ? "DOWN" :
 628                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
 629                            msecs);
 630                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 631                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
 632                            (unsigned long long) ipath_read_kreg64(
 633                                    dd, dd->ipath_kregs->kr_ibcctrl),
 634                            (unsigned long long) val,
 635                            ipath_ibcstatus_str[val & 0xf]);
 636         }
 637         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
 638 }
 639
 640 void ipath_decode_err(char *buf, size_t blen, ipath_err_t err)
 641 {
 642         *buf = '\0';
 643         if (err & INFINIPATH_E_RHDRLEN)
 644                 strlcat(buf, "rhdrlen ", blen);
 645         if (err & INFINIPATH_E_RBADTID)
 646                 strlcat(buf, "rbadtid ", blen);
 647         if (err & INFINIPATH_E_RBADVERSION)
 648                 strlcat(buf, "rbadversion ", blen);
 649         if (err & INFINIPATH_E_RHDR)
 650                 strlcat(buf, "rhdr ", blen);
 651         if (err & INFINIPATH_E_RLONGPKTLEN)
 652                 strlcat(buf, "rlongpktlen ", blen);
 653         if (err & INFINIPATH_E_RSHORTPKTLEN)
 654                 strlcat(buf, "rshortpktlen ", blen);
 655         if (err & INFINIPATH_E_RMAXPKTLEN)
 656                 strlcat(buf, "rmaxpktlen ", blen);
 657         if (err & INFINIPATH_E_RMINPKTLEN)
 658                 strlcat(buf, "rminpktlen ", blen);
 659         if (err & INFINIPATH_E_RFORMATERR)
 660                 strlcat(buf, "rformaterr ", blen);
 661         if (err & INFINIPATH_E_RUNSUPVL)
 662                 strlcat(buf, "runsupvl ", blen);
 663         if (err & INFINIPATH_E_RUNEXPCHAR)
 664                 strlcat(buf, "runexpchar ", blen);
 665         if (err & INFINIPATH_E_RIBFLOW)
 666                 strlcat(buf, "ribflow ", blen);
 667         if (err & INFINIPATH_E_REBP)
 668                 strlcat(buf, "EBP ", blen);
 669         if (err & INFINIPATH_E_SUNDERRUN)
 670                 strlcat(buf, "sunderrun ", blen);
 671         if (err & INFINIPATH_E_SPIOARMLAUNCH)
 672                 strlcat(buf, "spioarmlaunch ", blen);
 673         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
 674                 strlcat(buf, "sunexperrpktnum ", blen);
 675         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
 676                 strlcat(buf, "sdroppeddatapkt ", blen);
 677         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
 678                 strlcat(buf, "sdroppedsmppkt ", blen);
 679         if (err & INFINIPATH_E_SMAXPKTLEN)
 680                 strlcat(buf, "smaxpktlen ", blen);
 681         if (err & INFINIPATH_E_SMINPKTLEN)
 682                 strlcat(buf, "sminpktlen ", blen);
 683         if (err & INFINIPATH_E_SUNSUPVL)
 684                 strlcat(buf, "sunsupVL ", blen);
 685         if (err & INFINIPATH_E_SPKTLEN)
 686                 strlcat(buf, "spktlen ", blen);
 687         if (err & INFINIPATH_E_INVALIDADDR)
 688                 strlcat(buf, "invalidaddr ", blen);
 689         if (err & INFINIPATH_E_RICRC)
 690                 strlcat(buf, "CRC ", blen);
 691         if (err & INFINIPATH_E_RVCRC)
 692                 strlcat(buf, "VCRC ", blen);
 693         if (err & INFINIPATH_E_RRCVEGRFULL)
 694                 strlcat(buf, "rcvegrfull ", blen);
 695         if (err & INFINIPATH_E_RRCVHDRFULL)
 696                 strlcat(buf, "rcvhdrfull ", blen);
 697         if (err & INFINIPATH_E_IBSTATUSCHANGED)
 698                 strlcat(buf, "ibcstatuschg ", blen);
 699         if (err & INFINIPATH_E_RIBLOSTLINK)
 700                 strlcat(buf, "riblostlink ", blen);
 701         if (err & INFINIPATH_E_HARDWARE)
 702                 strlcat(buf, "hardware ", blen);
 703         if (err & INFINIPATH_E_RESET)
 704                 strlcat(buf, "reset ", blen);
 705 }
 706
 707 /**
 708  * get_rhf_errstring - decode RHF errors
 709  * @err: the err number
 710  * @msg: the output buffer
 711  * @len: the length of the output buffer
 712  *
 713  * only used one place now, may want more later
 714  */
 715 static void get_rhf_errstring(u32 err, char *msg, size_t len)
 716 {
 717         /* if no errors, and so don't need to check what's first */
 718         *msg = '\0';
 719
 720         if (err & INFINIPATH_RHF_H_ICRCERR)
 721                 strlcat(msg, "icrcerr ", len);
 722         if (err & INFINIPATH_RHF_H_VCRCERR)
 723                 strlcat(msg, "vcrcerr ", len);
 724         if (err & INFINIPATH_RHF_H_PARITYERR)
 725                 strlcat(msg, "parityerr ", len);
 726         if (err & INFINIPATH_RHF_H_LENERR)
 727                 strlcat(msg, "lenerr ", len);
 728         if (err & INFINIPATH_RHF_H_MTUERR)
 729                 strlcat(msg, "mtuerr ", len);
 730         if (err & INFINIPATH_RHF_H_IHDRERR)
 731                 /* infinipath hdr checksum error */
 732                 strlcat(msg, "ipathhdrerr ", len);
 733         if (err & INFINIPATH_RHF_H_TIDERR)
 734                 strlcat(msg, "tiderr ", len);
 735         if (err & INFINIPATH_RHF_H_MKERR)
 736                 /* bad port, offset, etc. */
 737                 strlcat(msg, "invalid ipathhdr ", len);
 738         if (err & INFINIPATH_RHF_H_IBERR)
 739                 strlcat(msg, "iberr ", len);
 740         if (err & INFINIPATH_RHF_L_SWA)
 741                 strlcat(msg, "swA ", len);
 742         if (err & INFINIPATH_RHF_L_SWB)
 743                 strlcat(msg, "swB ", len);
 744 }
 745
 746 /**
 747  * ipath_get_egrbuf - get an eager buffer
 748  * @dd: the infinipath device
 749  * @bufnum: the eager buffer to get
 750  * @err: unused
 751  *
 752  * must only be called if ipath_pd[port] is known to be allocated
 753  */
 754 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum,
 755                                      int err)
 756 {
 757         return dd->ipath_port0_skbs ?
 758                 (void *)dd->ipath_port0_skbs[bufnum]->data : NULL;
 759 }
 760
 761 /**
 762  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
 763  * @dd: the infinipath device
 764  * @gfp_mask: the sk_buff SFP mask
 765  */
 766 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
 767                                 gfp_t gfp_mask)
 768 {
 769         struct sk_buff *skb;
 770         u32 len;
 771
 772         /*
 773          * Only fully supported way to handle this is to allocate lots
 774          * extra, align as needed, and then do skb_reserve().  That wastes
 775          * a lot of memory...  I'll have to hack this into infinipath_copy
 776          * also.
 777          */
 778
 779         /*
 780          * We need 4 extra bytes for unaligned transfer copying
 781          */
 782         if (dd->ipath_flags & IPATH_4BYTE_TID) {
 783                 /* we need a 4KB multiple alignment, and there is no way
 784                  * to do it except to allocate extra and then skb_reserve
 785                  * enough to bring it up to the right alignment.
 786                  */
 787                 len = dd->ipath_ibmaxlen + 4 + (1 << 11) - 1;
 788         }
 789         else
 790                 len = dd->ipath_ibmaxlen + 4;
 791         skb = __dev_alloc_skb(len, gfp_mask);
 792         if (!skb) {
 793                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
 794                               len);
 795                 goto bail;
 796         }
 797         if (dd->ipath_flags & IPATH_4BYTE_TID) {
 798                 u32 una = ((1 << 11) - 1) & (unsigned long)(skb->data + 4);
 799                 if (una)
 800                         skb_reserve(skb, 4 + (1 << 11) - una);
 801                 else
 802                         skb_reserve(skb, 4);
 803         } else
 804                 skb_reserve(skb, 4);
 805
 806 bail:
 807         return skb;
 808 }
 809
 810 /**
 811  * ipath_rcv_layer - receive a packet for the layered (ethernet) driver
 812  * @dd: the infinipath device
 813  * @etail: the sk_buff number
 814  * @tlen: the total packet length
 815  * @hdr: the ethernet header
 816  *
 817  * Separate routine for better overall optimization
 818  */
 819 static void ipath_rcv_layer(struct ipath_devdata *dd, u32 etail,
 820                             u32 tlen, struct ether_header *hdr)
 821 {
 822         u32 elen;
 823         u8 pad, *bthbytes;
 824         struct sk_buff *skb, *nskb;
 825
 826         if (dd->ipath_port0_skbs &&
 827                         hdr->sub_opcode == IPATH_ITH4X_OPCODE_ENCAP) {
 828                 /*
 829                  * Allocate a new sk_buff to replace the one we give
 830                  * to the network stack.
 831                  */
 832                 nskb = ipath_alloc_skb(dd, GFP_ATOMIC);
 833                 if (!nskb) {
 834                         /* count OK packets that we drop */
 835                         ipath_stats.sps_krdrops++;
 836                         return;
 837                 }
 838
 839                 bthbytes = (u8 *) hdr->bth;
 840                 pad = (bthbytes[1] >> 4) & 3;
 841                 /* +CRC32 */
 842                 elen = tlen - (sizeof(*hdr) + pad + sizeof(u32));
 843
 844                 skb = dd->ipath_port0_skbs[etail];
 845                 dd->ipath_port0_skbs[etail] = nskb;
 846                 skb_put(skb, elen);
 847
 848                 dd->ipath_f_put_tid(dd, etail + (u64 __iomem *)
 849                                     ((char __iomem *) dd->ipath_kregbase
 850                                      + dd->ipath_rcvegrbase), 0,
 851                                     virt_to_phys(nskb->data));
 852
 853                 __ipath_layer_rcv(dd, hdr, skb);
 854
 855                 /* another ether packet received */
 856                 ipath_stats.sps_ether_rpkts++;
 857         }
 858         else if (hdr->sub_opcode == IPATH_ITH4X_OPCODE_LID_ARP)
 859                 __ipath_layer_rcv_lid(dd, hdr);
 860 }
 861
 862 /*
 863  * ipath_kreceive - receive a packet
 864  * @dd: the infinipath device
 865  *
 866  * called from interrupt handler for errors or receive interrupt
 867  */
 868 void ipath_kreceive(struct ipath_devdata *dd)
 869 {
 870         u64 *rc;
 871         void *ebuf;
 872         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
 873         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
 874         u32 etail = -1, l, hdrqtail;
 875         struct ipath_message_header *hdr;
 876         u32 eflags, i, etype, tlen, pkttot = 0, updegr=0, reloop=0;
 877         static u64 totcalls;    /* stats, may eventually remove */
 878         char emsg[128];
 879
 880         if (!dd->ipath_hdrqtailptr) {
 881                 ipath_dev_err(dd,
 882                               "hdrqtailptr not set, can't do receives\n");
 883                 goto bail;
 884         }
 885
 886         /* There is already a thread processing this queue. */
 887         if (test_and_set_bit(0, &dd->ipath_rcv_pending))
 888                 goto bail;
 889
 890         l = dd->ipath_port0head;
 891         hdrqtail = (u32) le64_to_cpu(*dd->ipath_hdrqtailptr);
 892         if (l == hdrqtail)
 893                 goto done;
 894
 895 reloop:
 896         for (i = 0; l != hdrqtail; i++) {
 897                 u32 qp;
 898                 u8 *bthbytes;
 899
 900                 rc = (u64 *) (dd->ipath_pd[0]->port_rcvhdrq + (l << 2));
 901                 hdr = (struct ipath_message_header *)&rc[1];
 902                 /*
 903                  * could make a network order version of IPATH_KD_QP, and
 904                  * do the obvious shift before masking to speed this up.
 905                  */
 906                 qp = ntohl(hdr->bth[1]) & 0xffffff;
 907                 bthbytes = (u8 *) hdr->bth;
 908
 909                 eflags = ipath_hdrget_err_flags((__le32 *) rc);
 910                 etype = ipath_hdrget_rcv_type((__le32 *) rc);
 911                 /* total length */
 912                 tlen = ipath_hdrget_length_in_bytes((__le32 *) rc);
 913                 ebuf = NULL;
 914                 if (etype != RCVHQ_RCV_TYPE_EXPECTED) {
 915                         /*
 916                          * it turns out that the chips uses an eager buffer
 917                          * for all non-expected packets, whether it "needs"
 918                          * one or not.  So always get the index, but don't
 919                          * set ebuf (so we try to copy data) unless the
 920                          * length requires it.
 921                          */
 922                         etail = ipath_hdrget_index((__le32 *) rc);
 923                         if (tlen > sizeof(*hdr) ||
 924                             etype == RCVHQ_RCV_TYPE_NON_KD)
 925                                 ebuf = ipath_get_egrbuf(dd, etail, 0);
 926                 }
 927
 928                 /*
 929                  * both tiderr and ipathhdrerr are set for all plain IB
 930                  * packets; only ipathhdrerr should be set.
 931                  */
 932
 933                 if (etype != RCVHQ_RCV_TYPE_NON_KD && etype !=
 934                     RCVHQ_RCV_TYPE_ERROR && ipath_hdrget_ipath_ver(
 935                             hdr->iph.ver_port_tid_offset) !=
 936                     IPS_PROTO_VERSION) {
 937                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
 938                                    "%x\n", etype);
 939                 }
 940
 941                 if (eflags & ~(INFINIPATH_RHF_H_TIDERR |
 942                                INFINIPATH_RHF_H_IHDRERR)) {
 943                         get_rhf_errstring(eflags, emsg, sizeof emsg);
 944                         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
 945                                    "tlen=%x opcode=%x egridx=%x: %s\n",
 946                                    eflags, l, etype, tlen, bthbytes[0],
 947                                    ipath_hdrget_index((__le32 *) rc), emsg);
 948                         /* Count local link integrity errors. */
 949                         if (eflags & (INFINIPATH_RHF_H_ICRCERR |
 950                                       INFINIPATH_RHF_H_VCRCERR)) {
 951                                 u8 n = (dd->ipath_ibcctrl >>
 952                                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
 953                                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
 954
 955                                 if (++dd->ipath_lli_counter > n) {
 956                                         dd->ipath_lli_counter = 0;
 957                                         dd->ipath_lli_errors++;
 958                                 }
 959                         }
 960                 } else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
 961                                 int ret = __ipath_verbs_rcv(dd, rc + 1,
 962                                                             ebuf, tlen);
 963                                 if (ret == -ENODEV)
 964                                         ipath_cdbg(VERBOSE,
 965                                                    "received IB packet, "
 966                                                    "not SMA (QP=%x)\n", qp);
 967                                 if (dd->ipath_lli_counter)
 968                                         dd->ipath_lli_counter--;
 969
 970                 } else if (etype == RCVHQ_RCV_TYPE_EAGER) {
 971                         if (qp == IPATH_KD_QP &&
 972                             bthbytes[0] == ipath_layer_rcv_opcode &&
 973                             ebuf)
 974                                 ipath_rcv_layer(dd, etail, tlen,
 975                                                 (struct ether_header *)hdr);
 976                         else
 977                                 ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
 978                                            "qp=%x), len %x; ignored\n",
 979                                            etype, bthbytes[0], qp, tlen);
 980                 }
 981                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
 982                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
 983                                   be32_to_cpu(hdr->bth[0]) & 0xff);
 984                 else if (eflags & (INFINIPATH_RHF_H_TIDERR |
 985                                    INFINIPATH_RHF_H_IHDRERR)) {
 986                         /*
 987                          * This is a type 3 packet, only the LRH is in the
 988                          * rcvhdrq, the rest of the header is in the eager
 989                          * buffer.
 990                          */
 991                         u8 opcode;
 992                         if (ebuf) {
 993                                 bthbytes = (u8 *) ebuf;
 994                                 opcode = *bthbytes;
 995                         }
 996                         else
 997                                 opcode = 0;
 998                         get_rhf_errstring(eflags, emsg, sizeof emsg);
 999                         ipath_dbg("Err %x (%s), opcode %x, egrbuf %x, "
1000                                   "len %x\n", eflags, emsg, opcode, etail,
1001                                   tlen);
1002                 } else {
1003                         /*
1004                          * error packet, type of error  unknown.
1005                          * Probably type 3, but we don't know, so don't
1006                          * even try to print the opcode, etc.
1007                          */
1008                         ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
1009                                   "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
1010                                   "hdr %llx %llx %llx %llx %llx\n",
1011                                   etail, tlen, (unsigned long) rc, l,
1012                                   (unsigned long long) rc[0],
1013                                   (unsigned long long) rc[1],
1014                                   (unsigned long long) rc[2],
1015                                   (unsigned long long) rc[3],
1016                                   (unsigned long long) rc[4],
1017                                   (unsigned long long) rc[5]);
1018                 }
1019                 l += rsize;
1020                 if (l >= maxcnt)
1021                         l = 0;
1022                 if (etype != RCVHQ_RCV_TYPE_EXPECTED)
1023                     updegr = 1;
1024                 /*
1025                  * update head regs on last packet, and every 16 packets.
1026                  * Reduce bus traffic, while still trying to prevent
1027                  * rcvhdrq overflows, for when the queue is nearly full
1028                  */
1029                 if (l == hdrqtail || (i && !(i&0xf))) {
1030                         u64 lval;
1031                         if (l == hdrqtail) /* PE-800 interrupt only on last */
1032                                 lval = dd->ipath_rhdrhead_intr_off | l;
1033                         else
1034                                 lval = l;
1035                         (void)ipath_write_ureg(dd, ur_rcvhdrhead, lval, 0);
1036                         if (updegr) {
1037                                 (void)ipath_write_ureg(dd, ur_rcvegrindexhead,
1038                                                        etail, 0);
1039                                 updegr = 0;
1040                         }
1041                 }
1042         }
1043
1044         if (!dd->ipath_rhdrhead_intr_off && !reloop) {
1045                 /* HT-400 workaround; we can have a race clearing chip
1046                  * interrupt with another interrupt about to be delivered,
1047                  * and can clear it before it is delivered on the GPIO
1048                  * workaround.  By doing the extra check here for the
1049                  * in-memory tail register updating while we were doing
1050                  * earlier packets, we "almost" guarantee we have covered
1051                  * that case.
1052                  */
1053                 u32 hqtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr);
1054                 if (hqtail != hdrqtail) {
1055                         hdrqtail = hqtail;
1056                         reloop = 1; /* loop 1 extra time at most */
1057                         goto reloop;
1058                 }
1059         }
1060
1061         pkttot += i;
1062
1063         dd->ipath_port0head = l;
1064
1065         if (pkttot > ipath_stats.sps_maxpkts_call)
1066                 ipath_stats.sps_maxpkts_call = pkttot;
1067         ipath_stats.sps_port0pkts += pkttot;
1068         ipath_stats.sps_avgpkts_call =
1069                 ipath_stats.sps_port0pkts / ++totcalls;
1070
1071 done:
1072         clear_bit(0, &dd->ipath_rcv_pending);
1073         smp_mb__after_clear_bit();
1074
1075 bail:;
1076 }
1077
1078 /**
1079  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1080  * @dd: the infinipath device
1081  *
1082  * called whenever our local copy indicates we have run out of send buffers
1083  * NOTE: This can be called from interrupt context by some code
1084  * and from non-interrupt context by ipath_getpiobuf().
1085  */
1086
1087 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1088 {
1089         unsigned long flags;
1090         int i;
1091         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1092
1093         /* If the generation (check) bits have changed, then we update the
1094          * busy bit for the corresponding PIO buffer.  This algorithm will
1095          * modify positions to the value they already have in some cases
1096          * (i.e., no change), but it's faster than changing only the bits
1097          * that have changed.
1098          *
1099          * We would like to do this atomicly, to avoid spinlocks in the
1100          * critical send path, but that's not really possible, given the
1101          * type of changes, and that this routine could be called on
1102          * multiple cpu's simultaneously, so we lock in this routine only,
1103          * to avoid conflicting updates; all we change is the shadow, and
1104          * it's a single 64 bit memory location, so by definition the update
1105          * is atomic in terms of what other cpu's can see in testing the
1106          * bits.  The spin_lock overhead isn't too bad, since it only
1107          * happens when all buffers are in use, so only cpu overhead, not
1108          * latency or bandwidth is affected.
1109          */
1110 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1111         if (!dd->ipath_pioavailregs_dma) {
1112                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1113                 return;
1114         }
1115         if (ipath_debug & __IPATH_VERBDBG) {
1116                 /* only if packet debug and verbose */
1117                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1118                 unsigned long *shadow = dd->ipath_pioavailshadow;
1119
1120                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1121                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1122                            "s3=%lx\n",
1123                            (unsigned long long) le64_to_cpu(dma[0]),
1124                            shadow[0],
1125                            (unsigned long long) le64_to_cpu(dma[1]),
1126                            shadow[1],
1127                            (unsigned long long) le64_to_cpu(dma[2]),
1128                            shadow[2],
1129                            (unsigned long long) le64_to_cpu(dma[3]),
1130                            shadow[3]);
1131                 if (piobregs > 4)
1132                         ipath_cdbg(
1133                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1134                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1135                                 "d7=%llx s7=%lx\n",
1136                                 (unsigned long long) le64_to_cpu(dma[4]),
1137                                 shadow[4],
1138                                 (unsigned long long) le64_to_cpu(dma[5]),
1139                                 shadow[5],
1140                                 (unsigned long long) le64_to_cpu(dma[6]),
1141                                 shadow[6],
1142                                 (unsigned long long) le64_to_cpu(dma[7]),
1143                                 shadow[7]);
1144         }
1145         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1146         for (i = 0; i < piobregs; i++) {
1147                 u64 pchbusy, pchg, piov, pnew;
1148                 /*
1149                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1150                  */
1151                 if (i > 3) {
1152                         if (i & 1)
1153                                 piov = le64_to_cpu(
1154                                         dd->ipath_pioavailregs_dma[i - 1]);
1155                         else
1156                                 piov = le64_to_cpu(
1157                                         dd->ipath_pioavailregs_dma[i + 1]);
1158                 } else
1159                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1160                 pchg = _IPATH_ALL_CHECKBITS &
1161                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1162                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1163                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1164                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1165                         pnew |= piov & pchbusy;
1166                         dd->ipath_pioavailshadow[i] = pnew;
1167                 }
1168         }
1169         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1170 }
1171
1172 /**
1173  * ipath_setrcvhdrsize - set the receive header size
1174  * @dd: the infinipath device
1175  * @rhdrsize: the receive header size
1176  *
1177  * called from user init code, and also layered driver init
1178  */
1179 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1180 {
1181         int ret = 0;
1182
1183         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1184                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1185                         dev_info(&dd->pcidev->dev,
1186                                  "Error: can't set protocol header "
1187                                  "size %u, already %u\n",
1188                                  rhdrsize, dd->ipath_rcvhdrsize);
1189                         ret = -EAGAIN;
1190                 } else
1191                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1192                                    "size %u\n", dd->ipath_rcvhdrsize);
1193         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1194                                (sizeof(u64) / sizeof(u32)))) {
1195                 ipath_dbg("Error: can't set protocol header size %u "
1196                           "(> max %u)\n", rhdrsize,
1197                           dd->ipath_rcvhdrentsize -
1198                           (u32) (sizeof(u64) / sizeof(u32)));
1199                 ret = -EOVERFLOW;
1200         } else {
1201                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1202                 dd->ipath_rcvhdrsize = rhdrsize;
1203                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1204                                  dd->ipath_rcvhdrsize);
1205                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1206                            dd->ipath_rcvhdrsize);
1207         }
1208         return ret;
1209 }
1210
1211 /**
1212  * ipath_getpiobuf - find an available pio buffer
1213  * @dd: the infinipath device
1214  * @pbufnum: the buffer number is placed here
1215  *
1216  * do appropriate marking as busy, etc.
1217  * returns buffer number if one found (>=0), negative number is error.
1218  * Used by ipath_sma_send_pkt and ipath_layer_send
1219  */
1220 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 * pbufnum)
1221 {
1222         int i, j, starti, updated = 0;
1223         unsigned piobcnt, iter;
1224         unsigned long flags;
1225         unsigned long *shadow = dd->ipath_pioavailshadow;
1226         u32 __iomem *buf;
1227
1228         piobcnt = (unsigned)(dd->ipath_piobcnt2k
1229                              + dd->ipath_piobcnt4k);
1230         starti = dd->ipath_lastport_piobuf;
1231         iter = piobcnt - starti;
1232         if (dd->ipath_upd_pio_shadow) {
1233                 /*
1234                  * Minor optimization.  If we had no buffers on last call,
1235                  * start out by doing the update; continue and do scan even
1236                  * if no buffers were updated, to be paranoid
1237                  */
1238                 ipath_update_pio_bufs(dd);
1239                 /* we scanned here, don't do it at end of scan */
1240                 updated = 1;
1241                 i = starti;
1242         } else
1243                 i = dd->ipath_lastpioindex;
1244
1245 rescan:
1246         /*
1247          * while test_and_set_bit() is atomic, we do that and then the
1248          * change_bit(), and the pair is not.  See if this is the cause
1249          * of the remaining armlaunch errors.
1250          */
1251         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1252         for (j = 0; j < iter; j++, i++) {
1253                 if (i >= piobcnt)
1254                         i = starti;
1255                 /*
1256                  * To avoid bus lock overhead, we first find a candidate
1257                  * buffer, then do the test and set, and continue if that
1258                  * fails.
1259                  */
1260                 if (test_bit((2 * i) + 1, shadow) ||
1261                     test_and_set_bit((2 * i) + 1, shadow))
1262                         continue;
1263                 /* flip generation bit */
1264                 change_bit(2 * i, shadow);
1265                 break;
1266         }
1267         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1268
1269         if (j == iter) {
1270                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1271
1272                 /*
1273                  * first time through; shadow exhausted, but may be real
1274                  * buffers available, so go see; if any updated, rescan
1275                  * (once)
1276                  */
1277                 if (!updated) {
1278                         ipath_update_pio_bufs(dd);
1279                         updated = 1;
1280                         i = starti;
1281                         goto rescan;
1282                 }
1283                 dd->ipath_upd_pio_shadow = 1;
1284                 /*
1285                  * not atomic, but if we lose one once in a while, that's OK
1286                  */
1287                 ipath_stats.sps_nopiobufs++;
1288                 if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1289                         ipath_dbg(
1290                                 "%u pio sends with no bufavail; dmacopy: "
1291                                 "%llx %llx %llx %llx; shadow:  "
1292                                 "%lx %lx %lx %lx\n",
1293                                 dd->ipath_consec_nopiobuf,
1294                                 (unsigned long long) le64_to_cpu(dma[0]),
1295                                 (unsigned long long) le64_to_cpu(dma[1]),
1296                                 (unsigned long long) le64_to_cpu(dma[2]),
1297                                 (unsigned long long) le64_to_cpu(dma[3]),
1298                                 shadow[0], shadow[1], shadow[2],
1299                                 shadow[3]);
1300                         /*
1301                          * 4 buffers per byte, 4 registers above, cover rest
1302                          * below
1303                          */
1304                         if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1305                             (sizeof(shadow[0]) * 4 * 4))
1306                                 ipath_dbg("2nd group: dmacopy: %llx %llx "
1307                                           "%llx %llx; shadow: %lx %lx "
1308                                           "%lx %lx\n",
1309                                           (unsigned long long)
1310                                           le64_to_cpu(dma[4]),
1311                                           (unsigned long long)
1312                                           le64_to_cpu(dma[5]),
1313                                           (unsigned long long)
1314                                           le64_to_cpu(dma[6]),
1315                                           (unsigned long long)
1316                                           le64_to_cpu(dma[7]),
1317                                           shadow[4], shadow[5],
1318                                           shadow[6], shadow[7]);
1319                 }
1320                 buf = NULL;
1321                 goto bail;
1322         }
1323
1324         if (updated)
1325                 /*
1326                  * ran out of bufs, now some (at least this one we just
1327                  * got) are now available, so tell the layered driver.
1328                  */
1329                 __ipath_layer_intr(dd, IPATH_LAYER_INT_SEND_CONTINUE);
1330
1331         /*
1332          * set next starting place.  Since it's just an optimization,
1333          * it doesn't matter who wins on this, so no locking
1334          */
1335         dd->ipath_lastpioindex = i + 1;
1336         if (dd->ipath_upd_pio_shadow)
1337                 dd->ipath_upd_pio_shadow = 0;
1338         if (dd->ipath_consec_nopiobuf)
1339                 dd->ipath_consec_nopiobuf = 0;
1340         if (i < dd->ipath_piobcnt2k)
1341                 buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1342                                        i * dd->ipath_palign);
1343         else
1344                 buf = (u32 __iomem *)
1345                         (dd->ipath_pio4kbase +
1346                          (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1347         ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1348                    i, (i < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1349         if (pbufnum)
1350                 *pbufnum = i;
1351
1352 bail:
1353         return buf;
1354 }
1355
1356 /**
1357  * ipath_create_rcvhdrq - create a receive header queue
1358  * @dd: the infinipath device
1359  * @pd: the port data
1360  *
1361  * this must be contiguous memory (from an i/o perspective), and must be
1362  * DMA'able (which means for some systems, it will go through an IOMMU,
1363  * or be forced into a low address range).
1364  */
1365 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1366                          struct ipath_portdata *pd)
1367 {
1368         int ret = 0;
1369
1370         if (!pd->port_rcvhdrq) {
1371                 dma_addr_t phys_hdrqtail;
1372                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1373                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1374                                 sizeof(u32), PAGE_SIZE);
1375
1376                 pd->port_rcvhdrq = dma_alloc_coherent(
1377                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1378                         gfp_flags);
1379
1380                 if (!pd->port_rcvhdrq) {
1381                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1382                                       "for port %u rcvhdrq failed\n",
1383                                       amt, pd->port_port);
1384                         ret = -ENOMEM;
1385                         goto bail;
1386                 }
1387                 pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1388                         &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, GFP_KERNEL);
1389                 if (!pd->port_rcvhdrtail_kvaddr) {
1390                         ipath_dev_err(dd, "attempt to allocate 1 page "
1391                                       "for port %u rcvhdrqtailaddr failed\n",
1392                                       pd->port_port);
1393                         ret = -ENOMEM;
1394                         goto bail;
1395                 }
1396                 pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1397
1398                 pd->port_rcvhdrq_size = amt;
1399
1400                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1401                            "for port %u rcvhdr Q\n",
1402                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1403                            (unsigned long) pd->port_rcvhdrq_phys,
1404                            (unsigned long) pd->port_rcvhdrq_size,
1405                            pd->port_port);
1406
1407                 ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx physical\n",
1408                            pd->port_port,
1409                            (unsigned long long) phys_hdrqtail);
1410         }
1411         else
1412                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1413                            "hdrtailaddr@%p %llx physical\n",
1414                            pd->port_port, pd->port_rcvhdrq,
1415                            pd->port_rcvhdrq_phys, pd->port_rcvhdrtail_kvaddr,
1416                            (unsigned long long)pd->port_rcvhdrqtailaddr_phys);
1417
1418         /* clear for security and sanity on each use */
1419         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1420         memset((void *)pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1421
1422         /*
1423          * tell chip each time we init it, even if we are re-using previous
1424          * memory (we zero the register at process close)
1425          */
1426         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1427                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1428         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1429                               pd->port_port, pd->port_rcvhdrq_phys);
1430
1431         ret = 0;
1432 bail:
1433         return ret;
1434 }
1435
1436 int ipath_waitfor_complete(struct ipath_devdata *dd, ipath_kreg reg_id,
1437                            u64 bits_to_wait_for, u64 * valp)
1438 {
1439         unsigned long timeout;
1440         u64 lastval, val;
1441         int ret;
1442
1443         lastval = ipath_read_kreg64(dd, reg_id);
1444         /* wait a ridiculously long time */
1445         timeout = jiffies + msecs_to_jiffies(5);
1446         do {
1447                 val = ipath_read_kreg64(dd, reg_id);
1448                 /* set so they have something, even on failures. */
1449                 *valp = val;
1450                 if ((val & bits_to_wait_for) == bits_to_wait_for) {
1451                         ret = 0;
1452                         break;
1453                 }
1454                 if (val != lastval)
1455                         ipath_cdbg(VERBOSE, "Changed from %llx to %llx, "
1456                                    "waiting for %llx bits\n",
1457                                    (unsigned long long) lastval,
1458                                    (unsigned long long) val,
1459                                    (unsigned long long) bits_to_wait_for);
1460                 cond_resched();
1461                 if (time_after(jiffies, timeout)) {
1462                         ipath_dbg("Didn't get bits %llx in register 0x%x, "
1463                                   "got %llx\n",
1464                                   (unsigned long long) bits_to_wait_for,
1465                                   reg_id, (unsigned long long) *valp);
1466                         ret = -ENODEV;
1467                         break;
1468                 }
1469         } while (1);
1470
1471         return ret;
1472 }
1473
1474 /**
1475  * ipath_waitfor_mdio_cmdready - wait for last command to complete
1476  * @dd: the infinipath device
1477  *
1478  * Like ipath_waitfor_complete(), but we wait for the CMDVALID bit to go
1479  * away indicating the last command has completed.  It doesn't return data
1480  */
1481 int ipath_waitfor_mdio_cmdready(struct ipath_devdata *dd)
1482 {
1483         unsigned long timeout;
1484         u64 val;
1485         int ret;
1486
1487         /* wait a ridiculously long time */
1488         timeout = jiffies + msecs_to_jiffies(5);
1489         do {
1490                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_mdio);
1491                 if (!(val & IPATH_MDIO_CMDVALID)) {
1492                         ret = 0;
1493                         break;
1494                 }
1495                 cond_resched();
1496                 if (time_after(jiffies, timeout)) {
1497                         ipath_dbg("CMDVALID stuck in mdio reg? (%llx)\n",
1498                                   (unsigned long long) val);
1499                         ret = -ENODEV;
1500                         break;
1501                 }
1502         } while (1);
1503
1504         return ret;
1505 }
1506
1507 void ipath_set_ib_lstate(struct ipath_devdata *dd, int which)
1508 {
1509         static const char *what[4] = {
1510                 [0] = "DOWN",
1511                 [INFINIPATH_IBCC_LINKCMD_INIT] = "INIT",
1512                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1513                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1514         };
1515         int linkcmd = (which >> INFINIPATH_IBCC_LINKCMD_SHIFT) &
1516                         INFINIPATH_IBCC_LINKCMD_MASK;
1517
1518         ipath_cdbg(SMA, "Trying to move unit %u to %s, current ltstate "
1519                    "is %s\n", dd->ipath_unit,
1520                    what[linkcmd],
1521                    ipath_ibcstatus_str[
1522                            (ipath_read_kreg64
1523                             (dd, dd->ipath_kregs->kr_ibcstatus) >>
1524                             INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1525                            INFINIPATH_IBCS_LINKTRAININGSTATE_MASK]);
1526         /* flush all queued sends when going to DOWN or INIT, to be sure that
1527          * they don't block SMA and other MAD packets */
1528         if (!linkcmd || linkcmd == INFINIPATH_IBCC_LINKCMD_INIT) {
1529                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1530                                  INFINIPATH_S_ABORT);
1531                 ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf,
1532                                     (unsigned)(dd->ipath_piobcnt2k +
1533                                     dd->ipath_piobcnt4k) -
1534                                     dd->ipath_lastport_piobuf);
1535         }
1536
1537         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1538                          dd->ipath_ibcctrl | which);
1539 }
1540
1541 /**
1542  * ipath_read_kreg64_port - read a device's per-port 64-bit kernel register
1543  * @dd: the infinipath device
1544  * @regno: the register number to read
1545  * @port: the port containing the register
1546  *
1547  * Registers that vary with the chip implementation constants (port)
1548  * use this routine.
1549  */
1550 u64 ipath_read_kreg64_port(const struct ipath_devdata *dd, ipath_kreg regno,
1551                            unsigned port)
1552 {
1553         u16 where;
1554
1555         if (port < dd->ipath_portcnt &&
1556             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1557              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1558                 where = regno + port;
1559         else
1560                 where = -1;
1561
1562         return ipath_read_kreg64(dd, where);
1563 }
1564
1565 /**
1566  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1567  * @dd: the infinipath device
1568  * @regno: the register number to write
1569  * @port: the port containing the register
1570  * @value: the value to write
1571  *
1572  * Registers that vary with the chip implementation constants (port)
1573  * use this routine.
1574  */
1575 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
1576                           unsigned port, u64 value)
1577 {
1578         u16 where;
1579
1580         if (port < dd->ipath_portcnt &&
1581             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1582              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1583                 where = regno + port;
1584         else
1585                 where = -1;
1586
1587         ipath_write_kreg(dd, where, value);
1588 }
1589
1590 /**
1591  * ipath_shutdown_device - shut down a device
1592  * @dd: the infinipath device
1593  *
1594  * This is called to make the device quiet when we are about to
1595  * unload the driver, and also when the device is administratively
1596  * disabled.   It does not free any data structures.
1597  * Everything it does has to be setup again by ipath_init_chip(dd,1)
1598  */
1599 void ipath_shutdown_device(struct ipath_devdata *dd)
1600 {
1601         u64 val;
1602
1603         ipath_dbg("Shutting down the device\n");
1604
1605         dd->ipath_flags |= IPATH_LINKUNK;
1606         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
1607                              IPATH_LINKINIT | IPATH_LINKARMED |
1608                              IPATH_LINKACTIVE);
1609         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
1610                                 IPATH_STATUS_IB_READY);
1611
1612         /* mask interrupts, but not errors */
1613         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
1614
1615         dd->ipath_rcvctrl = 0;
1616         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
1617                          dd->ipath_rcvctrl);
1618
1619         /*
1620          * gracefully stop all sends allowing any in progress to trickle out
1621          * first.
1622          */
1623         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 0ULL);
1624         /* flush it */
1625         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1626         /*
1627          * enough for anything that's going to trickle out to have actually
1628          * done so.
1629          */
1630         udelay(5);
1631
1632         /*
1633          * abort any armed or launched PIO buffers that didn't go. (self
1634          * clearing).  Will cause any packet currently being transmitted to
1635          * go out with an EBP, and may also cause a short packet error on
1636          * the receiver.
1637          */
1638         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1639                          INFINIPATH_S_ABORT);
1640
1641         ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
1642                             INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1643
1644         /*
1645          * we are shutting down, so tell the layered driver.  We don't do
1646          * this on just a link state change, much like ethernet, a cable
1647          * unplug, etc. doesn't change driver state
1648          */
1649         ipath_layer_intr(dd, IPATH_LAYER_INT_IF_DOWN);
1650
1651         /* disable IBC */
1652         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
1653         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1654                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
1655
1656         /*
1657          * clear SerdesEnable and turn the leds off; do this here because
1658          * we are unloading, so don't count on interrupts to move along
1659          * Turn the LEDs off explictly for the same reason.
1660          */
1661         dd->ipath_f_quiet_serdes(dd);
1662         dd->ipath_f_setextled(dd, 0, 0);
1663
1664         if (dd->ipath_stats_timer_active) {
1665                 del_timer_sync(&dd->ipath_stats_timer);
1666                 dd->ipath_stats_timer_active = 0;
1667         }
1668
1669         /*
1670          * clear all interrupts and errors, so that the next time the driver
1671          * is loaded or device is enabled, we know that whatever is set
1672          * happened while we were unloaded
1673          */
1674         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
1675                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
1676         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
1677         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
1678 }
1679
1680 /**
1681  * ipath_free_pddata - free a port's allocated data
1682  * @dd: the infinipath device
1683  * @pd: the portdata structure
1684  *
1685  * free up any allocated data for a port
1686  * This should not touch anything that would affect a simultaneous
1687  * re-allocation of port data, because it is called after ipath_mutex
1688  * is released (and can be called from reinit as well).
1689  * It should never change any chip state, or global driver state.
1690  * (The only exception to global state is freeing the port0 port0_skbs.)
1691  */
1692 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
1693 {
1694         if (!pd)
1695                 return;
1696
1697         if (pd->port_rcvhdrq) {
1698                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
1699                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
1700                            (unsigned long) pd->port_rcvhdrq_size);
1701                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
1702                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
1703                 pd->port_rcvhdrq = NULL;
1704                 if (pd->port_rcvhdrtail_kvaddr) {
1705                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1706                                          (void *)pd->port_rcvhdrtail_kvaddr,
1707                                          pd->port_rcvhdrqtailaddr_phys);
1708                         pd->port_rcvhdrtail_kvaddr = NULL;
1709                 }
1710         }
1711         if (pd->port_port && pd->port_rcvegrbuf) {
1712                 unsigned e;
1713
1714                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
1715                         void *base = pd->port_rcvegrbuf[e];
1716                         size_t size = pd->port_rcvegrbuf_size;
1717
1718                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
1719                                    "chunk %u/%u\n", base,
1720                                    (unsigned long) size,
1721                                    e, pd->port_rcvegrbuf_chunks);
1722                         dma_free_coherent(&dd->pcidev->dev, size,
1723                                 base, pd->port_rcvegrbuf_phys[e]);
1724                 }
1725                 vfree(pd->port_rcvegrbuf);
1726                 pd->port_rcvegrbuf = NULL;
1727                 vfree(pd->port_rcvegrbuf_phys);
1728                 pd->port_rcvegrbuf_phys = NULL;
1729                 pd->port_rcvegrbuf_chunks = 0;
1730         } else if (pd->port_port == 0 && dd->ipath_port0_skbs) {
1731                 unsigned e;
1732                 struct sk_buff **skbs = dd->ipath_port0_skbs;
1733
1734                 dd->ipath_port0_skbs = NULL;
1735                 ipath_cdbg(VERBOSE, "free closed port %d ipath_port0_skbs "
1736                            "@ %p\n", pd->port_port, skbs);
1737                 for (e = 0; e < dd->ipath_rcvegrcnt; e++)
1738                         if (skbs[e])
1739                                 dev_kfree_skb(skbs[e]);
1740                 vfree(skbs);
1741         }
1742         kfree(pd->port_tid_pg_list);
1743         kfree(pd);
1744 }
1745
1746 static int __init infinipath_init(void)
1747 {
1748         int ret;
1749
1750         ipath_dbg(KERN_INFO DRIVER_LOAD_MSG "%s", ipath_core_version);
1751
1752         /*
1753          * These must be called before the driver is registered with
1754          * the PCI subsystem.
1755          */
1756         idr_init(&unit_table);
1757         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
1758                 ret = -ENOMEM;
1759                 goto bail;
1760         }
1761
1762         ret = pci_register_driver(&ipath_driver);
1763         if (ret < 0) {
1764                 printk(KERN_ERR IPATH_DRV_NAME
1765                        ": Unable to register driver: error %d\n", -ret);
1766                 goto bail_unit;
1767         }
1768
1769         ret = ipath_driver_create_group(&ipath_driver.driver);
1770         if (ret < 0) {
1771                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create driver "
1772                        "sysfs entries: error %d\n", -ret);
1773                 goto bail_pci;
1774         }
1775
1776         ret = ipath_init_ipathfs();
1777         if (ret < 0) {
1778                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
1779                        "ipathfs: error %d\n", -ret);
1780                 goto bail_group;
1781         }
1782
1783         goto bail;
1784
1785 bail_group:
1786         ipath_driver_remove_group(&ipath_driver.driver);
1787
1788 bail_pci:
1789         pci_unregister_driver(&ipath_driver);
1790
1791 bail_unit:
1792         idr_destroy(&unit_table);
1793
1794 bail:
1795         return ret;
1796 }
1797
1798 static void cleanup_device(struct ipath_devdata *dd)
1799 {
1800         int port;
1801
1802         ipath_shutdown_device(dd);
1803
1804         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
1805                 /* can't do anything more with chip; needs re-init */
1806                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
1807                 if (dd->ipath_kregbase) {
1808                         /*
1809                          * if we haven't already cleaned up before these are
1810                          * to ensure any register reads/writes "fail" until
1811                          * re-init
1812                          */
1813                         dd->ipath_kregbase = NULL;
1814                         dd->ipath_uregbase = 0;
1815                         dd->ipath_sregbase = 0;
1816                         dd->ipath_cregbase = 0;
1817                         dd->ipath_kregsize = 0;
1818                 }
1819                 ipath_disable_wc(dd);
1820         }
1821
1822         if (dd->ipath_pioavailregs_dma) {
1823                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1824                                   (void *) dd->ipath_pioavailregs_dma,
1825                                   dd->ipath_pioavailregs_phys);
1826                 dd->ipath_pioavailregs_dma = NULL;
1827         }
1828         if (dd->ipath_dummy_hdrq) {
1829                 dma_free_coherent(&dd->pcidev->dev,
1830                         dd->ipath_pd[0]->port_rcvhdrq_size,
1831                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
1832                 dd->ipath_dummy_hdrq = NULL;
1833         }
1834
1835         if (dd->ipath_pageshadow) {
1836                 struct page **tmpp = dd->ipath_pageshadow;
1837                 int i, cnt = 0;
1838
1839                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
1840                            "locked\n");
1841                 for (port = 0; port < dd->ipath_cfgports; port++) {
1842                         int port_tidbase = port * dd->ipath_rcvtidcnt;
1843                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
1844                         for (i = port_tidbase; i < maxtid; i++) {
1845                                 if (!tmpp[i])
1846                                         continue;
1847                                 ipath_release_user_pages(&tmpp[i], 1);
1848                                 tmpp[i] = NULL;
1849                                 cnt++;
1850                         }
1851                 }
1852                 if (cnt) {
1853                         ipath_stats.sps_pageunlocks += cnt;
1854                         ipath_cdbg(VERBOSE, "There were still %u expTID "
1855                                    "entries locked\n", cnt);
1856                 }
1857                 if (ipath_stats.sps_pagelocks ||
1858                     ipath_stats.sps_pageunlocks)
1859                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
1860                                    "unlocked via ipath_m{un}lock\n",
1861                                    (unsigned long long)
1862                                    ipath_stats.sps_pagelocks,
1863                                    (unsigned long long)
1864                                    ipath_stats.sps_pageunlocks);
1865
1866                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
1867                            dd->ipath_pageshadow);
1868                 vfree(dd->ipath_pageshadow);
1869                 dd->ipath_pageshadow = NULL;
1870         }
1871
1872         /*
1873          * free any resources still in use (usually just kernel ports)
1874          * at unload; we do for portcnt, not cfgports, because cfgports
1875          * could have changed while we were loaded.
1876          */
1877         for (port = 0; port < dd->ipath_portcnt; port++) {
1878                 struct ipath_portdata *pd = dd->ipath_pd[port];
1879                 dd->ipath_pd[port] = NULL;
1880                 ipath_free_pddata(dd, pd);
1881         }
1882         kfree(dd->ipath_pd);
1883         /*
1884          * debuggability, in case some cleanup path tries to use it
1885          * after this
1886          */
1887         dd->ipath_pd = NULL;
1888 }
1889
1890 static void __exit infinipath_cleanup(void)
1891 {
1892         struct ipath_devdata *dd, *tmp;
1893         unsigned long flags;
1894
1895         ipath_exit_ipathfs();
1896
1897         ipath_driver_remove_group(&ipath_driver.driver);
1898
1899         spin_lock_irqsave(&ipath_devs_lock, flags);
1900
1901         /*
1902          * turn off rcv, send, and interrupts for all ports, all drivers
1903          * should also hard reset the chip here?
1904          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
1905          * for all versions of the driver, if they were allocated
1906          */
1907         list_for_each_entry_safe(dd, tmp, &ipath_dev_list, ipath_list) {
1908                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
1909
1910                 if (dd->ipath_kregbase)
1911                         cleanup_device(dd);
1912
1913                 if (dd->pcidev) {
1914                         if (dd->pcidev->irq) {
1915                                 ipath_cdbg(VERBOSE,
1916                                            "unit %u free_irq of irq %x\n",
1917                                            dd->ipath_unit, dd->pcidev->irq);
1918                                 free_irq(dd->pcidev->irq, dd);
1919                         } else
1920                                 ipath_dbg("irq is 0, not doing free_irq "
1921                                           "for unit %u\n", dd->ipath_unit);
1922
1923                         /*
1924                          * we check for NULL here, because it's outside
1925                          * the kregbase check, and we need to call it
1926                          * after the free_irq.  Thus it's possible that
1927                          * the function pointers were never initialized.
1928                          */
1929                         if (dd->ipath_f_cleanup)
1930                                 /* clean up chip-specific stuff */
1931                                 dd->ipath_f_cleanup(dd);
1932
1933                         dd->pcidev = NULL;
1934                 }
1935                 spin_lock_irqsave(&ipath_devs_lock, flags);
1936         }
1937
1938         spin_unlock_irqrestore(&ipath_devs_lock, flags);
1939
1940         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
1941         pci_unregister_driver(&ipath_driver);
1942
1943         idr_destroy(&unit_table);
1944 }
1945
1946 /**
1947  * ipath_reset_device - reset the chip if possible
1948  * @unit: the device to reset
1949  *
1950  * Whether or not reset is successful, we attempt to re-initialize the chip
1951  * (that is, much like a driver unload/reload).  We clear the INITTED flag
1952  * so that the various entry points will fail until we reinitialize.  For
1953  * now, we only allow this if no user ports are open that use chip resources
1954  */
1955 int ipath_reset_device(int unit)
1956 {
1957         int ret, i;
1958         struct ipath_devdata *dd = ipath_lookup(unit);
1959
1960         if (!dd) {
1961                 ret = -ENODEV;
1962                 goto bail;
1963         }
1964
1965         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
1966
1967         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
1968                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
1969                          "not initialized or not present\n", unit);
1970                 ret = -ENXIO;
1971                 goto bail;
1972         }
1973
1974         if (dd->ipath_pd)
1975                 for (i = 1; i < dd->ipath_cfgports; i++) {
1976                         if (dd->ipath_pd[i] && dd->ipath_pd[i]->port_cnt) {
1977                                 ipath_dbg("unit %u port %d is in use "
1978                                           "(PID %u cmd %s), can't reset\n",
1979                                           unit, i,
1980                                           dd->ipath_pd[i]->port_pid,
1981                                           dd->ipath_pd[i]->port_comm);
1982                                 ret = -EBUSY;
1983                                 goto bail;
1984                         }
1985                 }
1986
1987         dd->ipath_flags &= ~IPATH_INITTED;
1988         ret = dd->ipath_f_reset(dd);
1989         if (ret != 1)
1990                 ipath_dbg("reset was not successful\n");
1991         ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
1992                   unit);
1993         ret = ipath_init_chip(dd, 1);
1994         if (ret)
1995                 ipath_dev_err(dd, "Reinitialize unit %u after "
1996                               "reset failed with %d\n", unit, ret);
1997         else
1998                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
1999                          "resetting\n", unit);
2000
2001 bail:
2002         return ret;
2003 }
2004
2005 module_init(infinipath_init);
2006 module_exit(infinipath_cleanup);