2 * Driver for NEC VR4100 series Real Time Clock unit.
4 * Copyright (C) 2003-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/err.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/interrupt.h>
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <linux/rtc.h>
28 #include <linux/spinlock.h>
29 #include <linux/types.h>
31 #include <asm/div64.h>
33 #include <asm/uaccess.h>
35 MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
36 MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
37 MODULE_LICENSE("GPL v2");
40 #define ETIMELREG 0x00
41 #define ETIMEMREG 0x02
42 #define ETIMEHREG 0x04
48 #define RTCL1LREG 0x10
49 #define RTCL1HREG 0x12
50 #define RTCL1CNTLREG 0x14
51 #define RTCL1CNTHREG 0x16
52 #define RTCL2LREG 0x18
53 #define RTCL2HREG 0x1a
54 #define RTCL2CNTLREG 0x1c
55 #define RTCL2CNTHREG 0x1e
60 #define TCLKCNTLREG 0x04
61 #define TCLKCNTHREG 0x06
63 #define RTCINTREG 0x1e
64 #define TCLOCK_INT 0x08
65 #define RTCLONG2_INT 0x04
66 #define RTCLONG1_INT 0x02
67 #define ELAPSEDTIME_INT 0x01
69 #define RTC_FREQUENCY 32768
70 #define MAX_PERIODIC_RATE 6553
72 static void __iomem *rtc1_base;
73 static void __iomem *rtc2_base;
75 #define rtc1_read(offset) readw(rtc1_base + (offset))
76 #define rtc1_write(offset, value) writew((value), rtc1_base + (offset))
78 #define rtc2_read(offset) readw(rtc2_base + (offset))
79 #define rtc2_write(offset, value) writew((value), rtc2_base + (offset))
81 static unsigned long epoch = 1970; /* Jan 1 1970 00:00:00 */
83 static DEFINE_SPINLOCK(rtc_lock);
84 static char rtc_name[] = "RTC";
85 static unsigned long periodic_count;
86 static unsigned int alarm_enabled;
87 static int aie_irq = -1;
88 static int pie_irq = -1;
90 static inline unsigned long read_elapsed_second(void)
93 unsigned long first_low, first_mid, first_high;
95 unsigned long second_low, second_mid, second_high;
98 first_low = rtc1_read(ETIMELREG);
99 first_mid = rtc1_read(ETIMEMREG);
100 first_high = rtc1_read(ETIMEHREG);
101 second_low = rtc1_read(ETIMELREG);
102 second_mid = rtc1_read(ETIMEMREG);
103 second_high = rtc1_read(ETIMEHREG);
104 } while (first_low != second_low || first_mid != second_mid ||
105 first_high != second_high);
107 return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
110 static inline void write_elapsed_second(unsigned long sec)
112 spin_lock_irq(&rtc_lock);
114 rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
115 rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
116 rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
118 spin_unlock_irq(&rtc_lock);
121 static void vr41xx_rtc_release(struct device *dev)
124 spin_lock_irq(&rtc_lock);
126 rtc1_write(ECMPLREG, 0);
127 rtc1_write(ECMPMREG, 0);
128 rtc1_write(ECMPHREG, 0);
129 rtc1_write(RTCL1LREG, 0);
130 rtc1_write(RTCL1HREG, 0);
132 spin_unlock_irq(&rtc_lock);
134 disable_irq(aie_irq);
135 disable_irq(pie_irq);
138 static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time)
140 unsigned long epoch_sec, elapsed_sec;
142 epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
143 elapsed_sec = read_elapsed_second();
145 rtc_time_to_tm(epoch_sec + elapsed_sec, time);
150 static int vr41xx_rtc_set_time(struct device *dev, struct rtc_time *time)
152 unsigned long epoch_sec, current_sec;
154 epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
155 current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
156 time->tm_hour, time->tm_min, time->tm_sec);
158 write_elapsed_second(current_sec - epoch_sec);
163 static int vr41xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
165 unsigned long low, mid, high;
166 struct rtc_time *time = &wkalrm->time;
168 spin_lock_irq(&rtc_lock);
170 low = rtc1_read(ECMPLREG);
171 mid = rtc1_read(ECMPMREG);
172 high = rtc1_read(ECMPHREG);
173 wkalrm->enabled = alarm_enabled;
175 spin_unlock_irq(&rtc_lock);
177 rtc_time_to_tm((high << 17) | (mid << 1) | (low >> 15), time);
182 static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
184 unsigned long alarm_sec;
185 struct rtc_time *time = &wkalrm->time;
187 alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
188 time->tm_hour, time->tm_min, time->tm_sec);
190 spin_lock_irq(&rtc_lock);
193 disable_irq(aie_irq);
195 rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
196 rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
197 rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
202 alarm_enabled = wkalrm->enabled;
204 spin_unlock_irq(&rtc_lock);
209 static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq)
213 count = RTC_FREQUENCY;
216 periodic_count = count;
218 spin_lock_irq(&rtc_lock);
220 rtc1_write(RTCL1LREG, count);
221 rtc1_write(RTCL1HREG, count >> 16);
223 spin_unlock_irq(&rtc_lock);
228 static int vr41xx_rtc_irq_set_state(struct device *dev, int enabled)
233 disable_irq(pie_irq);
238 static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
242 spin_lock_irq(&rtc_lock);
244 if (!alarm_enabled) {
249 spin_unlock_irq(&rtc_lock);
252 spin_lock_irq(&rtc_lock);
255 disable_irq(aie_irq);
259 spin_unlock_irq(&rtc_lock);
262 return put_user(epoch, (unsigned long __user *)arg);
264 /* Doesn't support before 1900 */
276 static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id)
278 struct platform_device *pdev = (struct platform_device *)dev_id;
279 struct rtc_device *rtc = platform_get_drvdata(pdev);
281 rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
283 rtc_update_irq(rtc, 1, RTC_AF);
288 static irqreturn_t rtclong1_interrupt(int irq, void *dev_id)
290 struct platform_device *pdev = (struct platform_device *)dev_id;
291 struct rtc_device *rtc = platform_get_drvdata(pdev);
292 unsigned long count = periodic_count;
294 rtc2_write(RTCINTREG, RTCLONG1_INT);
296 rtc1_write(RTCL1LREG, count);
297 rtc1_write(RTCL1HREG, count >> 16);
299 rtc_update_irq(rtc, 1, RTC_PF);
304 static const struct rtc_class_ops vr41xx_rtc_ops = {
305 .release = vr41xx_rtc_release,
306 .ioctl = vr41xx_rtc_ioctl,
307 .read_time = vr41xx_rtc_read_time,
308 .set_time = vr41xx_rtc_set_time,
309 .read_alarm = vr41xx_rtc_read_alarm,
310 .set_alarm = vr41xx_rtc_set_alarm,
311 .irq_set_freq = vr41xx_rtc_irq_set_freq,
312 .irq_set_state = vr41xx_rtc_irq_set_state,
315 static int __devinit rtc_probe(struct platform_device *pdev)
317 struct resource *res;
318 struct rtc_device *rtc;
321 if (pdev->num_resources != 4)
324 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
328 rtc1_base = ioremap(res->start, res->end - res->start + 1);
332 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
335 goto err_rtc1_iounmap;
338 rtc2_base = ioremap(res->start, res->end - res->start + 1);
341 goto err_rtc1_iounmap;
344 rtc = rtc_device_register(rtc_name, &pdev->dev, &vr41xx_rtc_ops, THIS_MODULE);
346 retval = PTR_ERR(rtc);
347 goto err_iounmap_all;
350 rtc->max_user_freq = MAX_PERIODIC_RATE;
352 spin_lock_irq(&rtc_lock);
354 rtc1_write(ECMPLREG, 0);
355 rtc1_write(ECMPMREG, 0);
356 rtc1_write(ECMPHREG, 0);
357 rtc1_write(RTCL1LREG, 0);
358 rtc1_write(RTCL1HREG, 0);
360 spin_unlock_irq(&rtc_lock);
362 aie_irq = platform_get_irq(pdev, 0);
363 if (aie_irq < 0 || aie_irq >= nr_irqs) {
365 goto err_device_unregister;
368 retval = request_irq(aie_irq, elapsedtime_interrupt, IRQF_DISABLED,
369 "elapsed_time", pdev);
371 goto err_device_unregister;
373 pie_irq = platform_get_irq(pdev, 1);
374 if (pie_irq < 0 || pie_irq >= nr_irqs)
377 retval = request_irq(pie_irq, rtclong1_interrupt, IRQF_DISABLED,
382 platform_set_drvdata(pdev, rtc);
384 disable_irq(aie_irq);
385 disable_irq(pie_irq);
387 printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
392 free_irq(aie_irq, pdev);
394 err_device_unregister:
395 rtc_device_unregister(rtc);
408 static int __devexit rtc_remove(struct platform_device *pdev)
410 struct rtc_device *rtc;
412 rtc = platform_get_drvdata(pdev);
414 rtc_device_unregister(rtc);
416 platform_set_drvdata(pdev, NULL);
418 free_irq(aie_irq, pdev);
419 free_irq(pie_irq, pdev);
428 /* work with hotplug and coldplug */
429 MODULE_ALIAS("platform:RTC");
431 static struct platform_driver rtc_platform_driver = {
433 .remove = __devexit_p(rtc_remove),
436 .owner = THIS_MODULE,
440 static int __init vr41xx_rtc_init(void)
442 return platform_driver_register(&rtc_platform_driver);
445 static void __exit vr41xx_rtc_exit(void)
447 platform_driver_unregister(&rtc_platform_driver);
450 module_init(vr41xx_rtc_init);
451 module_exit(vr41xx_rtc_exit);