1 /* lance.c: An AMD LANCE/PCnet ethernet driver for Linux. */
3 Written/copyright 1993-1998 by Donald Becker.
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU General Public License, incorporated herein by reference.
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100/NE2500) ethercards.
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
19 - alignment problem with 1.3.* kernel and some minor changes.
20 Thomas Bogendoerfer (tsbogend@bigbug.franken.de):
21 - added support for Linux/Alpha, but removed most of it, because
22 it worked only for the PCI chip.
23 - added hook for the 32bit lance driver
24 - added PCnetPCI II (79C970A) to chip table
25 Paul Gortmaker (gpg109@rsphy1.anu.edu.au):
26 - hopefully fix above so Linux/Alpha can use ISA cards too.
27 8/20/96 Fixed 7990 autoIRQ failure and reversed unneeded alignment -djb
28 v1.12 10/27/97 Module support -djb
29 v1.14 2/3/98 Module support modified, made PCI support optional -djb
30 v1.15 5/27/99 Fixed bug in the cleanup_module(). dev->priv was freed
31 before unregister_netdev() which caused NULL pointer
32 reference later in the chain (in rtnetlink_fill_ifinfo())
33 -- Mika Kuoppala <miku@iki.fi>
35 Forward ported v1.14 to 2.1.129, merged the PCI and misc changes from
36 the 2.1 version of the old driver - Alan Cox
38 Get rid of check_region, check kmalloc return in lance_probe1
39 Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 11/01/2001
41 Reworked detection, added support for Racal InterLan EtherBlaster cards
42 Vesselin Kostadinov <vesok at yahoo dot com > - 22/4/2004
45 static const char version[] = "lance.c:v1.16 2006/11/09 dplatt@3do.com, becker@cesdis.gsfc.nasa.gov\n";
47 #include <linux/module.h>
48 #include <linux/kernel.h>
49 #include <linux/string.h>
50 #include <linux/delay.h>
51 #include <linux/errno.h>
52 #include <linux/ioport.h>
53 #include <linux/slab.h>
54 #include <linux/interrupt.h>
55 #include <linux/pci.h>
56 #include <linux/init.h>
57 #include <linux/netdevice.h>
58 #include <linux/etherdevice.h>
59 #include <linux/skbuff.h>
61 #include <linux/bitops.h>
66 static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0};
67 static int lance_probe1(struct net_device *dev, int ioaddr, int irq, int options);
68 static int __init do_lance_probe(struct net_device *dev);
83 { //Racal InterLan EtherBlaster
91 static int lance_debug = LANCE_DEBUG;
93 static int lance_debug = 1;
99 I. Board Compatibility
101 This device driver is designed for the AMD 79C960, the "PCnet-ISA
102 single-chip ethernet controller for ISA". This chip is used in a wide
103 variety of boards from vendors such as Allied Telesis, HP, Kingston,
104 and Boca. This driver is also intended to work with older AMD 7990
105 designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
106 I use the name LANCE to refer to all of the AMD chips, even though it properly
107 refers only to the original 7990.
109 II. Board-specific settings
111 The driver is designed to work the boards that use the faster
112 bus-master mode, rather than in shared memory mode. (Only older designs
113 have on-board buffer memory needed to support the slower shared memory mode.)
115 Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
116 channel. This driver probes the likely base addresses:
117 {0x300, 0x320, 0x340, 0x360}.
118 After the board is found it generates a DMA-timeout interrupt and uses
119 autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
120 of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
121 probed for by enabling each free DMA channel in turn and checking if
122 initialization succeeds.
124 The HP-J2405A board is an exception: with this board it is easy to read the
125 EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
126 _know_ the base address -- that field is for writing the EEPROM.)
128 III. Driver operation
131 The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
132 the base and length of the data buffer, along with status bits. The length
133 of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
134 the buffer length (rather than being directly the buffer length) for
135 implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
136 ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
137 needlessly uses extra space and reduces the chance that an upper layer will
138 be able to reorder queued Tx packets based on priority. Decreasing the number
139 of entries makes it more difficult to achieve back-to-back packet transmission
140 and increases the chance that Rx ring will overflow. (Consider the worst case
141 of receiving back-to-back minimum-sized packets.)
143 The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
144 statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
145 avoid the administrative overhead. For the Rx side this avoids dynamically
146 allocating full-sized buffers "just in case", at the expense of a
147 memory-to-memory data copy for each packet received. For most systems this
148 is a good tradeoff: the Rx buffer will always be in low memory, the copy
149 is inexpensive, and it primes the cache for later packet processing. For Tx
150 the buffers are only used when needed as low-memory bounce buffers.
152 IIIB. 16M memory limitations.
153 For the ISA bus master mode all structures used directly by the LANCE,
154 the initialization block, Rx and Tx rings, and data buffers, must be
155 accessible from the ISA bus, i.e. in the lower 16M of real memory.
156 This is a problem for current Linux kernels on >16M machines. The network
157 devices are initialized after memory initialization, and the kernel doles out
158 memory from the top of memory downward. The current solution is to have a
159 special network initialization routine that's called before memory
160 initialization; this will eventually be generalized for all network devices.
161 As mentioned before, low-memory "bounce-buffers" are used when needed.
163 IIIC. Synchronization
164 The driver runs as two independent, single-threaded flows of control. One
165 is the send-packet routine, which enforces single-threaded use by the
166 dev->tbusy flag. The other thread is the interrupt handler, which is single
167 threaded by the hardware and other software.
169 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
170 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
171 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
172 the 'lp->tx_full' flag.
174 The interrupt handler has exclusive control over the Rx ring and records stats
175 from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
176 we can't avoid the interrupt overhead by having the Tx routine reap the Tx
177 stats.) After reaping the stats, it marks the queue entry as empty by setting
178 the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
179 tx_full and tbusy flags.
183 /* Set the number of Tx and Rx buffers, using Log_2(# buffers).
184 Reasonable default values are 16 Tx buffers, and 16 Rx buffers.
185 That translates to 4 and 4 (16 == 2^^4).
186 This is a compile-time option for efficiency.
188 #ifndef LANCE_LOG_TX_BUFFERS
189 #define LANCE_LOG_TX_BUFFERS 4
190 #define LANCE_LOG_RX_BUFFERS 4
193 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
194 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
195 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
197 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
198 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
199 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
201 #define PKT_BUF_SZ 1544
203 /* Offsets from base I/O address. */
204 #define LANCE_DATA 0x10
205 #define LANCE_ADDR 0x12
206 #define LANCE_RESET 0x14
207 #define LANCE_BUS_IF 0x16
208 #define LANCE_TOTAL_SIZE 0x18
210 #define TX_TIMEOUT 20
212 /* The LANCE Rx and Tx ring descriptors. */
213 struct lance_rx_head {
215 s16 buf_length; /* This length is 2s complement (negative)! */
216 s16 msg_length; /* This length is "normal". */
219 struct lance_tx_head {
221 s16 length; /* Length is 2s complement (negative)! */
225 /* The LANCE initialization block, described in databook. */
226 struct lance_init_block {
227 u16 mode; /* Pre-set mode (reg. 15) */
228 u8 phys_addr[6]; /* Physical ethernet address */
229 u32 filter[2]; /* Multicast filter (unused). */
230 /* Receive and transmit ring base, along with extra bits. */
231 u32 rx_ring; /* Tx and Rx ring base pointers */
235 struct lance_private {
236 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. */
237 struct lance_rx_head rx_ring[RX_RING_SIZE];
238 struct lance_tx_head tx_ring[TX_RING_SIZE];
239 struct lance_init_block init_block;
241 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
242 struct sk_buff* tx_skbuff[TX_RING_SIZE];
243 /* The addresses of receive-in-place skbuffs. */
244 struct sk_buff* rx_skbuff[RX_RING_SIZE];
245 unsigned long rx_buffs; /* Address of Rx and Tx buffers. */
246 /* Tx low-memory "bounce buffer" address. */
247 char (*tx_bounce_buffs)[PKT_BUF_SZ];
248 int cur_rx, cur_tx; /* The next free ring entry */
249 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
251 struct net_device_stats stats;
252 unsigned char chip_version; /* See lance_chip_type. */
256 #define LANCE_MUST_PAD 0x00000001
257 #define LANCE_ENABLE_AUTOSELECT 0x00000002
258 #define LANCE_MUST_REINIT_RING 0x00000004
259 #define LANCE_MUST_UNRESET 0x00000008
260 #define LANCE_HAS_MISSED_FRAME 0x00000010
262 /* A mapping from the chip ID number to the part number and features.
263 These are from the datasheets -- in real life the '970 version
264 reportedly has the same ID as the '965. */
265 static struct lance_chip_type {
270 {0x0000, "LANCE 7990", /* Ancient lance chip. */
271 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
272 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
273 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
274 LANCE_HAS_MISSED_FRAME},
275 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
276 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
277 LANCE_HAS_MISSED_FRAME},
278 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
279 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
280 LANCE_HAS_MISSED_FRAME},
281 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
283 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
284 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
285 LANCE_HAS_MISSED_FRAME},
286 {0x2621, "PCnet/PCI-II 79C970A", /* 79C970A PCInetPCI II. */
287 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
288 LANCE_HAS_MISSED_FRAME},
289 {0x0, "PCnet (unknown)",
290 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
291 LANCE_HAS_MISSED_FRAME},
294 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, PCNET_PCI_II=5, LANCE_UNKNOWN=6};
297 /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
298 Assume yes until we know the memory size. */
299 static unsigned char lance_need_isa_bounce_buffers = 1;
301 static int lance_open(struct net_device *dev);
302 static void lance_init_ring(struct net_device *dev, gfp_t mode);
303 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev);
304 static int lance_rx(struct net_device *dev);
305 static irqreturn_t lance_interrupt(int irq, void *dev_id);
306 static int lance_close(struct net_device *dev);
307 static struct net_device_stats *lance_get_stats(struct net_device *dev);
308 static void set_multicast_list(struct net_device *dev);
309 static void lance_tx_timeout (struct net_device *dev);
314 #define MAX_CARDS 8 /* Max number of interfaces (cards) per module */
316 static struct net_device *dev_lance[MAX_CARDS];
317 static int io[MAX_CARDS];
318 static int dma[MAX_CARDS];
319 static int irq[MAX_CARDS];
321 module_param_array(io, int, NULL, 0);
322 module_param_array(dma, int, NULL, 0);
323 module_param_array(irq, int, NULL, 0);
324 module_param(lance_debug, int, 0);
325 MODULE_PARM_DESC(io, "LANCE/PCnet I/O base address(es),required");
326 MODULE_PARM_DESC(dma, "LANCE/PCnet ISA DMA channel (ignored for some devices)");
327 MODULE_PARM_DESC(irq, "LANCE/PCnet IRQ number (ignored for some devices)");
328 MODULE_PARM_DESC(lance_debug, "LANCE/PCnet debug level (0-7)");
330 int __init init_module(void)
332 struct net_device *dev;
333 int this_dev, found = 0;
335 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
336 if (io[this_dev] == 0) {
337 if (this_dev != 0) /* only complain once */
339 printk(KERN_NOTICE "lance.c: Module autoprobing not allowed. Append \"io=0xNNN\" value(s).\n");
342 dev = alloc_etherdev(0);
345 dev->irq = irq[this_dev];
346 dev->base_addr = io[this_dev];
347 dev->dma = dma[this_dev];
348 if (do_lance_probe(dev) == 0) {
349 dev_lance[found++] = dev;
360 static void cleanup_card(struct net_device *dev)
362 struct lance_private *lp = dev->priv;
365 release_region(dev->base_addr, LANCE_TOTAL_SIZE);
366 kfree(lp->tx_bounce_buffs);
367 kfree((void*)lp->rx_buffs);
371 void __exit cleanup_module(void)
375 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
376 struct net_device *dev = dev_lance[this_dev];
378 unregister_netdev(dev);
385 MODULE_LICENSE("GPL");
388 /* Starting in v2.1.*, the LANCE/PCnet probe is now similar to the other
389 board probes now that kmalloc() can allocate ISA DMA-able regions.
390 This also allows the LANCE driver to be used as a module.
392 static int __init do_lance_probe(struct net_device *dev)
396 if (high_memory <= phys_to_virt(16*1024*1024))
397 lance_need_isa_bounce_buffers = 0;
399 for (port = lance_portlist; *port; port++) {
401 struct resource *r = request_region(ioaddr, LANCE_TOTAL_SIZE,
405 /* Detect the card with minimal I/O reads */
406 char offset14 = inb(ioaddr + 14);
408 for (card = 0; card < NUM_CARDS; ++card)
409 if (cards[card].id_offset14 == offset14)
411 if (card < NUM_CARDS) {/*yes, the first byte matches*/
412 char offset15 = inb(ioaddr + 15);
413 for (card = 0; card < NUM_CARDS; ++card)
414 if ((cards[card].id_offset14 == offset14) &&
415 (cards[card].id_offset15 == offset15))
418 if (card < NUM_CARDS) { /*Signature OK*/
419 result = lance_probe1(dev, ioaddr, 0, 0);
421 struct lance_private *lp = dev->priv;
422 int ver = lp->chip_version;
424 r->name = chip_table[ver].name;
428 release_region(ioaddr, LANCE_TOTAL_SIZE);
435 struct net_device * __init lance_probe(int unit)
437 struct net_device *dev = alloc_etherdev(0);
441 return ERR_PTR(-ENODEV);
443 sprintf(dev->name, "eth%d", unit);
444 netdev_boot_setup_check(dev);
446 err = do_lance_probe(dev);
456 static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int options)
458 struct lance_private *lp;
459 long dma_channels; /* Mark spuriously-busy DMA channels */
460 int i, reset_val, lance_version;
461 const char *chipname;
462 /* Flags for specific chips or boards. */
463 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
464 int hp_builtin = 0; /* HP on-board ethernet. */
465 static int did_version; /* Already printed version info. */
470 /* First we look for special cases.
471 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
472 There are two HP versions, check the BIOS for the configuration port.
473 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
475 bios = ioremap(0xf00f0, 0x14);
478 if (readw(bios + 0x12) == 0x5048) {
479 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
480 int hp_port = (readl(bios + 1) & 1) ? 0x499 : 0x99;
481 /* We can have boards other than the built-in! Verify this is on-board. */
482 if ((inb(hp_port) & 0xc0) == 0x80
483 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
484 hp_builtin = hp_port;
487 /* We also recognize the HP Vectra on-board here, but check below. */
488 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
489 && inb(ioaddr+2) == 0x09);
491 /* Reset the LANCE. */
492 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
494 /* The Un-Reset needed is only needed for the real NE2100, and will
495 confuse the HP board. */
497 outw(reset_val, ioaddr+LANCE_RESET);
499 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
500 if (inw(ioaddr+LANCE_DATA) != 0x0004)
503 /* Get the version of the chip. */
504 outw(88, ioaddr+LANCE_ADDR);
505 if (inw(ioaddr+LANCE_ADDR) != 88) {
507 } else { /* Good, it's a newer chip. */
508 int chip_version = inw(ioaddr+LANCE_DATA);
509 outw(89, ioaddr+LANCE_ADDR);
510 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
512 printk(" LANCE chip version is %#x.\n", chip_version);
513 if ((chip_version & 0xfff) != 0x003)
515 chip_version = (chip_version >> 12) & 0xffff;
516 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
517 if (chip_table[lance_version].id_number == chip_version)
522 /* We can't allocate dev->priv from alloc_etherdev() because it must
523 a ISA DMA-able region. */
524 SET_MODULE_OWNER(dev);
525 chipname = chip_table[lance_version].name;
526 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
528 /* There is a 16 byte station address PROM at the base address.
529 The first six bytes are the station address. */
530 for (i = 0; i < 6; i++)
531 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
533 dev->base_addr = ioaddr;
534 /* Make certain the data structures used by the LANCE are aligned and DMAble. */
536 lp = kmalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL);
539 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp);
540 memset(lp, 0, sizeof(*lp));
543 lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE,
544 GFP_DMA | GFP_KERNEL);
547 if (lance_need_isa_bounce_buffers) {
548 lp->tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE,
549 GFP_DMA | GFP_KERNEL);
550 if (!lp->tx_bounce_buffs)
553 lp->tx_bounce_buffs = NULL;
555 lp->chip_version = lance_version;
556 spin_lock_init(&lp->devlock);
558 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
559 for (i = 0; i < 6; i++)
560 lp->init_block.phys_addr[i] = dev->dev_addr[i];
561 lp->init_block.filter[0] = 0x00000000;
562 lp->init_block.filter[1] = 0x00000000;
563 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
564 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
566 outw(0x0001, ioaddr+LANCE_ADDR);
567 inw(ioaddr+LANCE_ADDR);
568 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
569 outw(0x0002, ioaddr+LANCE_ADDR);
570 inw(ioaddr+LANCE_ADDR);
571 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
572 outw(0x0000, ioaddr+LANCE_ADDR);
573 inw(ioaddr+LANCE_ADDR);
575 if (irq) { /* Set iff PCI card. */
576 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
578 } else if (hp_builtin) {
579 static const char dma_tbl[4] = {3, 5, 6, 0};
580 static const char irq_tbl[4] = {3, 4, 5, 9};
581 unsigned char port_val = inb(hp_builtin);
582 dev->dma = dma_tbl[(port_val >> 4) & 3];
583 dev->irq = irq_tbl[(port_val >> 2) & 3];
584 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
585 } else if (hpJ2405A) {
586 static const char dma_tbl[4] = {3, 5, 6, 7};
587 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
588 short reset_val = inw(ioaddr+LANCE_RESET);
589 dev->dma = dma_tbl[(reset_val >> 2) & 3];
590 dev->irq = irq_tbl[(reset_val >> 4) & 7];
591 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
592 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
594 outw(8, ioaddr+LANCE_ADDR);
595 bus_info = inw(ioaddr+LANCE_BUS_IF);
596 dev->dma = bus_info & 0x07;
597 dev->irq = (bus_info >> 4) & 0x0F;
599 /* The DMA channel may be passed in PARAM1. */
600 if (dev->mem_start & 0x07)
601 dev->dma = dev->mem_start & 0x07;
605 /* Read the DMA channel status register, so that we can avoid
606 stuck DMA channels in the DMA detection below. */
607 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
608 (inb(DMA2_STAT_REG) & 0xf0);
612 printk(" assigned IRQ %d", dev->irq);
613 else if (lance_version != 0) { /* 7990 boards need DMA detection first. */
614 unsigned long irq_mask;
616 /* To auto-IRQ we enable the initialization-done and DMA error
617 interrupts. For ISA boards we get a DMA error, but VLB and PCI
619 irq_mask = probe_irq_on();
621 /* Trigger an initialization just for the interrupt. */
622 outw(0x0041, ioaddr+LANCE_DATA);
625 dev->irq = probe_irq_off(irq_mask);
627 printk(", probed IRQ %d", dev->irq);
629 printk(", failed to detect IRQ line.\n");
633 /* Check for the initialization done bit, 0x0100, which means
634 that we don't need a DMA channel. */
635 if (inw(ioaddr+LANCE_DATA) & 0x0100)
640 printk(", no DMA needed.\n");
641 } else if (dev->dma) {
642 if (request_dma(dev->dma, chipname)) {
643 printk("DMA %d allocation failed.\n", dev->dma);
646 printk(", assigned DMA %d.\n", dev->dma);
647 } else { /* OK, we have to auto-DMA. */
648 for (i = 0; i < 4; i++) {
649 static const char dmas[] = { 5, 6, 7, 3 };
653 /* Don't enable a permanently busy DMA channel, or the machine
655 if (test_bit(dma, &dma_channels))
657 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
658 if (request_dma(dma, chipname))
661 flags=claim_dma_lock();
662 set_dma_mode(dma, DMA_MODE_CASCADE);
664 release_dma_lock(flags);
666 /* Trigger an initialization. */
667 outw(0x0001, ioaddr+LANCE_DATA);
668 for (boguscnt = 100; boguscnt > 0; --boguscnt)
669 if (inw(ioaddr+LANCE_DATA) & 0x0900)
671 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
673 printk(", DMA %d.\n", dev->dma);
676 flags=claim_dma_lock();
678 release_dma_lock(flags);
682 if (i == 4) { /* Failure: bail. */
683 printk("DMA detection failed.\n");
688 if (lance_version == 0 && dev->irq == 0) {
689 /* We may auto-IRQ now that we have a DMA channel. */
690 /* Trigger an initialization just for the interrupt. */
691 unsigned long irq_mask;
693 irq_mask = probe_irq_on();
694 outw(0x0041, ioaddr+LANCE_DATA);
697 dev->irq = probe_irq_off(irq_mask);
699 printk(" Failed to detect the 7990 IRQ line.\n");
702 printk(" Auto-IRQ detected IRQ%d.\n", dev->irq);
705 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
706 /* Turn on auto-select of media (10baseT or BNC) so that the user
707 can watch the LEDs even if the board isn't opened. */
708 outw(0x0002, ioaddr+LANCE_ADDR);
709 /* Don't touch 10base2 power bit. */
710 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
713 if (lance_debug > 0 && did_version++ == 0)
716 /* The LANCE-specific entries in the device structure. */
717 dev->open = lance_open;
718 dev->hard_start_xmit = lance_start_xmit;
719 dev->stop = lance_close;
720 dev->get_stats = lance_get_stats;
721 dev->set_multicast_list = set_multicast_list;
722 dev->tx_timeout = lance_tx_timeout;
723 dev->watchdog_timeo = TX_TIMEOUT;
725 err = register_netdev(dev);
733 kfree(lp->tx_bounce_buffs);
735 kfree((void*)lp->rx_buffs);
743 lance_open(struct net_device *dev)
745 struct lance_private *lp = dev->priv;
746 int ioaddr = dev->base_addr;
750 request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) {
754 /* We used to allocate DMA here, but that was silly.
755 DMA lines can't be shared! We now permanently allocate them. */
757 /* Reset the LANCE */
758 inw(ioaddr+LANCE_RESET);
760 /* The DMA controller is used as a no-operation slave, "cascade mode". */
762 unsigned long flags=claim_dma_lock();
763 enable_dma(dev->dma);
764 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
765 release_dma_lock(flags);
768 /* Un-Reset the LANCE, needed only for the NE2100. */
769 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
770 outw(0, ioaddr+LANCE_RESET);
772 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
773 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
774 outw(0x0002, ioaddr+LANCE_ADDR);
775 /* Only touch autoselect bit. */
776 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
780 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
781 dev->name, dev->irq, dev->dma,
782 (u32) isa_virt_to_bus(lp->tx_ring),
783 (u32) isa_virt_to_bus(lp->rx_ring),
784 (u32) isa_virt_to_bus(&lp->init_block));
786 lance_init_ring(dev, GFP_KERNEL);
787 /* Re-initialize the LANCE, and start it when done. */
788 outw(0x0001, ioaddr+LANCE_ADDR);
789 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
790 outw(0x0002, ioaddr+LANCE_ADDR);
791 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
793 outw(0x0004, ioaddr+LANCE_ADDR);
794 outw(0x0915, ioaddr+LANCE_DATA);
796 outw(0x0000, ioaddr+LANCE_ADDR);
797 outw(0x0001, ioaddr+LANCE_DATA);
799 netif_start_queue (dev);
803 if (inw(ioaddr+LANCE_DATA) & 0x0100)
806 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
807 * reports that doing so triggers a bug in the '974.
809 outw(0x0042, ioaddr+LANCE_DATA);
812 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
813 dev->name, i, (u32) isa_virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA));
815 return 0; /* Always succeed */
818 /* The LANCE has been halted for one reason or another (busmaster memory
819 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
820 etc.). Modern LANCE variants always reload their ring-buffer
821 configuration when restarted, so we must reinitialize our ring
822 context before restarting. As part of this reinitialization,
823 find all packets still on the Tx ring and pretend that they had been
824 sent (in effect, drop the packets on the floor) - the higher-level
825 protocols will time out and retransmit. It'd be better to shuffle
826 these skbs to a temp list and then actually re-Tx them after
827 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
831 lance_purge_ring(struct net_device *dev)
833 struct lance_private *lp = dev->priv;
836 /* Free all the skbuffs in the Rx and Tx queues. */
837 for (i = 0; i < RX_RING_SIZE; i++) {
838 struct sk_buff *skb = lp->rx_skbuff[i];
839 lp->rx_skbuff[i] = NULL;
840 lp->rx_ring[i].base = 0; /* Not owned by LANCE chip. */
842 dev_kfree_skb_any(skb);
844 for (i = 0; i < TX_RING_SIZE; i++) {
845 if (lp->tx_skbuff[i]) {
846 dev_kfree_skb_any(lp->tx_skbuff[i]);
847 lp->tx_skbuff[i] = NULL;
853 /* Initialize the LANCE Rx and Tx rings. */
855 lance_init_ring(struct net_device *dev, gfp_t gfp)
857 struct lance_private *lp = dev->priv;
860 lp->cur_rx = lp->cur_tx = 0;
861 lp->dirty_rx = lp->dirty_tx = 0;
863 for (i = 0; i < RX_RING_SIZE; i++) {
867 skb = alloc_skb(PKT_BUF_SZ, GFP_DMA | gfp);
868 lp->rx_skbuff[i] = skb;
873 rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp);
875 lp->rx_ring[i].base = 0;
877 lp->rx_ring[i].base = (u32)isa_virt_to_bus(rx_buff) | 0x80000000;
878 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
880 /* The Tx buffer address is filled in as needed, but we do need to clear
881 the upper ownership bit. */
882 for (i = 0; i < TX_RING_SIZE; i++) {
883 lp->tx_skbuff[i] = NULL;
884 lp->tx_ring[i].base = 0;
887 lp->init_block.mode = 0x0000;
888 for (i = 0; i < 6; i++)
889 lp->init_block.phys_addr[i] = dev->dev_addr[i];
890 lp->init_block.filter[0] = 0x00000000;
891 lp->init_block.filter[1] = 0x00000000;
892 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
893 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
897 lance_restart(struct net_device *dev, unsigned int csr0_bits, int must_reinit)
899 struct lance_private *lp = dev->priv;
902 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
903 lance_purge_ring(dev);
904 lance_init_ring(dev, GFP_ATOMIC);
906 outw(0x0000, dev->base_addr + LANCE_ADDR);
907 outw(csr0_bits, dev->base_addr + LANCE_DATA);
911 static void lance_tx_timeout (struct net_device *dev)
913 struct lance_private *lp = (struct lance_private *) dev->priv;
914 int ioaddr = dev->base_addr;
916 outw (0, ioaddr + LANCE_ADDR);
917 printk ("%s: transmit timed out, status %4.4x, resetting.\n",
918 dev->name, inw (ioaddr + LANCE_DATA));
919 outw (0x0004, ioaddr + LANCE_DATA);
920 lp->stats.tx_errors++;
921 #ifndef final_version
922 if (lance_debug > 3) {
924 printk (" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
925 lp->dirty_tx, lp->cur_tx, netif_queue_stopped(dev) ? " (full)" : "",
927 for (i = 0; i < RX_RING_SIZE; i++)
928 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
929 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
930 lp->rx_ring[i].msg_length);
931 for (i = 0; i < TX_RING_SIZE; i++)
932 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
933 lp->tx_ring[i].base, -lp->tx_ring[i].length,
934 lp->tx_ring[i].misc);
938 lance_restart (dev, 0x0043, 1);
940 dev->trans_start = jiffies;
941 netif_wake_queue (dev);
945 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
947 struct lance_private *lp = dev->priv;
948 int ioaddr = dev->base_addr;
952 spin_lock_irqsave(&lp->devlock, flags);
954 if (lance_debug > 3) {
955 outw(0x0000, ioaddr+LANCE_ADDR);
956 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
957 inw(ioaddr+LANCE_DATA));
958 outw(0x0000, ioaddr+LANCE_DATA);
961 /* Fill in a Tx ring entry */
963 /* Mask to ring buffer boundary. */
964 entry = lp->cur_tx & TX_RING_MOD_MASK;
966 /* Caution: the write order is important here, set the base address
967 with the "ownership" bits last. */
969 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
970 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
971 if (skb->len < ETH_ZLEN) {
972 if (skb_padto(skb, ETH_ZLEN))
974 lp->tx_ring[entry].length = -ETH_ZLEN;
977 lp->tx_ring[entry].length = -skb->len;
979 lp->tx_ring[entry].length = -skb->len;
981 lp->tx_ring[entry].misc = 0x0000;
983 lp->stats.tx_bytes += skb->len;
985 /* If any part of this buffer is >16M we must copy it to a low-memory
987 if ((u32)isa_virt_to_bus(skb->data) + skb->len > 0x01000000) {
989 printk("%s: bouncing a high-memory packet (%#x).\n",
990 dev->name, (u32)isa_virt_to_bus(skb->data));
991 skb_copy_from_linear_data(skb, &lp->tx_bounce_buffs[entry], skb->len);
992 lp->tx_ring[entry].base =
993 ((u32)isa_virt_to_bus((lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000;
996 lp->tx_skbuff[entry] = skb;
997 lp->tx_ring[entry].base = ((u32)isa_virt_to_bus(skb->data) & 0xffffff) | 0x83000000;
1001 /* Trigger an immediate send poll. */
1002 outw(0x0000, ioaddr+LANCE_ADDR);
1003 outw(0x0048, ioaddr+LANCE_DATA);
1005 dev->trans_start = jiffies;
1007 if ((lp->cur_tx - lp->dirty_tx) >= TX_RING_SIZE)
1008 netif_stop_queue(dev);
1011 spin_unlock_irqrestore(&lp->devlock, flags);
1015 /* The LANCE interrupt handler. */
1016 static irqreturn_t lance_interrupt(int irq, void *dev_id)
1018 struct net_device *dev = dev_id;
1019 struct lance_private *lp;
1020 int csr0, ioaddr, boguscnt=10;
1023 ioaddr = dev->base_addr;
1026 spin_lock (&lp->devlock);
1028 outw(0x00, dev->base_addr + LANCE_ADDR);
1029 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
1030 && --boguscnt >= 0) {
1031 /* Acknowledge all of the current interrupt sources ASAP. */
1032 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
1036 if (lance_debug > 5)
1037 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1038 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
1040 if (csr0 & 0x0400) /* Rx interrupt */
1043 if (csr0 & 0x0200) { /* Tx-done interrupt */
1044 int dirty_tx = lp->dirty_tx;
1046 while (dirty_tx < lp->cur_tx) {
1047 int entry = dirty_tx & TX_RING_MOD_MASK;
1048 int status = lp->tx_ring[entry].base;
1051 break; /* It still hasn't been Txed */
1053 lp->tx_ring[entry].base = 0;
1055 if (status & 0x40000000) {
1056 /* There was an major error, log it. */
1057 int err_status = lp->tx_ring[entry].misc;
1058 lp->stats.tx_errors++;
1059 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
1060 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
1061 if (err_status & 0x1000) lp->stats.tx_window_errors++;
1062 if (err_status & 0x4000) {
1063 /* Ackk! On FIFO errors the Tx unit is turned off! */
1064 lp->stats.tx_fifo_errors++;
1065 /* Remove this verbosity later! */
1066 printk("%s: Tx FIFO error! Status %4.4x.\n",
1068 /* Restart the chip. */
1072 if (status & 0x18000000)
1073 lp->stats.collisions++;
1074 lp->stats.tx_packets++;
1077 /* We must free the original skb if it's not a data-only copy
1078 in the bounce buffer. */
1079 if (lp->tx_skbuff[entry]) {
1080 dev_kfree_skb_irq(lp->tx_skbuff[entry]);
1081 lp->tx_skbuff[entry] = NULL;
1086 #ifndef final_version
1087 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
1088 printk("out-of-sync dirty pointer, %d vs. %d, full=%s.\n",
1089 dirty_tx, lp->cur_tx,
1090 netif_queue_stopped(dev) ? "yes" : "no");
1091 dirty_tx += TX_RING_SIZE;
1095 /* if the ring is no longer full, accept more packets */
1096 if (netif_queue_stopped(dev) &&
1097 dirty_tx > lp->cur_tx - TX_RING_SIZE + 2)
1098 netif_wake_queue (dev);
1100 lp->dirty_tx = dirty_tx;
1103 /* Log misc errors. */
1104 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1105 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
1106 if (csr0 & 0x0800) {
1107 printk("%s: Bus master arbitration failure, status %4.4x.\n",
1109 /* Restart the chip. */
1114 /* stop the chip to clear the error condition, then restart */
1115 outw(0x0000, dev->base_addr + LANCE_ADDR);
1116 outw(0x0004, dev->base_addr + LANCE_DATA);
1117 lance_restart(dev, 0x0002, 0);
1121 /* Clear any other interrupt, and set interrupt enable. */
1122 outw(0x0000, dev->base_addr + LANCE_ADDR);
1123 outw(0x7940, dev->base_addr + LANCE_DATA);
1125 if (lance_debug > 4)
1126 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
1127 dev->name, inw(ioaddr + LANCE_ADDR),
1128 inw(dev->base_addr + LANCE_DATA));
1130 spin_unlock (&lp->devlock);
1135 lance_rx(struct net_device *dev)
1137 struct lance_private *lp = dev->priv;
1138 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1141 /* If we own the next entry, it's a new packet. Send it up. */
1142 while (lp->rx_ring[entry].base >= 0) {
1143 int status = lp->rx_ring[entry].base >> 24;
1145 if (status != 0x03) { /* There was an error. */
1146 /* There is a tricky error noted by John Murphy,
1147 <murf@perftech.com> to Russ Nelson: Even with full-sized
1148 buffers it's possible for a jabber packet to use two
1149 buffers, with only the last correctly noting the error. */
1150 if (status & 0x01) /* Only count a general error at the */
1151 lp->stats.rx_errors++; /* end of a packet.*/
1152 if (status & 0x20) lp->stats.rx_frame_errors++;
1153 if (status & 0x10) lp->stats.rx_over_errors++;
1154 if (status & 0x08) lp->stats.rx_crc_errors++;
1155 if (status & 0x04) lp->stats.rx_fifo_errors++;
1156 lp->rx_ring[entry].base &= 0x03ffffff;
1160 /* Malloc up new buffer, compatible with net3. */
1161 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
1162 struct sk_buff *skb;
1166 printk("%s: Runt packet!\n",dev->name);
1167 lp->stats.rx_errors++;
1171 skb = dev_alloc_skb(pkt_len+2);
1174 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1175 for (i=0; i < RX_RING_SIZE; i++)
1176 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
1179 if (i > RX_RING_SIZE -2)
1181 lp->stats.rx_dropped++;
1182 lp->rx_ring[entry].base |= 0x80000000;
1187 skb_reserve(skb,2); /* 16 byte align */
1188 skb_put(skb,pkt_len); /* Make room */
1189 eth_copy_and_sum(skb,
1190 (unsigned char *)isa_bus_to_virt((lp->rx_ring[entry].base & 0x00ffffff)),
1192 skb->protocol=eth_type_trans(skb,dev);
1194 dev->last_rx = jiffies;
1195 lp->stats.rx_packets++;
1196 lp->stats.rx_bytes+=pkt_len;
1199 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1200 of QNX reports that some revs of the 79C965 clear it. */
1201 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1202 lp->rx_ring[entry].base |= 0x80000000;
1203 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1206 /* We should check that at least two ring entries are free. If not,
1207 we should free one and mark stats->rx_dropped++. */
1213 lance_close(struct net_device *dev)
1215 int ioaddr = dev->base_addr;
1216 struct lance_private *lp = dev->priv;
1218 netif_stop_queue (dev);
1220 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1221 outw(112, ioaddr+LANCE_ADDR);
1222 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1224 outw(0, ioaddr+LANCE_ADDR);
1226 if (lance_debug > 1)
1227 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1228 dev->name, inw(ioaddr+LANCE_DATA));
1230 /* We stop the LANCE here -- it occasionally polls
1231 memory if we don't. */
1232 outw(0x0004, ioaddr+LANCE_DATA);
1236 unsigned long flags=claim_dma_lock();
1237 disable_dma(dev->dma);
1238 release_dma_lock(flags);
1240 free_irq(dev->irq, dev);
1242 lance_purge_ring(dev);
1247 static struct net_device_stats *lance_get_stats(struct net_device *dev)
1249 struct lance_private *lp = dev->priv;
1251 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1252 short ioaddr = dev->base_addr;
1254 unsigned long flags;
1256 spin_lock_irqsave(&lp->devlock, flags);
1257 saved_addr = inw(ioaddr+LANCE_ADDR);
1258 outw(112, ioaddr+LANCE_ADDR);
1259 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1260 outw(saved_addr, ioaddr+LANCE_ADDR);
1261 spin_unlock_irqrestore(&lp->devlock, flags);
1267 /* Set or clear the multicast filter for this adaptor.
1270 static void set_multicast_list(struct net_device *dev)
1272 short ioaddr = dev->base_addr;
1274 outw(0, ioaddr+LANCE_ADDR);
1275 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1277 if (dev->flags&IFF_PROMISC) {
1278 outw(15, ioaddr+LANCE_ADDR);
1279 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1281 short multicast_table[4];
1283 int num_addrs=dev->mc_count;
1284 if(dev->flags&IFF_ALLMULTI)
1286 /* FIXIT: We don't use the multicast table, but rely on upper-layer filtering. */
1287 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1288 for (i = 0; i < 4; i++) {
1289 outw(8 + i, ioaddr+LANCE_ADDR);
1290 outw(multicast_table[i], ioaddr+LANCE_DATA);
1292 outw(15, ioaddr+LANCE_ADDR);
1293 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1296 lance_restart(dev, 0x0142, 0); /* Resume normal operation */