git.oblomov.eu Git - linux-2.6/blob - arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/module.h>
  24
  25 #include <asm/prom.h>
  26 #include <asm/of_device.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31
  32 static struct device_node *allnodes;
  33
  34 /* use when traversing tree through the allnext, child, sibling,
  35  * or parent members of struct device_node.
  36  */
  37 static DEFINE_RWLOCK(devtree_lock);
  38
  39 int of_device_is_compatible(const struct device_node *device,
  40                             const char *compat)
  41 {
  42         const char* cp;
  43         int cplen, l;
  44
  45         cp = of_get_property(device, "compatible", &cplen);
  46         if (cp == NULL)
  47                 return 0;
  48         while (cplen > 0) {
  49                 if (strncmp(cp, compat, strlen(compat)) == 0)
  50                         return 1;
  51                 l = strlen(cp) + 1;
  52                 cp += l;
  53                 cplen -= l;
  54         }
  55
  56         return 0;
  57 }
  58 EXPORT_SYMBOL(of_device_is_compatible);
  59
  60 struct device_node *of_get_parent(const struct device_node *node)
  61 {
  62         struct device_node *np;
  63
  64         if (!node)
  65                 return NULL;
  66
  67         np = node->parent;
  68
  69         return np;
  70 }
  71 EXPORT_SYMBOL(of_get_parent);
  72
  73 struct device_node *of_get_next_child(const struct device_node *node,
  74         struct device_node *prev)
  75 {
  76         struct device_node *next;
  77
  78         next = prev ? prev->sibling : node->child;
  79         for (; next != 0; next = next->sibling) {
  80                 break;
  81         }
  82
  83         return next;
  84 }
  85 EXPORT_SYMBOL(of_get_next_child);
  86
  87 struct device_node *of_find_node_by_path(const char *path)
  88 {
  89         struct device_node *np = allnodes;
  90
  91         for (; np != 0; np = np->allnext) {
  92                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
  93                         break;
  94         }
  95
  96         return np;
  97 }
  98 EXPORT_SYMBOL(of_find_node_by_path);
  99
 100 struct device_node *of_find_node_by_phandle(phandle handle)
 101 {
 102         struct device_node *np;
 103
 104         for (np = allnodes; np != 0; np = np->allnext)
 105                 if (np->node == handle)
 106                         break;
 107
 108         return np;
 109 }
 110 EXPORT_SYMBOL(of_find_node_by_phandle);
 111
 112 struct device_node *of_find_node_by_name(struct device_node *from,
 113         const char *name)
 114 {
 115         struct device_node *np;
 116
 117         np = from ? from->allnext : allnodes;
 118         for (; np != NULL; np = np->allnext)
 119                 if (np->name != NULL && strcmp(np->name, name) == 0)
 120                         break;
 121
 122         return np;
 123 }
 124 EXPORT_SYMBOL(of_find_node_by_name);
 125
 126 struct device_node *of_find_node_by_type(struct device_node *from,
 127         const char *type)
 128 {
 129         struct device_node *np;
 130
 131         np = from ? from->allnext : allnodes;
 132         for (; np != 0; np = np->allnext)
 133                 if (np->type != 0 && strcmp(np->type, type) == 0)
 134                         break;
 135
 136         return np;
 137 }
 138 EXPORT_SYMBOL(of_find_node_by_type);
 139
 140 struct device_node *of_find_compatible_node(struct device_node *from,
 141         const char *type, const char *compatible)
 142 {
 143         struct device_node *np;
 144
 145         np = from ? from->allnext : allnodes;
 146         for (; np != 0; np = np->allnext) {
 147                 if (type != NULL
 148                     && !(np->type != 0 && strcmp(np->type, type) == 0))
 149                         continue;
 150                 if (of_device_is_compatible(np, compatible))
 151                         break;
 152         }
 153
 154         return np;
 155 }
 156 EXPORT_SYMBOL(of_find_compatible_node);
 157
 158 struct property *of_find_property(const struct device_node *np,
 159                                   const char *name,
 160                                   int *lenp)
 161 {
 162         struct property *pp;
 163
 164         for (pp = np->properties; pp != 0; pp = pp->next) {
 165                 if (strcasecmp(pp->name, name) == 0) {
 166                         if (lenp != 0)
 167                                 *lenp = pp->length;
 168                         break;
 169                 }
 170         }
 171         return pp;
 172 }
 173 EXPORT_SYMBOL(of_find_property);
 174
 175 /*
 176  * Find a property with a given name for a given node
 177  * and return the value.
 178  */
 179 const void *of_get_property(const struct device_node *np, const char *name,
 180                       int *lenp)
 181 {
 182         struct property *pp = of_find_property(np,name,lenp);
 183         return pp ? pp->value : NULL;
 184 }
 185 EXPORT_SYMBOL(of_get_property);
 186
 187 int of_getintprop_default(struct device_node *np, const char *name, int def)
 188 {
 189         struct property *prop;
 190         int len;
 191
 192         prop = of_find_property(np, name, &len);
 193         if (!prop || len != 4)
 194                 return def;
 195
 196         return *(int *) prop->value;
 197 }
 198 EXPORT_SYMBOL(of_getintprop_default);
 199
 200 int of_n_addr_cells(struct device_node *np)
 201 {
 202         const int* ip;
 203         do {
 204                 if (np->parent)
 205                         np = np->parent;
 206                 ip = of_get_property(np, "#address-cells", NULL);
 207                 if (ip != NULL)
 208                         return *ip;
 209         } while (np->parent);
 210         /* No #address-cells property for the root node, default to 2 */
 211         return 2;
 212 }
 213 EXPORT_SYMBOL(of_n_addr_cells);
 214
 215 int of_n_size_cells(struct device_node *np)
 216 {
 217         const int* ip;
 218         do {
 219                 if (np->parent)
 220                         np = np->parent;
 221                 ip = of_get_property(np, "#size-cells", NULL);
 222                 if (ip != NULL)
 223                         return *ip;
 224         } while (np->parent);
 225         /* No #size-cells property for the root node, default to 1 */
 226         return 1;
 227 }
 228 EXPORT_SYMBOL(of_n_size_cells);
 229
 230 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
 231 {
 232         struct property **prevp;
 233         void *new_val;
 234         int err;
 235
 236         new_val = kmalloc(len, GFP_KERNEL);
 237         if (!new_val)
 238                 return -ENOMEM;
 239
 240         memcpy(new_val, val, len);
 241
 242         err = -ENODEV;
 243
 244         write_lock(&devtree_lock);
 245         prevp = &dp->properties;
 246         while (*prevp) {
 247                 struct property *prop = *prevp;
 248
 249                 if (!strcasecmp(prop->name, name)) {
 250                         void *old_val = prop->value;
 251                         int ret;
 252
 253                         ret = prom_setprop(dp->node, name, val, len);
 254                         err = -EINVAL;
 255                         if (ret >= 0) {
 256                                 prop->value = new_val;
 257                                 prop->length = len;
 258
 259                                 if (OF_IS_DYNAMIC(prop))
 260                                         kfree(old_val);
 261
 262                                 OF_MARK_DYNAMIC(prop);
 263
 264                                 err = 0;
 265                         }
 266                         break;
 267                 }
 268                 prevp = &(*prevp)->next;
 269         }
 270         write_unlock(&devtree_lock);
 271
 272         /* XXX Upate procfs if necessary... */
 273
 274         return err;
 275 }
 276 EXPORT_SYMBOL(of_set_property);
 277
 278 static unsigned int prom_early_allocated;
 279
 280 static void * __init prom_early_alloc(unsigned long size)
 281 {
 282         void *ret;
 283
 284         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
 285         if (ret != NULL)
 286                 memset(ret, 0, size);
 287
 288         prom_early_allocated += size;
 289
 290         return ret;
 291 }
 292
 293 #ifdef CONFIG_PCI
 294 /* PSYCHO interrupt mapping support. */
 295 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 296 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 297 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 298 {
 299         unsigned int bus =  (ino & 0x10) >> 4;
 300         unsigned int slot = (ino & 0x0c) >> 2;
 301
 302         if (bus == 0)
 303                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 304         else
 305                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 306 }
 307
 308 #define PSYCHO_IMAP_SCSI        0x1000UL
 309 #define PSYCHO_IMAP_ETH         0x1008UL
 310 #define PSYCHO_IMAP_BPP         0x1010UL
 311 #define PSYCHO_IMAP_AU_REC      0x1018UL
 312 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 313 #define PSYCHO_IMAP_PFAIL       0x1028UL
 314 #define PSYCHO_IMAP_KMS         0x1030UL
 315 #define PSYCHO_IMAP_FLPY        0x1038UL
 316 #define PSYCHO_IMAP_SHW         0x1040UL
 317 #define PSYCHO_IMAP_KBD         0x1048UL
 318 #define PSYCHO_IMAP_MS          0x1050UL
 319 #define PSYCHO_IMAP_SER         0x1058UL
 320 #define PSYCHO_IMAP_TIM0        0x1060UL
 321 #define PSYCHO_IMAP_TIM1        0x1068UL
 322 #define PSYCHO_IMAP_UE          0x1070UL
 323 #define PSYCHO_IMAP_CE          0x1078UL
 324 #define PSYCHO_IMAP_A_ERR       0x1080UL
 325 #define PSYCHO_IMAP_B_ERR       0x1088UL
 326 #define PSYCHO_IMAP_PMGMT       0x1090UL
 327 #define PSYCHO_IMAP_GFX         0x1098UL
 328 #define PSYCHO_IMAP_EUPA        0x10a0UL
 329
 330 static unsigned long __psycho_onboard_imap_off[] = {
 331 /*0x20*/        PSYCHO_IMAP_SCSI,
 332 /*0x21*/        PSYCHO_IMAP_ETH,
 333 /*0x22*/        PSYCHO_IMAP_BPP,
 334 /*0x23*/        PSYCHO_IMAP_AU_REC,
 335 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 336 /*0x25*/        PSYCHO_IMAP_PFAIL,
 337 /*0x26*/        PSYCHO_IMAP_KMS,
 338 /*0x27*/        PSYCHO_IMAP_FLPY,
 339 /*0x28*/        PSYCHO_IMAP_SHW,
 340 /*0x29*/        PSYCHO_IMAP_KBD,
 341 /*0x2a*/        PSYCHO_IMAP_MS,
 342 /*0x2b*/        PSYCHO_IMAP_SER,
 343 /*0x2c*/        PSYCHO_IMAP_TIM0,
 344 /*0x2d*/        PSYCHO_IMAP_TIM1,
 345 /*0x2e*/        PSYCHO_IMAP_UE,
 346 /*0x2f*/        PSYCHO_IMAP_CE,
 347 /*0x30*/        PSYCHO_IMAP_A_ERR,
 348 /*0x31*/        PSYCHO_IMAP_B_ERR,
 349 /*0x32*/        PSYCHO_IMAP_PMGMT,
 350 /*0x33*/        PSYCHO_IMAP_GFX,
 351 /*0x34*/        PSYCHO_IMAP_EUPA,
 352 };
 353 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 354 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 355 #define psycho_onboard_imap_offset(__ino) \
 356         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 357
 358 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 359 #define PSYCHO_ICLR_SCSI        0x1800UL
 360
 361 #define psycho_iclr_offset(ino)                                       \
 362         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 363                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 364
 365 static unsigned int psycho_irq_build(struct device_node *dp,
 366                                      unsigned int ino,
 367                                      void *_data)
 368 {
 369         unsigned long controller_regs = (unsigned long) _data;
 370         unsigned long imap, iclr;
 371         unsigned long imap_off, iclr_off;
 372         int inofixup = 0;
 373
 374         ino &= 0x3f;
 375         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 376                 /* PCI slot */
 377                 imap_off = psycho_pcislot_imap_offset(ino);
 378         } else {
 379                 /* Onboard device */
 380                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 381                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 382                         prom_halt();
 383                 }
 384                 imap_off = psycho_onboard_imap_offset(ino);
 385         }
 386
 387         /* Now build the IRQ bucket. */
 388         imap = controller_regs + imap_off;
 389
 390         iclr_off = psycho_iclr_offset(ino);
 391         iclr = controller_regs + iclr_off;
 392
 393         if ((ino & 0x20) == 0)
 394                 inofixup = ino & 0x03;
 395
 396         return build_irq(inofixup, iclr, imap);
 397 }
 398
 399 static void __init psycho_irq_trans_init(struct device_node *dp)
 400 {
 401         const struct linux_prom64_registers *regs;
 402
 403         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 404         dp->irq_trans->irq_build = psycho_irq_build;
 405
 406         regs = of_get_property(dp, "reg", NULL);
 407         dp->irq_trans->data = (void *) regs[2].phys_addr;
 408 }
 409
 410 #define sabre_read(__reg) \
 411 ({      u64 __ret; \
 412         __asm__ __volatile__("ldxa [%1] %2, %0" \
 413                              : "=r" (__ret) \
 414                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 415                              : "memory"); \
 416         __ret; \
 417 })
 418
 419 struct sabre_irq_data {
 420         unsigned long controller_regs;
 421         unsigned int pci_first_busno;
 422 };
 423 #define SABRE_CONFIGSPACE       0x001000000UL
 424 #define SABRE_WRSYNC            0x1c20UL
 425
 426 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 427         (CONFIG_SPACE | (1UL << 24))
 428 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 429         (((unsigned long)(BUS)   << 16) |       \
 430          ((unsigned long)(DEVFN) << 8)  |       \
 431          ((unsigned long)(REG)))
 432
 433 /* When a device lives behind a bridge deeper in the PCI bus topology
 434  * than APB, a special sequence must run to make sure all pending DMA
 435  * transfers at the time of IRQ delivery are visible in the coherency
 436  * domain by the cpu.  This sequence is to perform a read on the far
 437  * side of the non-APB bridge, then perform a read of Sabre's DMA
 438  * write-sync register.
 439  */
 440 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 441 {
 442         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 443         struct sabre_irq_data *irq_data = _arg2;
 444         unsigned long controller_regs = irq_data->controller_regs;
 445         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 446         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 447         unsigned int bus, devfn;
 448         u16 _unused;
 449
 450         config_space = SABRE_CONFIG_BASE(config_space);
 451
 452         bus = (phys_hi >> 16) & 0xff;
 453         devfn = (phys_hi >> 8) & 0xff;
 454
 455         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 456
 457         __asm__ __volatile__("membar #Sync\n\t"
 458                              "lduha [%1] %2, %0\n\t"
 459                              "membar #Sync"
 460                              : "=r" (_unused)
 461                              : "r" ((u16 *) config_space),
 462                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 463                              : "memory");
 464
 465         sabre_read(sync_reg);
 466 }
 467
 468 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 469 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 470 #define SABRE_IMAP_SCSI         0x1000UL
 471 #define SABRE_IMAP_ETH          0x1008UL
 472 #define SABRE_IMAP_BPP          0x1010UL
 473 #define SABRE_IMAP_AU_REC       0x1018UL
 474 #define SABRE_IMAP_AU_PLAY      0x1020UL
 475 #define SABRE_IMAP_PFAIL        0x1028UL
 476 #define SABRE_IMAP_KMS          0x1030UL
 477 #define SABRE_IMAP_FLPY         0x1038UL
 478 #define SABRE_IMAP_SHW          0x1040UL
 479 #define SABRE_IMAP_KBD          0x1048UL
 480 #define SABRE_IMAP_MS           0x1050UL
 481 #define SABRE_IMAP_SER          0x1058UL
 482 #define SABRE_IMAP_UE           0x1070UL
 483 #define SABRE_IMAP_CE           0x1078UL
 484 #define SABRE_IMAP_PCIERR       0x1080UL
 485 #define SABRE_IMAP_GFX          0x1098UL
 486 #define SABRE_IMAP_EUPA         0x10a0UL
 487 #define SABRE_ICLR_A_SLOT0      0x1400UL
 488 #define SABRE_ICLR_B_SLOT0      0x1480UL
 489 #define SABRE_ICLR_SCSI         0x1800UL
 490 #define SABRE_ICLR_ETH          0x1808UL
 491 #define SABRE_ICLR_BPP          0x1810UL
 492 #define SABRE_ICLR_AU_REC       0x1818UL
 493 #define SABRE_ICLR_AU_PLAY      0x1820UL
 494 #define SABRE_ICLR_PFAIL        0x1828UL
 495 #define SABRE_ICLR_KMS          0x1830UL
 496 #define SABRE_ICLR_FLPY         0x1838UL
 497 #define SABRE_ICLR_SHW          0x1840UL
 498 #define SABRE_ICLR_KBD          0x1848UL
 499 #define SABRE_ICLR_MS           0x1850UL
 500 #define SABRE_ICLR_SER          0x1858UL
 501 #define SABRE_ICLR_UE           0x1870UL
 502 #define SABRE_ICLR_CE           0x1878UL
 503 #define SABRE_ICLR_PCIERR       0x1880UL
 504
 505 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 506 {
 507         unsigned int bus =  (ino & 0x10) >> 4;
 508         unsigned int slot = (ino & 0x0c) >> 2;
 509
 510         if (bus == 0)
 511                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 512         else
 513                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 514 }
 515
 516 static unsigned long __sabre_onboard_imap_off[] = {
 517 /*0x20*/        SABRE_IMAP_SCSI,
 518 /*0x21*/        SABRE_IMAP_ETH,
 519 /*0x22*/        SABRE_IMAP_BPP,
 520 /*0x23*/        SABRE_IMAP_AU_REC,
 521 /*0x24*/        SABRE_IMAP_AU_PLAY,
 522 /*0x25*/        SABRE_IMAP_PFAIL,
 523 /*0x26*/        SABRE_IMAP_KMS,
 524 /*0x27*/        SABRE_IMAP_FLPY,
 525 /*0x28*/        SABRE_IMAP_SHW,
 526 /*0x29*/        SABRE_IMAP_KBD,
 527 /*0x2a*/        SABRE_IMAP_MS,
 528 /*0x2b*/        SABRE_IMAP_SER,
 529 /*0x2c*/        0 /* reserved */,
 530 /*0x2d*/        0 /* reserved */,
 531 /*0x2e*/        SABRE_IMAP_UE,
 532 /*0x2f*/        SABRE_IMAP_CE,
 533 /*0x30*/        SABRE_IMAP_PCIERR,
 534 /*0x31*/        0 /* reserved */,
 535 /*0x32*/        0 /* reserved */,
 536 /*0x33*/        SABRE_IMAP_GFX,
 537 /*0x34*/        SABRE_IMAP_EUPA,
 538 };
 539 #define SABRE_ONBOARD_IRQ_BASE          0x20
 540 #define SABRE_ONBOARD_IRQ_LAST          0x30
 541 #define sabre_onboard_imap_offset(__ino) \
 542         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 543
 544 #define sabre_iclr_offset(ino)                                        \
 545         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 546                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 547
 548 static int sabre_device_needs_wsync(struct device_node *dp)
 549 {
 550         struct device_node *parent = dp->parent;
 551         const char *parent_model, *parent_compat;
 552
 553         /* This traversal up towards the root is meant to
 554          * handle two cases:
 555          *
 556          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 557          * 2) the PCI controller interrupts themselves, which
 558          *    will use the sabre_irq_build but do not need
 559          *    the DMA synchronization handling
 560          */
 561         while (parent) {
 562                 if (!strcmp(parent->type, "pci"))
 563                         break;
 564                 parent = parent->parent;
 565         }
 566
 567         if (!parent)
 568                 return 0;
 569
 570         parent_model = of_get_property(parent,
 571                                        "model", NULL);
 572         if (parent_model &&
 573             (!strcmp(parent_model, "SUNW,sabre") ||
 574              !strcmp(parent_model, "SUNW,simba")))
 575                 return 0;
 576
 577         parent_compat = of_get_property(parent,
 578                                         "compatible", NULL);
 579         if (parent_compat &&
 580             (!strcmp(parent_compat, "pci108e,a000") ||
 581              !strcmp(parent_compat, "pci108e,a001")))
 582                 return 0;
 583
 584         return 1;
 585 }
 586
 587 static unsigned int sabre_irq_build(struct device_node *dp,
 588                                     unsigned int ino,
 589                                     void *_data)
 590 {
 591         struct sabre_irq_data *irq_data = _data;
 592         unsigned long controller_regs = irq_data->controller_regs;
 593         const struct linux_prom_pci_registers *regs;
 594         unsigned long imap, iclr;
 595         unsigned long imap_off, iclr_off;
 596         int inofixup = 0;
 597         int virt_irq;
 598
 599         ino &= 0x3f;
 600         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 601                 /* PCI slot */
 602                 imap_off = sabre_pcislot_imap_offset(ino);
 603         } else {
 604                 /* onboard device */
 605                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 606                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 607                         prom_halt();
 608                 }
 609                 imap_off = sabre_onboard_imap_offset(ino);
 610         }
 611
 612         /* Now build the IRQ bucket. */
 613         imap = controller_regs + imap_off;
 614
 615         iclr_off = sabre_iclr_offset(ino);
 616         iclr = controller_regs + iclr_off;
 617
 618         if ((ino & 0x20) == 0)
 619                 inofixup = ino & 0x03;
 620
 621         virt_irq = build_irq(inofixup, iclr, imap);
 622
 623         /* If the parent device is a PCI<->PCI bridge other than
 624          * APB, we have to install a pre-handler to ensure that
 625          * all pending DMA is drained before the interrupt handler
 626          * is run.
 627          */
 628         regs = of_get_property(dp, "reg", NULL);
 629         if (regs && sabre_device_needs_wsync(dp)) {
 630                 irq_install_pre_handler(virt_irq,
 631                                         sabre_wsync_handler,
 632                                         (void *) (long) regs->phys_hi,
 633                                         (void *) irq_data);
 634         }
 635
 636         return virt_irq;
 637 }
 638
 639 static void __init sabre_irq_trans_init(struct device_node *dp)
 640 {
 641         const struct linux_prom64_registers *regs;
 642         struct sabre_irq_data *irq_data;
 643         const u32 *busrange;
 644
 645         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 646         dp->irq_trans->irq_build = sabre_irq_build;
 647
 648         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 649
 650         regs = of_get_property(dp, "reg", NULL);
 651         irq_data->controller_regs = regs[0].phys_addr;
 652
 653         busrange = of_get_property(dp, "bus-range", NULL);
 654         irq_data->pci_first_busno = busrange[0];
 655
 656         dp->irq_trans->data = irq_data;
 657 }
 658
 659 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 660  * imap/iclr registers are per-PBM.
 661  */
 662 #define SCHIZO_IMAP_BASE        0x1000UL
 663 #define SCHIZO_ICLR_BASE        0x1400UL
 664
 665 static unsigned long schizo_imap_offset(unsigned long ino)
 666 {
 667         return SCHIZO_IMAP_BASE + (ino * 8UL);
 668 }
 669
 670 static unsigned long schizo_iclr_offset(unsigned long ino)
 671 {
 672         return SCHIZO_ICLR_BASE + (ino * 8UL);
 673 }
 674
 675 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 676                                         unsigned int ino)
 677 {
 678
 679         return pbm_regs + schizo_iclr_offset(ino);
 680 }
 681
 682 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 683                                         unsigned int ino)
 684 {
 685         return pbm_regs + schizo_imap_offset(ino);
 686 }
 687
 688 #define schizo_read(__reg) \
 689 ({      u64 __ret; \
 690         __asm__ __volatile__("ldxa [%1] %2, %0" \
 691                              : "=r" (__ret) \
 692                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 693                              : "memory"); \
 694         __ret; \
 695 })
 696 #define schizo_write(__reg, __val) \
 697         __asm__ __volatile__("stxa %0, [%1] %2" \
 698                              : /* no outputs */ \
 699                              : "r" (__val), "r" (__reg), \
 700                                "i" (ASI_PHYS_BYPASS_EC_E) \
 701                              : "memory")
 702
 703 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 704 {
 705         unsigned long sync_reg = (unsigned long) _arg2;
 706         u64 mask = 1UL << (ino & IMAP_INO);
 707         u64 val;
 708         int limit;
 709
 710         schizo_write(sync_reg, mask);
 711
 712         limit = 100000;
 713         val = 0;
 714         while (--limit) {
 715                 val = schizo_read(sync_reg);
 716                 if (!(val & mask))
 717                         break;
 718         }
 719         if (limit <= 0) {
 720                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 721                        val, mask);
 722         }
 723
 724         if (_arg1) {
 725                 static unsigned char cacheline[64]
 726                         __attribute__ ((aligned (64)));
 727
 728                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 729                                      "or %0, %4, %1\n\t"
 730                                      "wr %1, 0x0, %%fprs\n\t"
 731                                      "stda %%f0, [%5] %6\n\t"
 732                                      "wr %0, 0x0, %%fprs\n\t"
 733                                      "membar #Sync"
 734                                      : "=&r" (mask), "=&r" (val)
 735                                      : "0" (mask), "1" (val),
 736                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 737                                      "i" (ASI_BLK_COMMIT_P));
 738         }
 739 }
 740
 741 struct schizo_irq_data {
 742         unsigned long pbm_regs;
 743         unsigned long sync_reg;
 744         u32 portid;
 745         int chip_version;
 746 };
 747
 748 static unsigned int schizo_irq_build(struct device_node *dp,
 749                                      unsigned int ino,
 750                                      void *_data)
 751 {
 752         struct schizo_irq_data *irq_data = _data;
 753         unsigned long pbm_regs = irq_data->pbm_regs;
 754         unsigned long imap, iclr;
 755         int ign_fixup;
 756         int virt_irq;
 757         int is_tomatillo;
 758
 759         ino &= 0x3f;
 760
 761         /* Now build the IRQ bucket. */
 762         imap = schizo_ino_to_imap(pbm_regs, ino);
 763         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 764
 765         /* On Schizo, no inofixup occurs.  This is because each
 766          * INO has it's own IMAP register.  On Psycho and Sabre
 767          * there is only one IMAP register for each PCI slot even
 768          * though four different INOs can be generated by each
 769          * PCI slot.
 770          *
 771          * But, for JBUS variants (essentially, Tomatillo), we have
 772          * to fixup the lowest bit of the interrupt group number.
 773          */
 774         ign_fixup = 0;
 775
 776         is_tomatillo = (irq_data->sync_reg != 0UL);
 777
 778         if (is_tomatillo) {
 779                 if (irq_data->portid & 1)
 780                         ign_fixup = (1 << 6);
 781         }
 782
 783         virt_irq = build_irq(ign_fixup, iclr, imap);
 784
 785         if (is_tomatillo) {
 786                 irq_install_pre_handler(virt_irq,
 787                                         tomatillo_wsync_handler,
 788                                         ((irq_data->chip_version <= 4) ?
 789                                          (void *) 1 : (void *) 0),
 790                                         (void *) irq_data->sync_reg);
 791         }
 792
 793         return virt_irq;
 794 }
 795
 796 static void __init __schizo_irq_trans_init(struct device_node *dp,
 797                                            int is_tomatillo)
 798 {
 799         const struct linux_prom64_registers *regs;
 800         struct schizo_irq_data *irq_data;
 801
 802         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 803         dp->irq_trans->irq_build = schizo_irq_build;
 804
 805         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 806
 807         regs = of_get_property(dp, "reg", NULL);
 808         dp->irq_trans->data = irq_data;
 809
 810         irq_data->pbm_regs = regs[0].phys_addr;
 811         if (is_tomatillo)
 812                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 813         else
 814                 irq_data->sync_reg = 0UL;
 815         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 816         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 817 }
 818
 819 static void __init schizo_irq_trans_init(struct device_node *dp)
 820 {
 821         __schizo_irq_trans_init(dp, 0);
 822 }
 823
 824 static void __init tomatillo_irq_trans_init(struct device_node *dp)
 825 {
 826         __schizo_irq_trans_init(dp, 1);
 827 }
 828
 829 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 830                                         unsigned int devino,
 831                                         void *_data)
 832 {
 833         u32 devhandle = (u32) (unsigned long) _data;
 834
 835         return sun4v_build_irq(devhandle, devino);
 836 }
 837
 838 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
 839 {
 840         const struct linux_prom64_registers *regs;
 841
 842         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 843         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 844
 845         regs = of_get_property(dp, "reg", NULL);
 846         dp->irq_trans->data = (void *) (unsigned long)
 847                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 848 }
 849
 850 struct fire_irq_data {
 851         unsigned long pbm_regs;
 852         u32 portid;
 853 };
 854
 855 #define FIRE_IMAP_BASE  0x001000
 856 #define FIRE_ICLR_BASE  0x001400
 857
 858 static unsigned long fire_imap_offset(unsigned long ino)
 859 {
 860         return FIRE_IMAP_BASE + (ino * 8UL);
 861 }
 862
 863 static unsigned long fire_iclr_offset(unsigned long ino)
 864 {
 865         return FIRE_ICLR_BASE + (ino * 8UL);
 866 }
 867
 868 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
 869                                             unsigned int ino)
 870 {
 871         return pbm_regs + fire_iclr_offset(ino);
 872 }
 873
 874 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
 875                                             unsigned int ino)
 876 {
 877         return pbm_regs + fire_imap_offset(ino);
 878 }
 879
 880 static unsigned int fire_irq_build(struct device_node *dp,
 881                                          unsigned int ino,
 882                                          void *_data)
 883 {
 884         struct fire_irq_data *irq_data = _data;
 885         unsigned long pbm_regs = irq_data->pbm_regs;
 886         unsigned long imap, iclr;
 887         unsigned long int_ctrlr;
 888
 889         ino &= 0x3f;
 890
 891         /* Now build the IRQ bucket. */
 892         imap = fire_ino_to_imap(pbm_regs, ino);
 893         iclr = fire_ino_to_iclr(pbm_regs, ino);
 894
 895         /* Set the interrupt controller number.  */
 896         int_ctrlr = 1 << 6;
 897         upa_writeq(int_ctrlr, imap);
 898
 899         /* The interrupt map registers do not have an INO field
 900          * like other chips do.  They return zero in the INO
 901          * field, and the interrupt controller number is controlled
 902          * in bits 6 thru 9.  So in order for build_irq() to get
 903          * the INO right we pass it in as part of the fixup
 904          * which will get added to the map register zero value
 905          * read by build_irq().
 906          */
 907         ino |= (irq_data->portid << 6);
 908         ino -= int_ctrlr;
 909         return build_irq(ino, iclr, imap);
 910 }
 911
 912 static void __init fire_irq_trans_init(struct device_node *dp)
 913 {
 914         const struct linux_prom64_registers *regs;
 915         struct fire_irq_data *irq_data;
 916
 917         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 918         dp->irq_trans->irq_build = fire_irq_build;
 919
 920         irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
 921
 922         regs = of_get_property(dp, "reg", NULL);
 923         dp->irq_trans->data = irq_data;
 924
 925         irq_data->pbm_regs = regs[0].phys_addr;
 926         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 927 }
 928 #endif /* CONFIG_PCI */
 929
 930 #ifdef CONFIG_SBUS
 931 /* INO number to IMAP register offset for SYSIO external IRQ's.
 932  * This should conform to both Sunfire/Wildfire server and Fusion
 933  * desktop designs.
 934  */
 935 #define SYSIO_IMAP_SLOT0        0x2c04UL
 936 #define SYSIO_IMAP_SLOT1        0x2c0cUL
 937 #define SYSIO_IMAP_SLOT2        0x2c14UL
 938 #define SYSIO_IMAP_SLOT3        0x2c1cUL
 939 #define SYSIO_IMAP_SCSI         0x3004UL
 940 #define SYSIO_IMAP_ETH          0x300cUL
 941 #define SYSIO_IMAP_BPP          0x3014UL
 942 #define SYSIO_IMAP_AUDIO        0x301cUL
 943 #define SYSIO_IMAP_PFAIL        0x3024UL
 944 #define SYSIO_IMAP_KMS          0x302cUL
 945 #define SYSIO_IMAP_FLPY         0x3034UL
 946 #define SYSIO_IMAP_SHW          0x303cUL
 947 #define SYSIO_IMAP_KBD          0x3044UL
 948 #define SYSIO_IMAP_MS           0x304cUL
 949 #define SYSIO_IMAP_SER          0x3054UL
 950 #define SYSIO_IMAP_TIM0         0x3064UL
 951 #define SYSIO_IMAP_TIM1         0x306cUL
 952 #define SYSIO_IMAP_UE           0x3074UL
 953 #define SYSIO_IMAP_CE           0x307cUL
 954 #define SYSIO_IMAP_SBERR        0x3084UL
 955 #define SYSIO_IMAP_PMGMT        0x308cUL
 956 #define SYSIO_IMAP_GFX          0x3094UL
 957 #define SYSIO_IMAP_EUPA         0x309cUL
 958
 959 #define bogon     ((unsigned long) -1)
 960 static unsigned long sysio_irq_offsets[] = {
 961         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 962         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 963         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 964         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 965         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 966         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 967         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 968         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 969         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 970
 971         /* Onboard devices (not relevant/used on SunFire). */
 972         SYSIO_IMAP_SCSI,
 973         SYSIO_IMAP_ETH,
 974         SYSIO_IMAP_BPP,
 975         bogon,
 976         SYSIO_IMAP_AUDIO,
 977         SYSIO_IMAP_PFAIL,
 978         bogon,
 979         bogon,
 980         SYSIO_IMAP_KMS,
 981         SYSIO_IMAP_FLPY,
 982         SYSIO_IMAP_SHW,
 983         SYSIO_IMAP_KBD,
 984         SYSIO_IMAP_MS,
 985         SYSIO_IMAP_SER,
 986         bogon,
 987         bogon,
 988         SYSIO_IMAP_TIM0,
 989         SYSIO_IMAP_TIM1,
 990         bogon,
 991         bogon,
 992         SYSIO_IMAP_UE,
 993         SYSIO_IMAP_CE,
 994         SYSIO_IMAP_SBERR,
 995         SYSIO_IMAP_PMGMT,
 996         SYSIO_IMAP_GFX,
 997         SYSIO_IMAP_EUPA,
 998 };
 999
1000 #undef bogon
1001
1002 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
1003
1004 /* Convert Interrupt Mapping register pointer to associated
1005  * Interrupt Clear register pointer, SYSIO specific version.
1006  */
1007 #define SYSIO_ICLR_UNUSED0      0x3400UL
1008 #define SYSIO_ICLR_SLOT0        0x340cUL
1009 #define SYSIO_ICLR_SLOT1        0x344cUL
1010 #define SYSIO_ICLR_SLOT2        0x348cUL
1011 #define SYSIO_ICLR_SLOT3        0x34ccUL
1012 static unsigned long sysio_imap_to_iclr(unsigned long imap)
1013 {
1014         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
1015         return imap + diff;
1016 }
1017
1018 static unsigned int sbus_of_build_irq(struct device_node *dp,
1019                                       unsigned int ino,
1020                                       void *_data)
1021 {
1022         unsigned long reg_base = (unsigned long) _data;
1023         const struct linux_prom_registers *regs;
1024         unsigned long imap, iclr;
1025         int sbus_slot = 0;
1026         int sbus_level = 0;
1027
1028         ino &= 0x3f;
1029
1030         regs = of_get_property(dp, "reg", NULL);
1031         if (regs)
1032                 sbus_slot = regs->which_io;
1033
1034         if (ino < 0x20)
1035                 ino += (sbus_slot * 8);
1036
1037         imap = sysio_irq_offsets[ino];
1038         if (imap == ((unsigned long)-1)) {
1039                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
1040                             ino);
1041                 prom_halt();
1042         }
1043         imap += reg_base;
1044
1045         /* SYSIO inconsistency.  For external SLOTS, we have to select
1046          * the right ICLR register based upon the lower SBUS irq level
1047          * bits.
1048          */
1049         if (ino >= 0x20) {
1050                 iclr = sysio_imap_to_iclr(imap);
1051         } else {
1052                 sbus_level = ino & 0x7;
1053
1054                 switch(sbus_slot) {
1055                 case 0:
1056                         iclr = reg_base + SYSIO_ICLR_SLOT0;
1057                         break;
1058                 case 1:
1059                         iclr = reg_base + SYSIO_ICLR_SLOT1;
1060                         break;
1061                 case 2:
1062                         iclr = reg_base + SYSIO_ICLR_SLOT2;
1063                         break;
1064                 default:
1065                 case 3:
1066                         iclr = reg_base + SYSIO_ICLR_SLOT3;
1067                         break;
1068                 };
1069
1070                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
1071         }
1072         return build_irq(sbus_level, iclr, imap);
1073 }
1074
1075 static void __init sbus_irq_trans_init(struct device_node *dp)
1076 {
1077         const struct linux_prom64_registers *regs;
1078
1079         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1080         dp->irq_trans->irq_build = sbus_of_build_irq;
1081
1082         regs = of_get_property(dp, "reg", NULL);
1083         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
1084 }
1085 #endif /* CONFIG_SBUS */
1086
1087
1088 static unsigned int central_build_irq(struct device_node *dp,
1089                                       unsigned int ino,
1090                                       void *_data)
1091 {
1092         struct device_node *central_dp = _data;
1093         struct of_device *central_op = of_find_device_by_node(central_dp);
1094         struct resource *res;
1095         unsigned long imap, iclr;
1096         u32 tmp;
1097
1098         if (!strcmp(dp->name, "eeprom")) {
1099                 res = &central_op->resource[5];
1100         } else if (!strcmp(dp->name, "zs")) {
1101                 res = &central_op->resource[4];
1102         } else if (!strcmp(dp->name, "clock-board")) {
1103                 res = &central_op->resource[3];
1104         } else {
1105                 return ino;
1106         }
1107
1108         imap = res->start + 0x00UL;
1109         iclr = res->start + 0x10UL;
1110
1111         /* Set the INO state to idle, and disable.  */
1112         upa_writel(0, iclr);
1113         upa_readl(iclr);
1114
1115         tmp = upa_readl(imap);
1116         tmp &= ~0x80000000;
1117         upa_writel(tmp, imap);
1118
1119         return build_irq(0, iclr, imap);
1120 }
1121
1122 static void __init central_irq_trans_init(struct device_node *dp)
1123 {
1124         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1125         dp->irq_trans->irq_build = central_build_irq;
1126
1127         dp->irq_trans->data = dp;
1128 }
1129
1130 struct irq_trans {
1131         const char *name;
1132         void (*init)(struct device_node *);
1133 };
1134
1135 #ifdef CONFIG_PCI
1136 static struct irq_trans __initdata pci_irq_trans_table[] = {
1137         { "SUNW,sabre", sabre_irq_trans_init },
1138         { "pci108e,a000", sabre_irq_trans_init },
1139         { "pci108e,a001", sabre_irq_trans_init },
1140         { "SUNW,psycho", psycho_irq_trans_init },
1141         { "pci108e,8000", psycho_irq_trans_init },
1142         { "SUNW,schizo", schizo_irq_trans_init },
1143         { "pci108e,8001", schizo_irq_trans_init },
1144         { "SUNW,schizo+", schizo_irq_trans_init },
1145         { "pci108e,8002", schizo_irq_trans_init },
1146         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1147         { "pci108e,a801", tomatillo_irq_trans_init },
1148         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1149         { "pciex108e,80f0", fire_irq_trans_init },
1150 };
1151 #endif
1152
1153 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1154                                          unsigned int devino,
1155                                          void *_data)
1156 {
1157         u32 devhandle = (u32) (unsigned long) _data;
1158
1159         return sun4v_build_irq(devhandle, devino);
1160 }
1161
1162 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
1163 {
1164         const struct linux_prom64_registers *regs;
1165
1166         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1167         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1168
1169         regs = of_get_property(dp, "reg", NULL);
1170         dp->irq_trans->data = (void *) (unsigned long)
1171                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1172 }
1173
1174 static void __init irq_trans_init(struct device_node *dp)
1175 {
1176 #ifdef CONFIG_PCI
1177         const char *model;
1178         int i;
1179 #endif
1180
1181 #ifdef CONFIG_PCI
1182         model = of_get_property(dp, "model", NULL);
1183         if (!model)
1184                 model = of_get_property(dp, "compatible", NULL);
1185         if (model) {
1186                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1187                         struct irq_trans *t = &pci_irq_trans_table[i];
1188
1189                         if (!strcmp(model, t->name))
1190                                 return t->init(dp);
1191                 }
1192         }
1193 #endif
1194 #ifdef CONFIG_SBUS
1195         if (!strcmp(dp->name, "sbus") ||
1196             !strcmp(dp->name, "sbi"))
1197                 return sbus_irq_trans_init(dp);
1198 #endif
1199         if (!strcmp(dp->name, "fhc") &&
1200             !strcmp(dp->parent->name, "central"))
1201                 return central_irq_trans_init(dp);
1202         if (!strcmp(dp->name, "virtual-devices"))
1203                 return sun4v_vdev_irq_trans_init(dp);
1204 }
1205
1206 static int is_root_node(const struct device_node *dp)
1207 {
1208         if (!dp)
1209                 return 0;
1210
1211         return (dp->parent == NULL);
1212 }
1213
1214 /* The following routines deal with the black magic of fully naming a
1215  * node.
1216  *
1217  * Certain well known named nodes are just the simple name string.
1218  *
1219  * Actual devices have an address specifier appended to the base name
1220  * string, like this "foo@addr".  The "addr" can be in any number of
1221  * formats, and the platform plus the type of the node determine the
1222  * format and how it is constructed.
1223  *
1224  * For children of the ROOT node, the naming convention is fixed and
1225  * determined by whether this is a sun4u or sun4v system.
1226  *
1227  * For children of other nodes, it is bus type specific.  So
1228  * we walk up the tree until we discover a "device_type" property
1229  * we recognize and we go from there.
1230  *
1231  * As an example, the boot device on my workstation has a full path:
1232  *
1233  *      /pci@1e,600000/ide@d/disk@0,0:c
1234  */
1235 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1236 {
1237         struct linux_prom64_registers *regs;
1238         struct property *rprop;
1239         u32 high_bits, low_bits, type;
1240
1241         rprop = of_find_property(dp, "reg", NULL);
1242         if (!rprop)
1243                 return;
1244
1245         regs = rprop->value;
1246         if (!is_root_node(dp->parent)) {
1247                 sprintf(tmp_buf, "%s@%x,%x",
1248                         dp->name,
1249                         (unsigned int) (regs->phys_addr >> 32UL),
1250                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1251                 return;
1252         }
1253
1254         type = regs->phys_addr >> 60UL;
1255         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1256         low_bits = (regs->phys_addr & 0xffffffffUL);
1257
1258         if (type == 0 || type == 8) {
1259                 const char *prefix = (type == 0) ? "m" : "i";
1260
1261                 if (low_bits)
1262                         sprintf(tmp_buf, "%s@%s%x,%x",
1263                                 dp->name, prefix,
1264                                 high_bits, low_bits);
1265                 else
1266                         sprintf(tmp_buf, "%s@%s%x",
1267                                 dp->name,
1268                                 prefix,
1269                                 high_bits);
1270         } else if (type == 12) {
1271                 sprintf(tmp_buf, "%s@%x",
1272                         dp->name, high_bits);
1273         }
1274 }
1275
1276 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1277 {
1278         struct linux_prom64_registers *regs;
1279         struct property *prop;
1280
1281         prop = of_find_property(dp, "reg", NULL);
1282         if (!prop)
1283                 return;
1284
1285         regs = prop->value;
1286         if (!is_root_node(dp->parent)) {
1287                 sprintf(tmp_buf, "%s@%x,%x",
1288                         dp->name,
1289                         (unsigned int) (regs->phys_addr >> 32UL),
1290                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1291                 return;
1292         }
1293
1294         prop = of_find_property(dp, "upa-portid", NULL);
1295         if (!prop)
1296                 prop = of_find_property(dp, "portid", NULL);
1297         if (prop) {
1298                 unsigned long mask = 0xffffffffUL;
1299
1300                 if (tlb_type >= cheetah)
1301                         mask = 0x7fffff;
1302
1303                 sprintf(tmp_buf, "%s@%x,%x",
1304                         dp->name,
1305                         *(u32 *)prop->value,
1306                         (unsigned int) (regs->phys_addr & mask));
1307         }
1308 }
1309
1310 /* "name@slot,offset"  */
1311 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1312 {
1313         struct linux_prom_registers *regs;
1314         struct property *prop;
1315
1316         prop = of_find_property(dp, "reg", NULL);
1317         if (!prop)
1318                 return;
1319
1320         regs = prop->value;
1321         sprintf(tmp_buf, "%s@%x,%x",
1322                 dp->name,
1323                 regs->which_io,
1324                 regs->phys_addr);
1325 }
1326
1327 /* "name@devnum[,func]" */
1328 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1329 {
1330         struct linux_prom_pci_registers *regs;
1331         struct property *prop;
1332         unsigned int devfn;
1333
1334         prop = of_find_property(dp, "reg", NULL);
1335         if (!prop)
1336                 return;
1337
1338         regs = prop->value;
1339         devfn = (regs->phys_hi >> 8) & 0xff;
1340         if (devfn & 0x07) {
1341                 sprintf(tmp_buf, "%s@%x,%x",
1342                         dp->name,
1343                         devfn >> 3,
1344                         devfn & 0x07);
1345         } else {
1346                 sprintf(tmp_buf, "%s@%x",
1347                         dp->name,
1348                         devfn >> 3);
1349         }
1350 }
1351
1352 /* "name@UPA_PORTID,offset" */
1353 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1354 {
1355         struct linux_prom64_registers *regs;
1356         struct property *prop;
1357
1358         prop = of_find_property(dp, "reg", NULL);
1359         if (!prop)
1360                 return;
1361
1362         regs = prop->value;
1363
1364         prop = of_find_property(dp, "upa-portid", NULL);
1365         if (!prop)
1366                 return;
1367
1368         sprintf(tmp_buf, "%s@%x,%x",
1369                 dp->name,
1370                 *(u32 *) prop->value,
1371                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1372 }
1373
1374 /* "name@reg" */
1375 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1376 {
1377         struct property *prop;
1378         u32 *regs;
1379
1380         prop = of_find_property(dp, "reg", NULL);
1381         if (!prop)
1382                 return;
1383
1384         regs = prop->value;
1385
1386         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1387 }
1388
1389 /* "name@addrhi,addrlo" */
1390 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1391 {
1392         struct linux_prom64_registers *regs;
1393         struct property *prop;
1394
1395         prop = of_find_property(dp, "reg", NULL);
1396         if (!prop)
1397                 return;
1398
1399         regs = prop->value;
1400
1401         sprintf(tmp_buf, "%s@%x,%x",
1402                 dp->name,
1403                 (unsigned int) (regs->phys_addr >> 32UL),
1404                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1405 }
1406
1407 /* "name@bus,addr" */
1408 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1409 {
1410         struct property *prop;
1411         u32 *regs;
1412
1413         prop = of_find_property(dp, "reg", NULL);
1414         if (!prop)
1415                 return;
1416
1417         regs = prop->value;
1418
1419         /* This actually isn't right... should look at the #address-cells
1420          * property of the i2c bus node etc. etc.
1421          */
1422         sprintf(tmp_buf, "%s@%x,%x",
1423                 dp->name, regs[0], regs[1]);
1424 }
1425
1426 /* "name@reg0[,reg1]" */
1427 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1428 {
1429         struct property *prop;
1430         u32 *regs;
1431
1432         prop = of_find_property(dp, "reg", NULL);
1433         if (!prop)
1434                 return;
1435
1436         regs = prop->value;
1437
1438         if (prop->length == sizeof(u32) || regs[1] == 1) {
1439                 sprintf(tmp_buf, "%s@%x",
1440                         dp->name, regs[0]);
1441         } else {
1442                 sprintf(tmp_buf, "%s@%x,%x",
1443                         dp->name, regs[0], regs[1]);
1444         }
1445 }
1446
1447 /* "name@reg0reg1[,reg2reg3]" */
1448 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1449 {
1450         struct property *prop;
1451         u32 *regs;
1452
1453         prop = of_find_property(dp, "reg", NULL);
1454         if (!prop)
1455                 return;
1456
1457         regs = prop->value;
1458
1459         if (regs[2] || regs[3]) {
1460                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1461                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1462         } else {
1463                 sprintf(tmp_buf, "%s@%08x%08x",
1464                         dp->name, regs[0], regs[1]);
1465         }
1466 }
1467
1468 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1469 {
1470         struct device_node *parent = dp->parent;
1471
1472         if (parent != NULL) {
1473                 if (!strcmp(parent->type, "pci") ||
1474                     !strcmp(parent->type, "pciex"))
1475                         return pci_path_component(dp, tmp_buf);
1476                 if (!strcmp(parent->type, "sbus"))
1477                         return sbus_path_component(dp, tmp_buf);
1478                 if (!strcmp(parent->type, "upa"))
1479                         return upa_path_component(dp, tmp_buf);
1480                 if (!strcmp(parent->type, "ebus"))
1481                         return ebus_path_component(dp, tmp_buf);
1482                 if (!strcmp(parent->name, "usb") ||
1483                     !strcmp(parent->name, "hub"))
1484                         return usb_path_component(dp, tmp_buf);
1485                 if (!strcmp(parent->type, "i2c"))
1486                         return i2c_path_component(dp, tmp_buf);
1487                 if (!strcmp(parent->type, "firewire"))
1488                         return ieee1394_path_component(dp, tmp_buf);
1489                 if (!strcmp(parent->type, "virtual-devices"))
1490                         return vdev_path_component(dp, tmp_buf);
1491
1492                 /* "isa" is handled with platform naming */
1493         }
1494
1495         /* Use platform naming convention.  */
1496         if (tlb_type == hypervisor)
1497                 return sun4v_path_component(dp, tmp_buf);
1498         else
1499                 return sun4u_path_component(dp, tmp_buf);
1500 }
1501
1502 static char * __init build_path_component(struct device_node *dp)
1503 {
1504         char tmp_buf[64], *n;
1505
1506         tmp_buf[0] = '\0';
1507         __build_path_component(dp, tmp_buf);
1508         if (tmp_buf[0] == '\0')
1509                 strcpy(tmp_buf, dp->name);
1510
1511         n = prom_early_alloc(strlen(tmp_buf) + 1);
1512         strcpy(n, tmp_buf);
1513
1514         return n;
1515 }
1516
1517 static char * __init build_full_name(struct device_node *dp)
1518 {
1519         int len, ourlen, plen;
1520         char *n;
1521
1522         plen = strlen(dp->parent->full_name);
1523         ourlen = strlen(dp->path_component_name);
1524         len = ourlen + plen + 2;
1525
1526         n = prom_early_alloc(len);
1527         strcpy(n, dp->parent->full_name);
1528         if (!is_root_node(dp->parent)) {
1529                 strcpy(n + plen, "/");
1530                 plen++;
1531         }
1532         strcpy(n + plen, dp->path_component_name);
1533
1534         return n;
1535 }
1536
1537 static unsigned int unique_id;
1538
1539 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1540 {
1541         static struct property *tmp = NULL;
1542         struct property *p;
1543
1544         if (tmp) {
1545                 p = tmp;
1546                 memset(p, 0, sizeof(*p) + 32);
1547                 tmp = NULL;
1548         } else {
1549                 p = prom_early_alloc(sizeof(struct property) + 32);
1550                 p->unique_id = unique_id++;
1551         }
1552
1553         p->name = (char *) (p + 1);
1554         if (special_name) {
1555                 strcpy(p->name, special_name);
1556                 p->length = special_len;
1557                 p->value = prom_early_alloc(special_len);
1558                 memcpy(p->value, special_val, special_len);
1559         } else {
1560                 if (prev == NULL) {
1561                         prom_firstprop(node, p->name);
1562                 } else {
1563                         prom_nextprop(node, prev, p->name);
1564                 }
1565                 if (strlen(p->name) == 0) {
1566                         tmp = p;
1567                         return NULL;
1568                 }
1569                 p->length = prom_getproplen(node, p->name);
1570                 if (p->length <= 0) {
1571                         p->length = 0;
1572                 } else {
1573                         p->value = prom_early_alloc(p->length + 1);
1574                         prom_getproperty(node, p->name, p->value, p->length);
1575                         ((unsigned char *)p->value)[p->length] = '\0';
1576                 }
1577         }
1578         return p;
1579 }
1580
1581 static struct property * __init build_prop_list(phandle node)
1582 {
1583         struct property *head, *tail;
1584
1585         head = tail = build_one_prop(node, NULL,
1586                                      ".node", &node, sizeof(node));
1587
1588         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1589         tail = tail->next;
1590         while(tail) {
1591                 tail->next = build_one_prop(node, tail->name,
1592                                             NULL, NULL, 0);
1593                 tail = tail->next;
1594         }
1595
1596         return head;
1597 }
1598
1599 static char * __init get_one_property(phandle node, const char *name)
1600 {
1601         char *buf = "<NULL>";
1602         int len;
1603
1604         len = prom_getproplen(node, name);
1605         if (len > 0) {
1606                 buf = prom_early_alloc(len);
1607                 prom_getproperty(node, name, buf, len);
1608         }
1609
1610         return buf;
1611 }
1612
1613 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1614 {
1615         struct device_node *dp;
1616
1617         if (!node)
1618                 return NULL;
1619
1620         dp = prom_early_alloc(sizeof(*dp));
1621         dp->unique_id = unique_id++;
1622         dp->parent = parent;
1623
1624         kref_init(&dp->kref);
1625
1626         dp->name = get_one_property(node, "name");
1627         dp->type = get_one_property(node, "device_type");
1628         dp->node = node;
1629
1630         dp->properties = build_prop_list(node);
1631
1632         irq_trans_init(dp);
1633
1634         return dp;
1635 }
1636
1637 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1638 {
1639         struct device_node *dp;
1640
1641         dp = create_node(node, parent);
1642         if (dp) {
1643                 *(*nextp) = dp;
1644                 *nextp = &dp->allnext;
1645
1646                 dp->path_component_name = build_path_component(dp);
1647                 dp->full_name = build_full_name(dp);
1648
1649                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1650
1651                 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1652         }
1653
1654         return dp;
1655 }
1656
1657 void __init prom_build_devicetree(void)
1658 {
1659         struct device_node **nextp;
1660
1661         allnodes = create_node(prom_root_node, NULL);
1662         allnodes->path_component_name = "";
1663         allnodes->full_name = "/";
1664
1665         nextp = &allnodes->allnext;
1666         allnodes->child = build_tree(allnodes,
1667                                      prom_getchild(allnodes->node),
1668                                      &nextp);
1669         printk("PROM: Built device tree with %u bytes of memory.\n",
1670                prom_early_allocated);
1671 }