2 * linux/drivers/ide/legacy/ali14xx.c Version 0.03 Feb 09, 1996
4 * Copyright (C) 1996 Linus Torvalds & author (see below)
8 * ALI M14xx chipset EIDE controller
10 * Works for ALI M1439/1443/1445/1487/1489 chipsets.
12 * Adapted from code developed by derekn@vw.ece.cmu.edu. -ml
13 * Derek's notes follow:
15 * I think the code should be pretty understandable,
16 * but I'll be happy to (try to) answer questions.
18 * The critical part is in the setupDrive function. The initRegisters
19 * function doesn't seem to be necessary, but the DOS driver does it, so
22 * I've only tested this on my system, which only has one disk. I posted
23 * it to comp.sys.linux.hardware, so maybe some other people will try it
26 * Derek Noonburg (derekn@ece.cmu.edu)
31 * I've since upgraded to two disks and a CD-ROM, with no trouble, and
32 * I've also heard from several others who have used it successfully.
33 * This driver appears to work with both the 1443/1445 and the 1487/1489
34 * chipsets. I've added support for PIO mode 4 for the 1487. This
35 * seems to work just fine on the 1443 also, although I'm not sure it's
36 * advertised as supporting mode 4. (I've been running a WDC AC21200 in
37 * mode 4 for a while now with no trouble.) -Derek
40 #include <linux/module.h>
41 #include <linux/types.h>
42 #include <linux/kernel.h>
43 #include <linux/delay.h>
44 #include <linux/timer.h>
46 #include <linux/ioport.h>
47 #include <linux/blkdev.h>
48 #include <linux/hdreg.h>
49 #include <linux/ide.h>
50 #include <linux/init.h>
54 /* port addresses for auto-detection */
55 #define ALI_NUM_PORTS 4
56 static int ports[ALI_NUM_PORTS] __initdata = {0x074, 0x0f4, 0x034, 0x0e4};
58 /* register initialization data */
59 typedef struct { u8 reg, data; } RegInitializer;
61 static RegInitializer initData[] __initdata = {
62 {0x01, 0x0f}, {0x02, 0x00}, {0x03, 0x00}, {0x04, 0x00},
63 {0x05, 0x00}, {0x06, 0x00}, {0x07, 0x2b}, {0x0a, 0x0f},
64 {0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00},
65 {0x29, 0x00}, {0x2a, 0x00}, {0x2f, 0x00}, {0x2b, 0x00},
66 {0x2c, 0x00}, {0x2d, 0x00}, {0x2e, 0x00}, {0x30, 0x00},
67 {0x31, 0x00}, {0x32, 0x00}, {0x33, 0x00}, {0x34, 0xff},
68 {0x35, 0x03}, {0x00, 0x00}
71 /* timing parameter registers for each drive */
72 static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = {
73 {0x03, 0x26, 0x04, 0x27}, /* drive 0 */
74 {0x05, 0x28, 0x06, 0x29}, /* drive 1 */
75 {0x2b, 0x30, 0x2c, 0x31}, /* drive 2 */
76 {0x2d, 0x32, 0x2e, 0x33}, /* drive 3 */
79 static int basePort; /* base port address */
80 static int regPort; /* port for register number */
81 static int dataPort; /* port for register data */
82 static u8 regOn; /* output to base port to access registers */
83 static u8 regOff; /* output to base port to close registers */
85 /*------------------------------------------------------------------------*/
88 * Read a controller register.
90 static inline u8 inReg (u8 reg)
97 * Write a controller register.
99 static void outReg (u8 data, u8 reg)
101 outb_p(reg, regPort);
102 outb_p(data, dataPort);
106 * Set PIO mode for the specified drive.
107 * This function computes timing parameters
108 * and sets controller registers accordingly.
110 static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
114 u8 param1, param2, param3, param4;
116 int bus_speed = system_bus_clock();
118 /* calculate timing, according to PIO mode */
119 time1 = ide_pio_cycle_time(drive, pio);
120 time2 = ide_pio_timings[pio].active_time;
121 param3 = param1 = (time2 * bus_speed + 999) / 1000;
122 param4 = param2 = (time1 * bus_speed + 999) / 1000 - param1;
127 printk(KERN_DEBUG "%s: PIO mode%d, t1=%dns, t2=%dns, cycles = %d+%d, %d+%d\n",
128 drive->name, pio, time1, time2, param1, param2, param3, param4);
130 /* stuff timing parameters into controller registers */
131 driveNum = (HWIF(drive)->index << 1) + drive->select.b.unit;
132 spin_lock_irqsave(&ide_lock, flags);
133 outb_p(regOn, basePort);
134 outReg(param1, regTab[driveNum].reg1);
135 outReg(param2, regTab[driveNum].reg2);
136 outReg(param3, regTab[driveNum].reg3);
137 outReg(param4, regTab[driveNum].reg4);
138 outb_p(regOff, basePort);
139 spin_unlock_irqrestore(&ide_lock, flags);
143 * Auto-detect the IDE controller port.
145 static int __init findPort (void)
151 local_irq_save(flags);
152 for (i = 0; i < ALI_NUM_PORTS; ++i) {
154 regOff = inb(basePort);
155 for (regOn = 0x30; regOn <= 0x33; ++regOn) {
156 outb_p(regOn, basePort);
157 if (inb(basePort) == regOn) {
158 regPort = basePort + 4;
159 dataPort = basePort + 8;
161 outb_p(regOff, basePort);
162 local_irq_restore(flags);
165 return 1; /* success */
168 outb_p(regOff, basePort);
170 local_irq_restore(flags);
175 * Initialize controller registers with default values.
177 static int __init initRegisters (void) {
182 local_irq_save(flags);
183 outb_p(regOn, basePort);
184 for (p = initData; p->reg != 0; ++p)
185 outReg(p->data, p->reg);
186 outb_p(0x01, regPort);
187 t = inb(regPort) & 0x01;
188 outb_p(regOff, basePort);
189 local_irq_restore(flags);
193 static int __init ali14xx_probe(void)
195 ide_hwif_t *hwif, *mate;
197 printk(KERN_DEBUG "ali14xx: base=0x%03x, regOn=0x%02x.\n",
200 /* initialize controller registers */
201 if (!initRegisters()) {
202 printk(KERN_ERR "ali14xx: Chip initialization failed.\n");
206 hwif = &ide_hwifs[0];
207 mate = &ide_hwifs[1];
209 hwif->chipset = ide_ali14xx;
210 hwif->pio_mask = ATA_PIO4;
211 hwif->set_pio_mode = &ali14xx_set_pio_mode;
214 mate->chipset = ide_ali14xx;
215 mate->pio_mask = ATA_PIO4;
216 mate->set_pio_mode = &ali14xx_set_pio_mode;
220 probe_hwif_init(hwif);
221 probe_hwif_init(mate);
223 ide_proc_register_port(hwif);
224 ide_proc_register_port(mate);
229 int probe_ali14xx = 0;
231 module_param_named(probe, probe_ali14xx, bool, 0);
232 MODULE_PARM_DESC(probe, "probe for ALI M14xx chipsets");
234 /* Can be called directly from ide.c. */
235 int __init ali14xx_init(void)
237 if (probe_ali14xx == 0)
240 /* auto-detect IDE controller port */
246 printk(KERN_ERR "ali14xx: not found.\n");
252 module_init(ali14xx_init);
255 MODULE_AUTHOR("see local file");
256 MODULE_DESCRIPTION("support of ALI 14XX IDE chipsets");
257 MODULE_LICENSE("GPL");