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   1 /*
   2  *    Disk Array driver for Compaq SMART2 Controllers
   3  *    Copyright 1998 Compaq Computer Corporation
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; either version 2 of the License, or
   8  *    (at your option) any later version.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    You should have received a copy of the GNU General Public License
  16  *    along with this program; if not, write to the Free Software
  17  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20  *
  21  */
  22 #include <linux/module.h>
  23 #include <linux/types.h>
  24 #include <linux/pci.h>
  25 #include <linux/bio.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/major.h>
  31 #include <linux/fs.h>
  32 #include <linux/blkpg.h>
  33 #include <linux/timer.h>
  34 #include <linux/proc_fs.h>
  35 #include <linux/init.h>
  36 #include <linux/hdreg.h>
  37 #include <linux/spinlock.h>
  38 #include <linux/blkdev.h>
  39 #include <linux/genhd.h>
  40 #include <asm/uaccess.h>
  41 #include <asm/io.h>
  42
  43
  44 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  45
  46 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
  47 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
  48
  49 /* Embedded module documentation macros - see modules.h */
  50 /* Original author Chris Frantz - Compaq Computer Corporation */
  51 MODULE_AUTHOR("Compaq Computer Corporation");
  52 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
  53 MODULE_LICENSE("GPL");
  54
  55 #include "cpqarray.h"
  56 #include "ida_cmd.h"
  57 #include "smart1,2.h"
  58 #include "ida_ioctl.h"
  59
  60 #define READ_AHEAD      128
  61 #define NR_CMDS         128 /* This could probably go as high as ~400 */
  62
  63 #define MAX_CTLR        8
  64 #define CTLR_SHIFT      8
  65
  66 #define CPQARRAY_DMA_MASK       0xFFFFFFFF      /* 32 bit DMA */
  67
  68 static int nr_ctlr;
  69 static ctlr_info_t *hba[MAX_CTLR];
  70
  71 static int eisa[8];
  72
  73 #define NR_PRODUCTS ARRAY_SIZE(products)
  74
  75 /*  board_id = Subsystem Device ID & Vendor ID
  76  *  product = Marketing Name for the board
  77  *  access = Address of the struct of function pointers
  78  */
  79 static struct board_type products[] = {
  80         { 0x0040110E, "IDA",                    &smart1_access },
  81         { 0x0140110E, "IDA-2",                  &smart1_access },
  82         { 0x1040110E, "IAES",                   &smart1_access },
  83         { 0x2040110E, "SMART",                  &smart1_access },
  84         { 0x3040110E, "SMART-2/E",              &smart2e_access },
  85         { 0x40300E11, "SMART-2/P",              &smart2_access },
  86         { 0x40310E11, "SMART-2SL",              &smart2_access },
  87         { 0x40320E11, "Smart Array 3200",       &smart2_access },
  88         { 0x40330E11, "Smart Array 3100ES",     &smart2_access },
  89         { 0x40340E11, "Smart Array 221",        &smart2_access },
  90         { 0x40400E11, "Integrated Array",       &smart4_access },
  91         { 0x40480E11, "Compaq Raid LC2",        &smart4_access },
  92         { 0x40500E11, "Smart Array 4200",       &smart4_access },
  93         { 0x40510E11, "Smart Array 4250ES",     &smart4_access },
  94         { 0x40580E11, "Smart Array 431",        &smart4_access },
  95 };
  96
  97 /* define the PCI info for the PCI cards this driver can control */
  98 static const struct pci_device_id cpqarray_pci_device_id[] =
  99 {
 100         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 101                 0x0E11, 0x4058, 0, 0, 0},       /* SA431 */
 102         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 103                 0x0E11, 0x4051, 0, 0, 0},      /* SA4250ES */
 104         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 105                 0x0E11, 0x4050, 0, 0, 0},      /* SA4200 */
 106         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 107                 0x0E11, 0x4048, 0, 0, 0},       /* LC2 */
 108         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 109                 0x0E11, 0x4040, 0, 0, 0},      /* Integrated Array */
 110         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 111                 0x0E11, 0x4034, 0, 0, 0},       /* SA 221 */
 112         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 113                 0x0E11, 0x4033, 0, 0, 0},       /* SA 3100ES*/
 114         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 115                 0x0E11, 0x4032, 0, 0, 0},       /* SA 3200*/
 116         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 117                 0x0E11, 0x4031, 0, 0, 0},       /* SA 2SL*/
 118         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 119                 0x0E11, 0x4030, 0, 0, 0},       /* SA 2P */
 120         { 0 }
 121 };
 122
 123 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
 124
 125 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
 126
 127 /* Debug... */
 128 #define DBG(s)  do { s } while(0)
 129 /* Debug (general info)... */
 130 #define DBGINFO(s) do { } while(0)
 131 /* Debug Paranoid... */
 132 #define DBGP(s)  do { } while(0)
 133 /* Debug Extra Paranoid... */
 134 #define DBGPX(s) do { } while(0)
 135
 136 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
 137 static void __iomem *remap_pci_mem(ulong base, ulong size);
 138 static int cpqarray_eisa_detect(void);
 139 static int pollcomplete(int ctlr);
 140 static void getgeometry(int ctlr);
 141 static void start_fwbk(int ctlr);
 142
 143 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
 144 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
 145
 146 static void free_hba(int i);
 147 static int alloc_cpqarray_hba(void);
 148
 149 static int sendcmd(
 150         __u8    cmd,
 151         int     ctlr,
 152         void    *buff,
 153         size_t  size,
 154         unsigned int blk,
 155         unsigned int blkcnt,
 156         unsigned int log_unit );
 157
 158 static int ida_open(struct inode *inode, struct file *filep);
 159 static int ida_release(struct inode *inode, struct file *filep);
 160 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
 161 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 162 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
 163
 164 static void do_ida_request(request_queue_t *q);
 165 static void start_io(ctlr_info_t *h);
 166
 167 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
 168 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
 169 static inline void complete_buffers(struct bio *bio, int ok);
 170 static inline void complete_command(cmdlist_t *cmd, int timeout);
 171
 172 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs * regs);
 173 static void ida_timer(unsigned long tdata);
 174 static int ida_revalidate(struct gendisk *disk);
 175 static int revalidate_allvol(ctlr_info_t *host);
 176 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
 177
 178 #ifdef CONFIG_PROC_FS
 179 static void ida_procinit(int i);
 180 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
 181 #else
 182 static void ida_procinit(int i) {}
 183 #endif
 184
 185 static inline drv_info_t *get_drv(struct gendisk *disk)
 186 {
 187         return disk->private_data;
 188 }
 189
 190 static inline ctlr_info_t *get_host(struct gendisk *disk)
 191 {
 192         return disk->queue->queuedata;
 193 }
 194
 195
 196 static struct block_device_operations ida_fops  = {
 197         .owner          = THIS_MODULE,
 198         .open           = ida_open,
 199         .release        = ida_release,
 200         .ioctl          = ida_ioctl,
 201         .getgeo         = ida_getgeo,
 202         .revalidate_disk= ida_revalidate,
 203 };
 204
 205
 206 #ifdef CONFIG_PROC_FS
 207
 208 static struct proc_dir_entry *proc_array;
 209
 210 /*
 211  * Get us a file in /proc/array that says something about each controller.
 212  * Create /proc/array if it doesn't exist yet.
 213  */
 214 static void __init ida_procinit(int i)
 215 {
 216         if (proc_array == NULL) {
 217                 proc_array = proc_mkdir("cpqarray", proc_root_driver);
 218                 if (!proc_array) return;
 219         }
 220
 221         create_proc_read_entry(hba[i]->devname, 0, proc_array,
 222                                ida_proc_get_info, hba[i]);
 223 }
 224
 225 /*
 226  * Report information about this controller.
 227  */
 228 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
 229 {
 230         off_t pos = 0;
 231         off_t len = 0;
 232         int size, i, ctlr;
 233         ctlr_info_t *h = (ctlr_info_t*)data;
 234         drv_info_t *drv;
 235 #ifdef CPQ_PROC_PRINT_QUEUES
 236         cmdlist_t *c;
 237         unsigned long flags;
 238 #endif
 239
 240         ctlr = h->ctlr;
 241         size = sprintf(buffer, "%s:  Compaq %s Controller\n"
 242                 "       Board ID: 0x%08lx\n"
 243                 "       Firmware Revision: %c%c%c%c\n"
 244                 "       Controller Sig: 0x%08lx\n"
 245                 "       Memory Address: 0x%08lx\n"
 246                 "       I/O Port: 0x%04x\n"
 247                 "       IRQ: %d\n"
 248                 "       Logical drives: %d\n"
 249                 "       Physical drives: %d\n\n"
 250                 "       Current Q depth: %d\n"
 251                 "       Max Q depth since init: %d\n\n",
 252                 h->devname,
 253                 h->product_name,
 254                 (unsigned long)h->board_id,
 255                 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
 256                 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
 257                 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
 258                 h->log_drives, h->phys_drives,
 259                 h->Qdepth, h->maxQsinceinit);
 260
 261         pos += size; len += size;
 262
 263         size = sprintf(buffer+len, "Logical Drive Info:\n");
 264         pos += size; len += size;
 265
 266         for(i=0; i<h->log_drives; i++) {
 267                 drv = &h->drv[i];
 268                 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
 269                                 ctlr, i, drv->blk_size, drv->nr_blks);
 270                 pos += size; len += size;
 271         }
 272
 273 #ifdef CPQ_PROC_PRINT_QUEUES
 274         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
 275         size = sprintf(buffer+len, "\nCurrent Queues:\n");
 276         pos += size; len += size;
 277
 278         c = h->reqQ;
 279         size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
 280         if (c) c=c->next;
 281         while(c && c != h->reqQ) {
 282                 size = sprintf(buffer+len, "->%p", c);
 283                 pos += size; len += size;
 284                 c=c->next;
 285         }
 286
 287         c = h->cmpQ;
 288         size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
 289         if (c) c=c->next;
 290         while(c && c != h->cmpQ) {
 291                 size = sprintf(buffer+len, "->%p", c);
 292                 pos += size; len += size;
 293                 c=c->next;
 294         }
 295
 296         size = sprintf(buffer+len, "\n"); pos += size; len += size;
 297         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
 298 #endif
 299         size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
 300                         h->nr_allocs, h->nr_frees);
 301         pos += size; len += size;
 302
 303         *eof = 1;
 304         *start = buffer+offset;
 305         len -= offset;
 306         if (len>length)
 307                 len = length;
 308         return len;
 309 }
 310 #endif /* CONFIG_PROC_FS */
 311
 312 module_param_array(eisa, int, NULL, 0);
 313
 314 static void release_io_mem(ctlr_info_t *c)
 315 {
 316         /* if IO mem was not protected do nothing */
 317         if( c->io_mem_addr == 0)
 318                 return;
 319         release_region(c->io_mem_addr, c->io_mem_length);
 320         c->io_mem_addr = 0;
 321         c->io_mem_length = 0;
 322 }
 323
 324 static void __devexit cpqarray_remove_one(int i)
 325 {
 326         int j;
 327         char buff[4];
 328
 329         /* sendcmd will turn off interrupt, and send the flush...
 330          * To write all data in the battery backed cache to disks
 331          * no data returned, but don't want to send NULL to sendcmd */
 332         if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
 333         {
 334                 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
 335                                 i);
 336         }
 337         free_irq(hba[i]->intr, hba[i]);
 338         iounmap(hba[i]->vaddr);
 339         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 340         del_timer(&hba[i]->timer);
 341         remove_proc_entry(hba[i]->devname, proc_array);
 342         pci_free_consistent(hba[i]->pci_dev,
 343                         NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
 344                         hba[i]->cmd_pool_dhandle);
 345         kfree(hba[i]->cmd_pool_bits);
 346         for(j = 0; j < NWD; j++) {
 347                 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
 348                         del_gendisk(ida_gendisk[i][j]);
 349                 put_disk(ida_gendisk[i][j]);
 350         }
 351         blk_cleanup_queue(hba[i]->queue);
 352         release_io_mem(hba[i]);
 353         free_hba(i);
 354 }
 355
 356 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
 357 {
 358         int i;
 359         ctlr_info_t *tmp_ptr;
 360
 361         if (pci_get_drvdata(pdev) == NULL) {
 362                 printk( KERN_ERR "cpqarray: Unable to remove device \n");
 363                 return;
 364         }
 365
 366         tmp_ptr = pci_get_drvdata(pdev);
 367         i = tmp_ptr->ctlr;
 368         if (hba[i] == NULL) {
 369                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 370                         "already been removed \n", i);
 371                 return;
 372         }
 373         pci_set_drvdata(pdev, NULL);
 374
 375         cpqarray_remove_one(i);
 376 }
 377
 378 /* removing an instance that was not removed automatically..
 379  * must be an eisa card.
 380  */
 381 static void __devexit cpqarray_remove_one_eisa (int i)
 382 {
 383         if (hba[i] == NULL) {
 384                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 385                         "already been removed \n", i);
 386                 return;
 387         }
 388         cpqarray_remove_one(i);
 389 }
 390
 391 /* pdev is NULL for eisa */
 392 static int __init cpqarray_register_ctlr( int i, struct pci_dev *pdev)
 393 {
 394         request_queue_t *q;
 395         int j;
 396
 397         /*
 398          * register block devices
 399          * Find disks and fill in structs
 400          * Get an interrupt, set the Q depth and get into /proc
 401          */
 402
 403         /* If this successful it should insure that we are the only */
 404         /* instance of the driver */
 405         if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
 406                 goto Enomem4;
 407         }
 408         hba[i]->access.set_intr_mask(hba[i], 0);
 409         if (request_irq(hba[i]->intr, do_ida_intr,
 410                 IRQF_DISABLED|IRQF_SHARED, hba[i]->devname, hba[i]))
 411         {
 412                 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
 413                                 hba[i]->intr, hba[i]->devname);
 414                 goto Enomem3;
 415         }
 416
 417         for (j=0; j<NWD; j++) {
 418                 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
 419                 if (!ida_gendisk[i][j])
 420                         goto Enomem2;
 421         }
 422
 423         hba[i]->cmd_pool = (cmdlist_t *)pci_alloc_consistent(
 424                 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
 425                 &(hba[i]->cmd_pool_dhandle));
 426         hba[i]->cmd_pool_bits = kmalloc(
 427                 ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long),
 428                 GFP_KERNEL);
 429
 430         if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
 431                         goto Enomem1;
 432
 433         memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
 434         memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG)*sizeof(unsigned long));
 435         printk(KERN_INFO "cpqarray: Finding drives on %s",
 436                 hba[i]->devname);
 437
 438         spin_lock_init(&hba[i]->lock);
 439         q = blk_init_queue(do_ida_request, &hba[i]->lock);
 440         if (!q)
 441                 goto Enomem1;
 442
 443         hba[i]->queue = q;
 444         q->queuedata = hba[i];
 445
 446         getgeometry(i);
 447         start_fwbk(i);
 448
 449         ida_procinit(i);
 450
 451         if (pdev)
 452                 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
 453
 454         /* This is a hardware imposed limit. */
 455         blk_queue_max_hw_segments(q, SG_MAX);
 456
 457         /* This is a driver limit and could be eliminated. */
 458         blk_queue_max_phys_segments(q, SG_MAX);
 459
 460         init_timer(&hba[i]->timer);
 461         hba[i]->timer.expires = jiffies + IDA_TIMER;
 462         hba[i]->timer.data = (unsigned long)hba[i];
 463         hba[i]->timer.function = ida_timer;
 464         add_timer(&hba[i]->timer);
 465
 466         /* Enable IRQ now that spinlock and rate limit timer are set up */
 467         hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
 468
 469         for(j=0; j<NWD; j++) {
 470                 struct gendisk *disk = ida_gendisk[i][j];
 471                 drv_info_t *drv = &hba[i]->drv[j];
 472                 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
 473                 disk->major = COMPAQ_SMART2_MAJOR + i;
 474                 disk->first_minor = j<<NWD_SHIFT;
 475                 disk->fops = &ida_fops;
 476                 if (j && !drv->nr_blks)
 477                         continue;
 478                 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
 479                 set_capacity(disk, drv->nr_blks);
 480                 disk->queue = hba[i]->queue;
 481                 disk->private_data = drv;
 482                 add_disk(disk);
 483         }
 484
 485         /* done ! */
 486         return(i);
 487
 488 Enomem1:
 489         nr_ctlr = i;
 490         kfree(hba[i]->cmd_pool_bits);
 491         if (hba[i]->cmd_pool)
 492                 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
 493                                     hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
 494 Enomem2:
 495         while (j--) {
 496                 put_disk(ida_gendisk[i][j]);
 497                 ida_gendisk[i][j] = NULL;
 498         }
 499         free_irq(hba[i]->intr, hba[i]);
 500 Enomem3:
 501         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 502 Enomem4:
 503         if (pdev)
 504                 pci_set_drvdata(pdev, NULL);
 505         release_io_mem(hba[i]);
 506         free_hba(i);
 507
 508         printk( KERN_ERR "cpqarray: out of memory");
 509
 510         return -1;
 511 }
 512
 513 static int __init cpqarray_init_one( struct pci_dev *pdev,
 514         const struct pci_device_id *ent)
 515 {
 516         int i;
 517
 518         printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
 519                         " bus %d dev %d func %d\n",
 520                         pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
 521                         PCI_FUNC(pdev->devfn));
 522         i = alloc_cpqarray_hba();
 523         if( i < 0 )
 524                 return (-1);
 525         memset(hba[i], 0, sizeof(ctlr_info_t));
 526         sprintf(hba[i]->devname, "ida%d", i);
 527         hba[i]->ctlr = i;
 528         /* Initialize the pdev driver private data */
 529         pci_set_drvdata(pdev, hba[i]);
 530
 531         if (cpqarray_pci_init(hba[i], pdev) != 0) {
 532                 pci_set_drvdata(pdev, NULL);
 533                 release_io_mem(hba[i]);
 534                 free_hba(i);
 535                 return -1;
 536         }
 537
 538         return (cpqarray_register_ctlr(i, pdev));
 539 }
 540
 541 static struct pci_driver cpqarray_pci_driver = {
 542         .name = "cpqarray",
 543         .probe = cpqarray_init_one,
 544         .remove = __devexit_p(cpqarray_remove_one_pci),
 545         .id_table = cpqarray_pci_device_id,
 546 };
 547
 548 /*
 549  *  This is it.  Find all the controllers and register them.
 550  *  returns the number of block devices registered.
 551  */
 552 static int __init cpqarray_init(void)
 553 {
 554         int num_cntlrs_reg = 0;
 555         int i;
 556         int rc = 0;
 557
 558         /* detect controllers */
 559         printk(DRIVER_NAME "\n");
 560
 561         rc = pci_register_driver(&cpqarray_pci_driver);
 562         if (rc)
 563                 return rc;
 564         cpqarray_eisa_detect();
 565
 566         for (i=0; i < MAX_CTLR; i++) {
 567                 if (hba[i] != NULL)
 568                         num_cntlrs_reg++;
 569         }
 570
 571         return(num_cntlrs_reg);
 572 }
 573
 574 /* Function to find the first free pointer into our hba[] array */
 575 /* Returns -1 if no free entries are left.  */
 576 static int alloc_cpqarray_hba(void)
 577 {
 578         int i;
 579
 580         for(i=0; i< MAX_CTLR; i++) {
 581                 if (hba[i] == NULL) {
 582                         hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
 583                         if(hba[i]==NULL) {
 584                                 printk(KERN_ERR "cpqarray: out of memory.\n");
 585                                 return (-1);
 586                         }
 587                         return (i);
 588                 }
 589         }
 590         printk(KERN_WARNING "cpqarray: This driver supports a maximum"
 591                 " of 8 controllers.\n");
 592         return(-1);
 593 }
 594
 595 static void free_hba(int i)
 596 {
 597         kfree(hba[i]);
 598         hba[i]=NULL;
 599 }
 600
 601 /*
 602  * Find the IO address of the controller, its IRQ and so forth.  Fill
 603  * in some basic stuff into the ctlr_info_t structure.
 604  */
 605 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
 606 {
 607         ushort vendor_id, device_id, command;
 608         unchar cache_line_size, latency_timer;
 609         unchar irq, revision;
 610         unsigned long addr[6];
 611         __u32 board_id;
 612
 613         int i;
 614
 615         c->pci_dev = pdev;
 616         if (pci_enable_device(pdev)) {
 617                 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
 618                 return -1;
 619         }
 620         vendor_id = pdev->vendor;
 621         device_id = pdev->device;
 622         irq = pdev->irq;
 623
 624         for(i=0; i<6; i++)
 625                 addr[i] = pci_resource_start(pdev, i);
 626
 627         if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
 628         {
 629                 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
 630                 return -1;
 631         }
 632
 633         pci_read_config_word(pdev, PCI_COMMAND, &command);
 634         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
 635         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
 636         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
 637
 638         pci_read_config_dword(pdev, 0x2c, &board_id);
 639
 640         /* check to see if controller has been disabled */
 641         if(!(command & 0x02)) {
 642                 printk(KERN_WARNING
 643                         "cpqarray: controller appears to be disabled\n");
 644                 return(-1);
 645         }
 646
 647 DBGINFO(
 648         printk("vendor_id = %x\n", vendor_id);
 649         printk("device_id = %x\n", device_id);
 650         printk("command = %x\n", command);
 651         for(i=0; i<6; i++)
 652                 printk("addr[%d] = %lx\n", i, addr[i]);
 653         printk("revision = %x\n", revision);
 654         printk("irq = %x\n", irq);
 655         printk("cache_line_size = %x\n", cache_line_size);
 656         printk("latency_timer = %x\n", latency_timer);
 657         printk("board_id = %x\n", board_id);
 658 );
 659
 660         c->intr = irq;
 661
 662         for(i=0; i<6; i++) {
 663                 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
 664                 { /* IO space */
 665                         c->io_mem_addr = addr[i];
 666                         c->io_mem_length = pci_resource_end(pdev, i)
 667                                 - pci_resource_start(pdev, i) + 1;
 668                         if(!request_region( c->io_mem_addr, c->io_mem_length,
 669                                 "cpqarray"))
 670                         {
 671                                 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
 672                                 c->io_mem_addr = 0;
 673                                 c->io_mem_length = 0;
 674                         }
 675                         break;
 676                 }
 677         }
 678
 679         c->paddr = 0;
 680         for(i=0; i<6; i++)
 681                 if (!(pci_resource_flags(pdev, i) &
 682                                 PCI_BASE_ADDRESS_SPACE_IO)) {
 683                         c->paddr = pci_resource_start (pdev, i);
 684                         break;
 685                 }
 686         if (!c->paddr)
 687                 return -1;
 688         c->vaddr = remap_pci_mem(c->paddr, 128);
 689         if (!c->vaddr)
 690                 return -1;
 691         c->board_id = board_id;
 692
 693         for(i=0; i<NR_PRODUCTS; i++) {
 694                 if (board_id == products[i].board_id) {
 695                         c->product_name = products[i].product_name;
 696                         c->access = *(products[i].access);
 697                         break;
 698                 }
 699         }
 700         if (i == NR_PRODUCTS) {
 701                 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 702                         " to access the SMART Array controller %08lx\n",
 703                                 (unsigned long)board_id);
 704                 return -1;
 705         }
 706
 707         return 0;
 708 }
 709
 710 /*
 711  * Map (physical) PCI mem into (virtual) kernel space
 712  */
 713 static void __iomem *remap_pci_mem(ulong base, ulong size)
 714 {
 715         ulong page_base        = ((ulong) base) & PAGE_MASK;
 716         ulong page_offs        = ((ulong) base) - page_base;
 717         void __iomem *page_remapped    = ioremap(page_base, page_offs+size);
 718
 719         return (page_remapped ? (page_remapped + page_offs) : NULL);
 720 }
 721
 722 #ifndef MODULE
 723 /*
 724  * Config string is a comma separated set of i/o addresses of EISA cards.
 725  */
 726 static int cpqarray_setup(char *str)
 727 {
 728         int i, ints[9];
 729
 730         (void)get_options(str, ARRAY_SIZE(ints), ints);
 731
 732         for(i=0; i<ints[0] && i<8; i++)
 733                 eisa[i] = ints[i+1];
 734         return 1;
 735 }
 736
 737 __setup("smart2=", cpqarray_setup);
 738
 739 #endif
 740
 741 /*
 742  * Find an EISA controller's signature.  Set up an hba if we find it.
 743  */
 744 static int __init cpqarray_eisa_detect(void)
 745 {
 746         int i=0, j;
 747         __u32 board_id;
 748         int intr;
 749         int ctlr;
 750         int num_ctlr = 0;
 751
 752         while(i<8 && eisa[i]) {
 753                 ctlr = alloc_cpqarray_hba();
 754                 if(ctlr == -1)
 755                         break;
 756                 board_id = inl(eisa[i]+0xC80);
 757                 for(j=0; j < NR_PRODUCTS; j++)
 758                         if (board_id == products[j].board_id)
 759                                 break;
 760
 761                 if (j == NR_PRODUCTS) {
 762                         printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 763                                 " to access the SMART Array controller %08lx\n",                                 (unsigned long)board_id);
 764                         continue;
 765                 }
 766
 767                 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
 768                 hba[ctlr]->io_mem_addr = eisa[i];
 769                 hba[ctlr]->io_mem_length = 0x7FF;
 770                 if(!request_region(hba[ctlr]->io_mem_addr,
 771                                 hba[ctlr]->io_mem_length,
 772                                 "cpqarray"))
 773                 {
 774                         printk(KERN_WARNING "cpqarray: I/O range already in "
 775                                         "use addr = %lx length = %ld\n",
 776                                         hba[ctlr]->io_mem_addr,
 777                                         hba[ctlr]->io_mem_length);
 778                         free_hba(ctlr);
 779                         continue;
 780                 }
 781
 782                 /*
 783                  * Read the config register to find our interrupt
 784                  */
 785                 intr = inb(eisa[i]+0xCC0) >> 4;
 786                 if (intr & 1) intr = 11;
 787                 else if (intr & 2) intr = 10;
 788                 else if (intr & 4) intr = 14;
 789                 else if (intr & 8) intr = 15;
 790
 791                 hba[ctlr]->intr = intr;
 792                 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
 793                 hba[ctlr]->product_name = products[j].product_name;
 794                 hba[ctlr]->access = *(products[j].access);
 795                 hba[ctlr]->ctlr = ctlr;
 796                 hba[ctlr]->board_id = board_id;
 797                 hba[ctlr]->pci_dev = NULL; /* not PCI */
 798
 799 DBGINFO(
 800         printk("i = %d, j = %d\n", i, j);
 801         printk("irq = %x\n", intr);
 802         printk("product name = %s\n", products[j].product_name);
 803         printk("board_id = %x\n", board_id);
 804 );
 805
 806                 num_ctlr++;
 807                 i++;
 808
 809                 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
 810                         printk(KERN_WARNING
 811                                 "cpqarray: Can't register EISA controller %d\n",
 812                                 ctlr);
 813
 814         }
 815
 816         return num_ctlr;
 817 }
 818
 819 /*
 820  * Open.  Make sure the device is really there.
 821  */
 822 static int ida_open(struct inode *inode, struct file *filep)
 823 {
 824         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
 825         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 826
 827         DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
 828         /*
 829          * Root is allowed to open raw volume zero even if it's not configured
 830          * so array config can still work.  I don't think I really like this,
 831          * but I'm already using way to many device nodes to claim another one
 832          * for "raw controller".
 833          */
 834         if (!drv->nr_blks) {
 835                 if (!capable(CAP_SYS_RAWIO))
 836                         return -ENXIO;
 837                 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
 838                         return -ENXIO;
 839         }
 840         host->usage_count++;
 841         return 0;
 842 }
 843
 844 /*
 845  * Close.  Sync first.
 846  */
 847 static int ida_release(struct inode *inode, struct file *filep)
 848 {
 849         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 850         host->usage_count--;
 851         return 0;
 852 }
 853
 854 /*
 855  * Enqueuing and dequeuing functions for cmdlists.
 856  */
 857 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
 858 {
 859         if (*Qptr == NULL) {
 860                 *Qptr = c;
 861                 c->next = c->prev = c;
 862         } else {
 863                 c->prev = (*Qptr)->prev;
 864                 c->next = (*Qptr);
 865                 (*Qptr)->prev->next = c;
 866                 (*Qptr)->prev = c;
 867         }
 868 }
 869
 870 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
 871 {
 872         if (c && c->next != c) {
 873                 if (*Qptr == c) *Qptr = c->next;
 874                 c->prev->next = c->next;
 875                 c->next->prev = c->prev;
 876         } else {
 877                 *Qptr = NULL;
 878         }
 879         return c;
 880 }
 881
 882 /*
 883  * Get a request and submit it to the controller.
 884  * This routine needs to grab all the requests it possibly can from the
 885  * req Q and submit them.  Interrupts are off (and need to be off) when you
 886  * are in here (either via the dummy do_ida_request functions or by being
 887  * called from the interrupt handler
 888  */
 889 static void do_ida_request(request_queue_t *q)
 890 {
 891         ctlr_info_t *h = q->queuedata;
 892         cmdlist_t *c;
 893         struct request *creq;
 894         struct scatterlist tmp_sg[SG_MAX];
 895         int i, dir, seg;
 896
 897         if (blk_queue_plugged(q))
 898                 goto startio;
 899
 900 queue_next:
 901         creq = elv_next_request(q);
 902         if (!creq)
 903                 goto startio;
 904
 905         BUG_ON(creq->nr_phys_segments > SG_MAX);
 906
 907         if ((c = cmd_alloc(h,1)) == NULL)
 908                 goto startio;
 909
 910         blkdev_dequeue_request(creq);
 911
 912         c->ctlr = h->ctlr;
 913         c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
 914         c->hdr.size = sizeof(rblk_t) >> 2;
 915         c->size += sizeof(rblk_t);
 916
 917         c->req.hdr.blk = creq->sector;
 918         c->rq = creq;
 919 DBGPX(
 920         printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
 921 );
 922         seg = blk_rq_map_sg(q, creq, tmp_sg);
 923
 924         /* Now do all the DMA Mappings */
 925         if (rq_data_dir(creq) == READ)
 926                 dir = PCI_DMA_FROMDEVICE;
 927         else
 928                 dir = PCI_DMA_TODEVICE;
 929         for( i=0; i < seg; i++)
 930         {
 931                 c->req.sg[i].size = tmp_sg[i].length;
 932                 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
 933                                                  tmp_sg[i].page,
 934                                                  tmp_sg[i].offset,
 935                                                  tmp_sg[i].length, dir);
 936         }
 937 DBGPX(  printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
 938         c->req.hdr.sg_cnt = seg;
 939         c->req.hdr.blk_cnt = creq->nr_sectors;
 940         c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
 941         c->type = CMD_RWREQ;
 942
 943         /* Put the request on the tail of the request queue */
 944         addQ(&h->reqQ, c);
 945         h->Qdepth++;
 946         if (h->Qdepth > h->maxQsinceinit)
 947                 h->maxQsinceinit = h->Qdepth;
 948
 949         goto queue_next;
 950
 951 startio:
 952         start_io(h);
 953 }
 954
 955 /*
 956  * start_io submits everything on a controller's request queue
 957  * and moves it to the completion queue.
 958  *
 959  * Interrupts had better be off if you're in here
 960  */
 961 static void start_io(ctlr_info_t *h)
 962 {
 963         cmdlist_t *c;
 964
 965         while((c = h->reqQ) != NULL) {
 966                 /* Can't do anything if we're busy */
 967                 if (h->access.fifo_full(h) == 0)
 968                         return;
 969
 970                 /* Get the first entry from the request Q */
 971                 removeQ(&h->reqQ, c);
 972                 h->Qdepth--;
 973
 974                 /* Tell the controller to do our bidding */
 975                 h->access.submit_command(h, c);
 976
 977                 /* Get onto the completion Q */
 978                 addQ(&h->cmpQ, c);
 979         }
 980 }
 981
 982 static inline void complete_buffers(struct bio *bio, int ok)
 983 {
 984         struct bio *xbh;
 985         while(bio) {
 986                 int nr_sectors = bio_sectors(bio);
 987
 988                 xbh = bio->bi_next;
 989                 bio->bi_next = NULL;
 990
 991                 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO);
 992
 993                 bio = xbh;
 994         }
 995 }
 996 /*
 997  * Mark all buffers that cmd was responsible for
 998  */
 999 static inline void complete_command(cmdlist_t *cmd, int timeout)
1000 {
1001         int ok=1;
1002         int i, ddir;
1003
1004         if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1005            (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1006                 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1007                                 cmd->ctlr, cmd->hdr.unit);
1008                 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1009         }
1010         if (cmd->req.hdr.rcode & RCODE_FATAL) {
1011                 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1012                                 cmd->ctlr, cmd->hdr.unit);
1013                 ok = 0;
1014         }
1015         if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1016                                 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1017                                 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1018                                 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1019                                 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1020                 ok = 0;
1021         }
1022         if (timeout) ok = 0;
1023         /* unmap the DMA mapping for all the scatter gather elements */
1024         if (cmd->req.hdr.cmd == IDA_READ)
1025                 ddir = PCI_DMA_FROMDEVICE;
1026         else
1027                 ddir = PCI_DMA_TODEVICE;
1028         for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1029                 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1030                                 cmd->req.sg[i].size, ddir);
1031
1032         complete_buffers(cmd->rq->bio, ok);
1033
1034         add_disk_randomness(cmd->rq->rq_disk);
1035
1036         DBGPX(printk("Done with %p\n", cmd->rq););
1037         end_that_request_last(cmd->rq, ok ? 1 : -EIO);
1038 }
1039
1040 /*
1041  *  The controller will interrupt us upon completion of commands.
1042  *  Find the command on the completion queue, remove it, tell the OS and
1043  *  try to queue up more IO
1044  */
1045 static irqreturn_t do_ida_intr(int irq, void *dev_id, struct pt_regs *regs)
1046 {
1047         ctlr_info_t *h = dev_id;
1048         cmdlist_t *c;
1049         unsigned long istat;
1050         unsigned long flags;
1051         __u32 a,a1;
1052
1053         istat = h->access.intr_pending(h);
1054         /* Is this interrupt for us? */
1055         if (istat == 0)
1056                 return IRQ_NONE;
1057
1058         /*
1059          * If there are completed commands in the completion queue,
1060          * we had better do something about it.
1061          */
1062         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1063         if (istat & FIFO_NOT_EMPTY) {
1064                 while((a = h->access.command_completed(h))) {
1065                         a1 = a; a &= ~3;
1066                         if ((c = h->cmpQ) == NULL)
1067                         {
1068                                 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1069                                 continue;
1070                         }
1071                         while(c->busaddr != a) {
1072                                 c = c->next;
1073                                 if (c == h->cmpQ)
1074                                         break;
1075                         }
1076                         /*
1077                          * If we've found the command, take it off the
1078                          * completion Q and free it
1079                          */
1080                         if (c->busaddr == a) {
1081                                 removeQ(&h->cmpQ, c);
1082                                 /*  Check for invalid command.
1083                                  *  Controller returns command error,
1084                                  *  But rcode = 0.
1085                                  */
1086
1087                                 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1088                                 {
1089                                         c->req.hdr.rcode = RCODE_INVREQ;
1090                                 }
1091                                 if (c->type == CMD_RWREQ) {
1092                                         complete_command(c, 0);
1093                                         cmd_free(h, c, 1);
1094                                 } else if (c->type == CMD_IOCTL_PEND) {
1095                                         c->type = CMD_IOCTL_DONE;
1096                                 }
1097                                 continue;
1098                         }
1099                 }
1100         }
1101
1102         /*
1103          * See if we can queue up some more IO
1104          */
1105         do_ida_request(h->queue);
1106         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1107         return IRQ_HANDLED;
1108 }
1109
1110 /*
1111  * This timer was for timing out requests that haven't happened after
1112  * IDA_TIMEOUT.  That wasn't such a good idea.  This timer is used to
1113  * reset a flags structure so we don't flood the user with
1114  * "Non-Fatal error" messages.
1115  */
1116 static void ida_timer(unsigned long tdata)
1117 {
1118         ctlr_info_t *h = (ctlr_info_t*)tdata;
1119
1120         h->timer.expires = jiffies + IDA_TIMER;
1121         add_timer(&h->timer);
1122         h->misc_tflags = 0;
1123 }
1124
1125 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1126 {
1127         drv_info_t *drv = get_drv(bdev->bd_disk);
1128
1129         if (drv->cylinders) {
1130                 geo->heads = drv->heads;
1131                 geo->sectors = drv->sectors;
1132                 geo->cylinders = drv->cylinders;
1133         } else {
1134                 geo->heads = 0xff;
1135                 geo->sectors = 0x3f;
1136                 geo->cylinders = drv->nr_blks / (0xff*0x3f);
1137         }
1138
1139         return 0;
1140 }
1141
1142 /*
1143  *  ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1144  *  setting readahead and submitting commands from userspace to the controller.
1145  */
1146 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1147 {
1148         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1149         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1150         int error;
1151         ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1152         ida_ioctl_t *my_io;
1153
1154         switch(cmd) {
1155         case IDAGETDRVINFO:
1156                 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1157                         return -EFAULT;
1158                 return 0;
1159         case IDAPASSTHRU:
1160                 if (!capable(CAP_SYS_RAWIO))
1161                         return -EPERM;
1162                 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1163                 if (!my_io)
1164                         return -ENOMEM;
1165                 error = -EFAULT;
1166                 if (copy_from_user(my_io, io, sizeof(*my_io)))
1167                         goto out_passthru;
1168                 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1169                 if (error)
1170                         goto out_passthru;
1171                 error = -EFAULT;
1172                 if (copy_to_user(io, my_io, sizeof(*my_io)))
1173                         goto out_passthru;
1174                 error = 0;
1175 out_passthru:
1176                 kfree(my_io);
1177                 return error;
1178         case IDAGETCTLRSIG:
1179                 if (!arg) return -EINVAL;
1180                 put_user(host->ctlr_sig, (int __user *)arg);
1181                 return 0;
1182         case IDAREVALIDATEVOLS:
1183                 if (iminor(inode) != 0)
1184                         return -ENXIO;
1185                 return revalidate_allvol(host);
1186         case IDADRIVERVERSION:
1187                 if (!arg) return -EINVAL;
1188                 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1189                 return 0;
1190         case IDAGETPCIINFO:
1191         {
1192
1193                 ida_pci_info_struct pciinfo;
1194
1195                 if (!arg) return -EINVAL;
1196                 pciinfo.bus = host->pci_dev->bus->number;
1197                 pciinfo.dev_fn = host->pci_dev->devfn;
1198                 pciinfo.board_id = host->board_id;
1199                 if(copy_to_user((void __user *) arg, &pciinfo,
1200                         sizeof( ida_pci_info_struct)))
1201                                 return -EFAULT;
1202                 return(0);
1203         }
1204
1205         default:
1206                 return -EINVAL;
1207         }
1208
1209 }
1210 /*
1211  * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1212  * The command block (io) has already been copied to kernel space for us,
1213  * however, any elements in the sglist need to be copied to kernel space
1214  * or copied back to userspace.
1215  *
1216  * Only root may perform a controller passthru command, however I'm not doing
1217  * any serious sanity checking on the arguments.  Doing an IDA_WRITE_MEDIA and
1218  * putting a 64M buffer in the sglist is probably a *bad* idea.
1219  */
1220 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1221 {
1222         int ctlr = h->ctlr;
1223         cmdlist_t *c;
1224         void *p = NULL;
1225         unsigned long flags;
1226         int error;
1227
1228         if ((c = cmd_alloc(h, 0)) == NULL)
1229                 return -ENOMEM;
1230         c->ctlr = ctlr;
1231         c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1232         c->hdr.size = sizeof(rblk_t) >> 2;
1233         c->size += sizeof(rblk_t);
1234
1235         c->req.hdr.cmd = io->cmd;
1236         c->req.hdr.blk = io->blk;
1237         c->req.hdr.blk_cnt = io->blk_cnt;
1238         c->type = CMD_IOCTL_PEND;
1239
1240         /* Pre submit processing */
1241         switch(io->cmd) {
1242         case PASSTHRU_A:
1243                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1244                 if (!p)
1245                 {
1246                         error = -ENOMEM;
1247                         cmd_free(h, c, 0);
1248                         return(error);
1249                 }
1250                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1251                         kfree(p);
1252                         cmd_free(h, c, 0);
1253                         return -EFAULT;
1254                 }
1255                 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1256                                 sizeof(ida_ioctl_t),
1257                                 PCI_DMA_BIDIRECTIONAL);
1258                 c->req.sg[0].size = io->sg[0].size;
1259                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1260                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1261                 c->req.hdr.sg_cnt = 1;
1262                 break;
1263         case IDA_READ:
1264         case READ_FLASH_ROM:
1265         case SENSE_CONTROLLER_PERFORMANCE:
1266                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1267                 if (!p)
1268                 {
1269                         error = -ENOMEM;
1270                         cmd_free(h, c, 0);
1271                         return(error);
1272                 }
1273
1274                 c->req.sg[0].size = io->sg[0].size;
1275                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1276                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1277                 c->req.hdr.sg_cnt = 1;
1278                 break;
1279         case IDA_WRITE:
1280         case IDA_WRITE_MEDIA:
1281         case DIAG_PASS_THRU:
1282         case COLLECT_BUFFER:
1283         case WRITE_FLASH_ROM:
1284                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1285                 if (!p)
1286                 {
1287                         error = -ENOMEM;
1288                         cmd_free(h, c, 0);
1289                         return(error);
1290                 }
1291                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1292                         kfree(p);
1293                         cmd_free(h, c, 0);
1294                         return -EFAULT;
1295                 }
1296                 c->req.sg[0].size = io->sg[0].size;
1297                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1298                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1299                 c->req.hdr.sg_cnt = 1;
1300                 break;
1301         default:
1302                 c->req.sg[0].size = sizeof(io->c);
1303                 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1304                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1305                 c->req.hdr.sg_cnt = 1;
1306         }
1307
1308         /* Put the request on the tail of the request queue */
1309         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1310         addQ(&h->reqQ, c);
1311         h->Qdepth++;
1312         start_io(h);
1313         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1314
1315         /* Wait for completion */
1316         while(c->type != CMD_IOCTL_DONE)
1317                 schedule();
1318
1319         /* Unmap the DMA  */
1320         pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1321                 PCI_DMA_BIDIRECTIONAL);
1322         /* Post submit processing */
1323         switch(io->cmd) {
1324         case PASSTHRU_A:
1325                 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1326                                 sizeof(ida_ioctl_t),
1327                                 PCI_DMA_BIDIRECTIONAL);
1328         case IDA_READ:
1329         case DIAG_PASS_THRU:
1330         case SENSE_CONTROLLER_PERFORMANCE:
1331         case READ_FLASH_ROM:
1332                 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1333                         kfree(p);
1334                         return -EFAULT;
1335                 }
1336                 /* fall through and free p */
1337         case IDA_WRITE:
1338         case IDA_WRITE_MEDIA:
1339         case COLLECT_BUFFER:
1340         case WRITE_FLASH_ROM:
1341                 kfree(p);
1342                 break;
1343         default:;
1344                 /* Nothing to do */
1345         }
1346
1347         io->rcode = c->req.hdr.rcode;
1348         cmd_free(h, c, 0);
1349         return(0);
1350 }
1351
1352 /*
1353  * Commands are pre-allocated in a large block.  Here we use a simple bitmap
1354  * scheme to suballocte them to the driver.  Operations that are not time
1355  * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1356  * as the first argument to get a new command.
1357  */
1358 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1359 {
1360         cmdlist_t * c;
1361         int i;
1362         dma_addr_t cmd_dhandle;
1363
1364         if (!get_from_pool) {
1365                 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1366                         sizeof(cmdlist_t), &cmd_dhandle);
1367                 if(c==NULL)
1368                         return NULL;
1369         } else {
1370                 do {
1371                         i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1372                         if (i == NR_CMDS)
1373                                 return NULL;
1374                 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1375                 c = h->cmd_pool + i;
1376                 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1377                 h->nr_allocs++;
1378         }
1379
1380         memset(c, 0, sizeof(cmdlist_t));
1381         c->busaddr = cmd_dhandle;
1382         return c;
1383 }
1384
1385 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1386 {
1387         int i;
1388
1389         if (!got_from_pool) {
1390                 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1391                         c->busaddr);
1392         } else {
1393                 i = c - h->cmd_pool;
1394                 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1395                 h->nr_frees++;
1396         }
1397 }
1398
1399 /***********************************************************************
1400     name:        sendcmd
1401     Send a command to an IDA using the memory mapped FIFO interface
1402     and wait for it to complete.
1403     This routine should only be called at init time.
1404 ***********************************************************************/
1405 static int sendcmd(
1406         __u8    cmd,
1407         int     ctlr,
1408         void    *buff,
1409         size_t  size,
1410         unsigned int blk,
1411         unsigned int blkcnt,
1412         unsigned int log_unit )
1413 {
1414         cmdlist_t *c;
1415         int complete;
1416         unsigned long temp;
1417         unsigned long i;
1418         ctlr_info_t *info_p = hba[ctlr];
1419
1420         c = cmd_alloc(info_p, 1);
1421         if(!c)
1422                 return IO_ERROR;
1423         c->ctlr = ctlr;
1424         c->hdr.unit = log_unit;
1425         c->hdr.prio = 0;
1426         c->hdr.size = sizeof(rblk_t) >> 2;
1427         c->size += sizeof(rblk_t);
1428
1429         /* The request information. */
1430         c->req.hdr.next = 0;
1431         c->req.hdr.rcode = 0;
1432         c->req.bp = 0;
1433         c->req.hdr.sg_cnt = 1;
1434         c->req.hdr.reserved = 0;
1435
1436         if (size == 0)
1437                 c->req.sg[0].size = 512;
1438         else
1439                 c->req.sg[0].size = size;
1440
1441         c->req.hdr.blk = blk;
1442         c->req.hdr.blk_cnt = blkcnt;
1443         c->req.hdr.cmd = (unsigned char) cmd;
1444         c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1445                 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1446         /*
1447          * Disable interrupt
1448          */
1449         info_p->access.set_intr_mask(info_p, 0);
1450         /* Make sure there is room in the command FIFO */
1451         /* Actually it should be completely empty at this time. */
1452         for (i = 200000; i > 0; i--) {
1453                 temp = info_p->access.fifo_full(info_p);
1454                 if (temp != 0) {
1455                         break;
1456                 }
1457                 udelay(10);
1458 DBG(
1459                 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1460                         " waiting!\n", ctlr);
1461 );
1462         }
1463         /*
1464          * Send the cmd
1465          */
1466         info_p->access.submit_command(info_p, c);
1467         complete = pollcomplete(ctlr);
1468
1469         pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1470                 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1471         if (complete != 1) {
1472                 if (complete != c->busaddr) {
1473                         printk( KERN_WARNING
1474                         "cpqarray ida%d: idaSendPciCmd "
1475                       "Invalid command list address returned! (%08lx)\n",
1476                                 ctlr, (unsigned long)complete);
1477                         cmd_free(info_p, c, 1);
1478                         return (IO_ERROR);
1479                 }
1480         } else {
1481                 printk( KERN_WARNING
1482                         "cpqarray ida%d: idaSendPciCmd Timeout out, "
1483                         "No command list address returned!\n",
1484                         ctlr);
1485                 cmd_free(info_p, c, 1);
1486                 return (IO_ERROR);
1487         }
1488
1489         if (c->req.hdr.rcode & 0x00FE) {
1490                 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1491                         printk( KERN_WARNING
1492                         "cpqarray ida%d: idaSendPciCmd, error: "
1493                                 "Controller failed at init time "
1494                                 "cmd: 0x%x, return code = 0x%x\n",
1495                                 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1496
1497                         cmd_free(info_p, c, 1);
1498                         return (IO_ERROR);
1499                 }
1500         }
1501         cmd_free(info_p, c, 1);
1502         return (IO_OK);
1503 }
1504
1505 /*
1506  * revalidate_allvol is for online array config utilities.  After a
1507  * utility reconfigures the drives in the array, it can use this function
1508  * (through an ioctl) to make the driver zap any previous disk structs for
1509  * that controller and get new ones.
1510  *
1511  * Right now I'm using the getgeometry() function to do this, but this
1512  * function should probably be finer grained and allow you to revalidate one
1513  * particualar logical volume (instead of all of them on a particular
1514  * controller).
1515  */
1516 static int revalidate_allvol(ctlr_info_t *host)
1517 {
1518         int ctlr = host->ctlr;
1519         int i;
1520         unsigned long flags;
1521
1522         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1523         if (host->usage_count > 1) {
1524                 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1525                 printk(KERN_WARNING "cpqarray: Device busy for volume"
1526                         " revalidation (usage=%d)\n", host->usage_count);
1527                 return -EBUSY;
1528         }
1529         host->usage_count++;
1530         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1531
1532         /*
1533          * Set the partition and block size structures for all volumes
1534          * on this controller to zero.  We will reread all of this data
1535          */
1536         set_capacity(ida_gendisk[ctlr][0], 0);
1537         for (i = 1; i < NWD; i++) {
1538                 struct gendisk *disk = ida_gendisk[ctlr][i];
1539                 if (disk->flags & GENHD_FL_UP)
1540                         del_gendisk(disk);
1541         }
1542         memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1543
1544         /*
1545          * Tell the array controller not to give us any interrupts while
1546          * we check the new geometry.  Then turn interrupts back on when
1547          * we're done.
1548          */
1549         host->access.set_intr_mask(host, 0);
1550         getgeometry(ctlr);
1551         host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1552
1553         for(i=0; i<NWD; i++) {
1554                 struct gendisk *disk = ida_gendisk[ctlr][i];
1555                 drv_info_t *drv = &host->drv[i];
1556                 if (i && !drv->nr_blks)
1557                         continue;
1558                 blk_queue_hardsect_size(host->queue, drv->blk_size);
1559                 set_capacity(disk, drv->nr_blks);
1560                 disk->queue = host->queue;
1561                 disk->private_data = drv;
1562                 if (i)
1563                         add_disk(disk);
1564         }
1565
1566         host->usage_count--;
1567         return 0;
1568 }
1569
1570 static int ida_revalidate(struct gendisk *disk)
1571 {
1572         drv_info_t *drv = disk->private_data;
1573         set_capacity(disk, drv->nr_blks);
1574         return 0;
1575 }
1576
1577 /********************************************************************
1578     name: pollcomplete
1579     Wait polling for a command to complete.
1580     The memory mapped FIFO is polled for the completion.
1581     Used only at init time, interrupts disabled.
1582  ********************************************************************/
1583 static int pollcomplete(int ctlr)
1584 {
1585         int done;
1586         int i;
1587
1588         /* Wait (up to 2 seconds) for a command to complete */
1589
1590         for (i = 200000; i > 0; i--) {
1591                 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1592                 if (done == 0) {
1593                         udelay(10);     /* a short fixed delay */
1594                 } else
1595                         return (done);
1596         }
1597         /* Invalid address to tell caller we ran out of time */
1598         return 1;
1599 }
1600 /*****************************************************************
1601     start_fwbk
1602     Starts controller firmwares background processing.
1603     Currently only the Integrated Raid controller needs this done.
1604     If the PCI mem address registers are written to after this,
1605          data corruption may occur
1606 *****************************************************************/
1607 static void start_fwbk(int ctlr)
1608 {
1609                 id_ctlr_t *id_ctlr_buf;
1610         int ret_code;
1611
1612         if(     (hba[ctlr]->board_id != 0x40400E11)
1613                 && (hba[ctlr]->board_id != 0x40480E11) )
1614
1615         /* Not a Integrated Raid, so there is nothing for us to do */
1616                 return;
1617         printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1618                 " processing\n");
1619         /* Command does not return anything, but idasend command needs a
1620                 buffer */
1621         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1622         if(id_ctlr_buf==NULL)
1623         {
1624                 printk(KERN_WARNING "cpqarray: Out of memory. "
1625                         "Unable to start background processing.\n");
1626                 return;
1627         }
1628         ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1629                 id_ctlr_buf, 0, 0, 0, 0);
1630         if(ret_code != IO_OK)
1631                 printk(KERN_WARNING "cpqarray: Unable to start"
1632                         " background processing\n");
1633
1634         kfree(id_ctlr_buf);
1635 }
1636 /*****************************************************************
1637     getgeometry
1638     Get ida logical volume geometry from the controller
1639     This is a large bit of code which once existed in two flavors,
1640     It is used only at init time.
1641 *****************************************************************/
1642 static void getgeometry(int ctlr)
1643 {
1644         id_log_drv_t *id_ldrive;
1645         id_ctlr_t *id_ctlr_buf;
1646         sense_log_drv_stat_t *id_lstatus_buf;
1647         config_t *sense_config_buf;
1648         unsigned int log_unit, log_index;
1649         int ret_code, size;
1650         drv_info_t *drv;
1651         ctlr_info_t *info_p = hba[ctlr];
1652         int i;
1653
1654         info_p->log_drv_map = 0;
1655
1656         id_ldrive = (id_log_drv_t *)kmalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1657         if(id_ldrive == NULL)
1658         {
1659                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1660                 return;
1661         }
1662
1663         id_ctlr_buf = (id_ctlr_t *)kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1664         if(id_ctlr_buf == NULL)
1665         {
1666                 kfree(id_ldrive);
1667                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1668                 return;
1669         }
1670
1671         id_lstatus_buf = (sense_log_drv_stat_t *)kmalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1672         if(id_lstatus_buf == NULL)
1673         {
1674                 kfree(id_ctlr_buf);
1675                 kfree(id_ldrive);
1676                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1677                 return;
1678         }
1679
1680         sense_config_buf = (config_t *)kmalloc(sizeof(config_t), GFP_KERNEL);
1681         if(sense_config_buf == NULL)
1682         {
1683                 kfree(id_lstatus_buf);
1684                 kfree(id_ctlr_buf);
1685                 kfree(id_ldrive);
1686                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1687                 return;
1688         }
1689
1690         memset(id_ldrive, 0, sizeof(id_log_drv_t));
1691         memset(id_ctlr_buf, 0, sizeof(id_ctlr_t));
1692         memset(id_lstatus_buf, 0, sizeof(sense_log_drv_stat_t));
1693         memset(sense_config_buf, 0, sizeof(config_t));
1694
1695         info_p->phys_drives = 0;
1696         info_p->log_drv_map = 0;
1697         info_p->drv_assign_map = 0;
1698         info_p->drv_spare_map = 0;
1699         info_p->mp_failed_drv_map = 0;  /* only initialized here */
1700         /* Get controllers info for this logical drive */
1701         ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1702         if (ret_code == IO_ERROR) {
1703                 /*
1704                  * If can't get controller info, set the logical drive map to 0,
1705                  * so the idastubopen will fail on all logical drives
1706                  * on the controller.
1707                  */
1708                  /* Free all the buffers and return */
1709                 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1710                 kfree(sense_config_buf);
1711                 kfree(id_lstatus_buf);
1712                 kfree(id_ctlr_buf);
1713                 kfree(id_ldrive);
1714                 return;
1715         }
1716
1717         info_p->log_drives = id_ctlr_buf->nr_drvs;
1718         for(i=0;i<4;i++)
1719                 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1720         info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1721
1722         printk(" (%s)\n", info_p->product_name);
1723         /*
1724          * Initialize logical drive map to zero
1725          */
1726         log_index = 0;
1727         /*
1728          * Get drive geometry for all logical drives
1729          */
1730         if (id_ctlr_buf->nr_drvs > 16)
1731                 printk(KERN_WARNING "cpqarray ida%d:  This driver supports "
1732                         "16 logical drives per controller.\n.  "
1733                         " Additional drives will not be "
1734                         "detected\n", ctlr);
1735
1736         for (log_unit = 0;
1737              (log_index < id_ctlr_buf->nr_drvs)
1738              && (log_unit < NWD);
1739              log_unit++) {
1740                 size = sizeof(sense_log_drv_stat_t);
1741
1742                 /*
1743                    Send "Identify logical drive status" cmd
1744                  */
1745                 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1746                              ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1747                 if (ret_code == IO_ERROR) {
1748                         /*
1749                            If can't get logical drive status, set
1750                            the logical drive map to 0, so the
1751                            idastubopen will fail for all logical drives
1752                            on the controller.
1753                          */
1754                         info_p->log_drv_map = 0;
1755                         printk( KERN_WARNING
1756                              "cpqarray ida%d: idaGetGeometry - Controller"
1757                                 " failed to report status of logical drive %d\n"
1758                          "Access to this controller has been disabled\n",
1759                                 ctlr, log_unit);
1760                         /* Free all the buffers and return */
1761                         kfree(sense_config_buf);
1762                         kfree(id_lstatus_buf);
1763                         kfree(id_ctlr_buf);
1764                         kfree(id_ldrive);
1765                         return;
1766                 }
1767                 /*
1768                    Make sure the logical drive is configured
1769                  */
1770                 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1771                         ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1772                                sizeof(id_log_drv_t), 0, 0, log_unit);
1773                         /*
1774                            If error, the bit for this
1775                            logical drive won't be set and
1776                            idastubopen will return error.
1777                          */
1778                         if (ret_code != IO_ERROR) {
1779                                 drv = &info_p->drv[log_unit];
1780                                 drv->blk_size = id_ldrive->blk_size;
1781                                 drv->nr_blks = id_ldrive->nr_blks;
1782                                 drv->cylinders = id_ldrive->drv.cyl;
1783                                 drv->heads = id_ldrive->drv.heads;
1784                                 drv->sectors = id_ldrive->drv.sect_per_track;
1785                                 info_p->log_drv_map |=  (1 << log_unit);
1786
1787         printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1788                 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1789                                 ret_code = sendcmd(SENSE_CONFIG,
1790                                                   ctlr, sense_config_buf,
1791                                  sizeof(config_t), 0, 0, log_unit);
1792                                 if (ret_code == IO_ERROR) {
1793                                         info_p->log_drv_map = 0;
1794                                         /* Free all the buffers and return */
1795                                         printk(KERN_ERR "cpqarray: error sending sense config\n");
1796                                         kfree(sense_config_buf);
1797                                         kfree(id_lstatus_buf);
1798                                         kfree(id_ctlr_buf);
1799                                         kfree(id_ldrive);
1800                                         return;
1801
1802                                 }
1803
1804                                 info_p->phys_drives =
1805                                     sense_config_buf->ctlr_phys_drv;
1806                                 info_p->drv_assign_map
1807                                     |= sense_config_buf->drv_asgn_map;
1808                                 info_p->drv_assign_map
1809                                     |= sense_config_buf->spare_asgn_map;
1810                                 info_p->drv_spare_map
1811                                     |= sense_config_buf->spare_asgn_map;
1812                         }       /* end of if no error on id_ldrive */
1813                         log_index = log_index + 1;
1814                 }               /* end of if logical drive configured */
1815         }                       /* end of for log_unit */
1816         kfree(sense_config_buf);
1817         kfree(id_ldrive);
1818         kfree(id_lstatus_buf);
1819         kfree(id_ctlr_buf);
1820         return;
1821
1822 }
1823
1824 static void __exit cpqarray_exit(void)
1825 {
1826         int i;
1827
1828         pci_unregister_driver(&cpqarray_pci_driver);
1829
1830         /* Double check that all controller entries have been removed */
1831         for(i=0; i<MAX_CTLR; i++) {
1832                 if (hba[i] != NULL) {
1833                         printk(KERN_WARNING "cpqarray: Removing EISA "
1834                                         "controller %d\n", i);
1835                         cpqarray_remove_one_eisa(i);
1836                 }
1837         }
1838
1839         remove_proc_entry("cpqarray", proc_root_driver);
1840 }
1841
1842 module_init(cpqarray_init)
1843 module_exit(cpqarray_exit)