3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
34 #include <media/v4l2-common.h>
37 #include "mt352_priv.h"
38 #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
39 # include "cx88-vp3054-i2c.h"
50 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
51 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
52 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
53 MODULE_LICENSE("GPL");
55 static unsigned int debug = 0;
56 module_param(debug, int, 0644);
57 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
59 #define dprintk(level,fmt, arg...) if (debug >= level) \
60 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
62 /* ------------------------------------------------------------------ */
64 static int dvb_buf_setup(struct videobuf_queue *q,
65 unsigned int *count, unsigned int *size)
67 struct cx8802_dev *dev = q->priv_data;
69 dev->ts_packet_size = 188 * 4;
70 dev->ts_packet_count = 32;
72 *size = dev->ts_packet_size * dev->ts_packet_count;
77 static int dvb_buf_prepare(struct videobuf_queue *q,
78 struct videobuf_buffer *vb, enum v4l2_field field)
80 struct cx8802_dev *dev = q->priv_data;
81 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
84 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
86 struct cx8802_dev *dev = q->priv_data;
87 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
90 static void dvb_buf_release(struct videobuf_queue *q,
91 struct videobuf_buffer *vb)
93 cx88_free_buffer(q, (struct cx88_buffer*)vb);
96 static struct videobuf_queue_ops dvb_qops = {
97 .buf_setup = dvb_buf_setup,
98 .buf_prepare = dvb_buf_prepare,
99 .buf_queue = dvb_buf_queue,
100 .buf_release = dvb_buf_release,
103 /* ------------------------------------------------------------------ */
105 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
107 struct cx8802_dev *dev= fe->dvb->priv;
108 struct cx8802_driver *drv = NULL;
111 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
114 ret = drv->request_acquire(drv);
116 ret = drv->request_release(drv);
122 /* ------------------------------------------------------------------ */
124 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
126 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
127 static u8 reset [] = { RESET, 0x80 };
128 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
129 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
130 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
131 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
133 mt352_write(fe, clock_config, sizeof(clock_config));
135 mt352_write(fe, reset, sizeof(reset));
136 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
138 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
139 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
140 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
144 static int dvico_dual_demod_init(struct dvb_frontend *fe)
146 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
147 static u8 reset [] = { RESET, 0x80 };
148 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
149 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
150 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
151 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
153 mt352_write(fe, clock_config, sizeof(clock_config));
155 mt352_write(fe, reset, sizeof(reset));
156 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
158 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
159 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
160 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
165 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
167 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
168 static u8 reset [] = { 0x50, 0x80 };
169 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
170 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
171 0x00, 0xFF, 0x00, 0x40, 0x40 };
172 static u8 dntv_extra[] = { 0xB5, 0x7A };
173 static u8 capt_range_cfg[] = { 0x75, 0x32 };
175 mt352_write(fe, clock_config, sizeof(clock_config));
177 mt352_write(fe, reset, sizeof(reset));
178 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
180 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
182 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
183 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
188 static struct mt352_config dvico_fusionhdtv = {
189 .demod_address = 0x0f,
190 .demod_init = dvico_fusionhdtv_demod_init,
193 static struct mt352_config dntv_live_dvbt_config = {
194 .demod_address = 0x0f,
195 .demod_init = dntv_live_dvbt_demod_init,
198 static struct mt352_config dvico_fusionhdtv_dual = {
199 .demod_address = 0x0f,
200 .demod_init = dvico_dual_demod_init,
203 #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
204 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
206 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
207 static u8 reset [] = { 0x50, 0x80 };
208 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
209 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
210 0x00, 0xFF, 0x00, 0x40, 0x40 };
211 static u8 dntv_extra[] = { 0xB5, 0x7A };
212 static u8 capt_range_cfg[] = { 0x75, 0x32 };
214 mt352_write(fe, clock_config, sizeof(clock_config));
216 mt352_write(fe, reset, sizeof(reset));
217 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
219 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
221 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
222 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
227 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
229 struct cx8802_dev *dev= fe->dvb->priv;
231 /* this message is to set up ATC and ALC */
232 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
234 { .addr = dev->core->pll_addr, .flags = 0,
235 .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
238 if (fe->ops.i2c_gate_ctrl)
239 fe->ops.i2c_gate_ctrl(fe, 1);
240 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
250 static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
251 struct dvb_frontend_parameters* params)
253 struct cx8802_dev *dev= fe->dvb->priv;
256 { .addr = dev->core->pll_addr, .flags = 0,
257 .buf = buf, .len = 4 };
260 /* Switch PLL to DVB mode */
261 err = philips_fmd1216_pll_init(fe);
266 dvb_pll_configure(dev->core->pll_desc, buf,
268 params->u.ofdm.bandwidth);
269 if (fe->ops.i2c_gate_ctrl)
270 fe->ops.i2c_gate_ctrl(fe, 1);
271 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
273 printk(KERN_WARNING "cx88-dvb: %s error "
274 "(addr %02x <- %02x, err = %i)\n",
275 __FUNCTION__, dev->core->pll_addr, buf[0], err);
285 static struct mt352_config dntv_live_dvbt_pro_config = {
286 .demod_address = 0x0f,
288 .demod_init = dntv_live_dvbt_pro_demod_init,
292 static struct zl10353_config dvico_fusionhdtv_hybrid = {
293 .demod_address = 0x0f,
297 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
298 .demod_address = 0x0f,
301 static struct cx22702_config connexant_refboard_config = {
302 .demod_address = 0x43,
303 .output_mode = CX22702_SERIAL_OUTPUT,
306 static struct cx22702_config hauppauge_hvr_config = {
307 .demod_address = 0x63,
308 .output_mode = CX22702_SERIAL_OUTPUT,
311 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
313 struct cx8802_dev *dev= fe->dvb->priv;
314 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
318 static struct or51132_config pchdtv_hd3000 = {
319 .demod_address = 0x15,
320 .set_ts_params = or51132_set_ts_param,
323 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
325 struct cx8802_dev *dev= fe->dvb->priv;
326 struct cx88_core *core = dev->core;
328 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
330 cx_clear(MO_GP0_IO, 8);
332 cx_set(MO_GP0_IO, 8);
336 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
338 struct cx8802_dev *dev= fe->dvb->priv;
340 dev->ts_gen_cntrl |= 0x04;
342 dev->ts_gen_cntrl &= ~0x04;
346 static struct lgdt330x_config fusionhdtv_3_gold = {
347 .demod_address = 0x0e,
348 .demod_chip = LGDT3302,
349 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
350 .set_ts_params = lgdt330x_set_ts_param,
353 static struct lgdt330x_config fusionhdtv_5_gold = {
354 .demod_address = 0x0e,
355 .demod_chip = LGDT3303,
356 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
357 .set_ts_params = lgdt330x_set_ts_param,
360 static struct lgdt330x_config pchdtv_hd5500 = {
361 .demod_address = 0x59,
362 .demod_chip = LGDT3303,
363 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
364 .set_ts_params = lgdt330x_set_ts_param,
367 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
369 struct cx8802_dev *dev= fe->dvb->priv;
370 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
374 static int nxt200x_set_pll_input(u8* buf, int input)
383 static struct nxt200x_config ati_hdtvwonder = {
384 .demod_address = 0x0a,
385 .set_pll_input = nxt200x_set_pll_input,
386 .set_ts_params = nxt200x_set_ts_param,
389 static int cx24123_set_ts_param(struct dvb_frontend* fe,
392 struct cx8802_dev *dev= fe->dvb->priv;
393 dev->ts_gen_cntrl = 0x02;
397 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
398 fe_sec_voltage_t voltage)
400 struct cx8802_dev *dev= fe->dvb->priv;
401 struct cx88_core *core = dev->core;
403 if (voltage == SEC_VOLTAGE_OFF)
404 cx_write(MO_GP0_IO, 0x000006fb);
406 cx_write(MO_GP0_IO, 0x000006f9);
408 if (core->prev_set_voltage)
409 return core->prev_set_voltage(fe, voltage);
413 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
414 fe_sec_voltage_t voltage)
416 struct cx8802_dev *dev= fe->dvb->priv;
417 struct cx88_core *core = dev->core;
419 if (voltage == SEC_VOLTAGE_OFF) {
420 dprintk(1,"LNB Voltage OFF\n");
421 cx_write(MO_GP0_IO, 0x0000efff);
424 if (core->prev_set_voltage)
425 return core->prev_set_voltage(fe, voltage);
429 static struct cx24123_config geniatech_dvbs_config = {
430 .demod_address = 0x55,
431 .set_ts_params = cx24123_set_ts_param,
434 static struct cx24123_config hauppauge_novas_config = {
435 .demod_address = 0x55,
436 .set_ts_params = cx24123_set_ts_param,
439 static struct cx24123_config kworld_dvbs_100_config = {
440 .demod_address = 0x15,
441 .set_ts_params = cx24123_set_ts_param,
445 static int dvb_register(struct cx8802_dev *dev)
447 /* init struct videobuf_dvb */
448 dev->dvb.name = dev->core->name;
449 dev->ts_gen_cntrl = 0x0c;
452 switch (dev->core->board) {
453 case CX88_BOARD_HAUPPAUGE_DVB_T1:
454 dev->dvb.frontend = dvb_attach(cx22702_attach,
455 &connexant_refboard_config,
456 &dev->core->i2c_adap);
457 if (dev->dvb.frontend != NULL) {
458 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
459 &dev->core->i2c_adap,
460 &dvb_pll_thomson_dtt759x);
463 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
464 case CX88_BOARD_CONEXANT_DVB_T1:
465 case CX88_BOARD_KWORLD_DVB_T_CX22702:
466 case CX88_BOARD_WINFAST_DTV1000:
467 dev->dvb.frontend = dvb_attach(cx22702_attach,
468 &connexant_refboard_config,
469 &dev->core->i2c_adap);
470 if (dev->dvb.frontend != NULL) {
471 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
472 &dev->core->i2c_adap,
473 &dvb_pll_thomson_dtt7579);
476 case CX88_BOARD_WINFAST_DTV2000H:
477 case CX88_BOARD_HAUPPAUGE_HVR1100:
478 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
479 dev->dvb.frontend = dvb_attach(cx22702_attach,
480 &hauppauge_hvr_config,
481 &dev->core->i2c_adap);
482 if (dev->dvb.frontend != NULL) {
483 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
484 &dev->core->i2c_adap, &dvb_pll_fmd1216me);
487 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
488 dev->dvb.frontend = dvb_attach(mt352_attach,
490 &dev->core->i2c_adap);
491 if (dev->dvb.frontend != NULL) {
492 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
493 NULL, &dvb_pll_thomson_dtt7579);
496 /* ZL10353 replaces MT352 on later cards */
497 dev->dvb.frontend = dvb_attach(zl10353_attach,
498 &dvico_fusionhdtv_plus_v1_1,
499 &dev->core->i2c_adap);
500 if (dev->dvb.frontend != NULL) {
501 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
502 NULL, &dvb_pll_thomson_dtt7579);
505 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
506 /* The tin box says DEE1601, but it seems to be DTT7579
507 * compatible, with a slightly different MT352 AGC gain. */
508 dev->dvb.frontend = dvb_attach(mt352_attach,
509 &dvico_fusionhdtv_dual,
510 &dev->core->i2c_adap);
511 if (dev->dvb.frontend != NULL) {
512 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
513 NULL, &dvb_pll_thomson_dtt7579);
516 /* ZL10353 replaces MT352 on later cards */
517 dev->dvb.frontend = dvb_attach(zl10353_attach,
518 &dvico_fusionhdtv_plus_v1_1,
519 &dev->core->i2c_adap);
520 if (dev->dvb.frontend != NULL) {
521 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
522 NULL, &dvb_pll_thomson_dtt7579);
525 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
526 dev->dvb.frontend = dvb_attach(mt352_attach,
528 &dev->core->i2c_adap);
529 if (dev->dvb.frontend != NULL) {
530 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
531 NULL, &dvb_pll_lg_z201);
534 case CX88_BOARD_KWORLD_DVB_T:
535 case CX88_BOARD_DNTV_LIVE_DVB_T:
536 case CX88_BOARD_ADSTECH_DVB_T_PCI:
537 dev->dvb.frontend = dvb_attach(mt352_attach,
538 &dntv_live_dvbt_config,
539 &dev->core->i2c_adap);
540 if (dev->dvb.frontend != NULL) {
541 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
542 NULL, &dvb_pll_unknown_1);
545 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
546 #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
547 dev->core->pll_addr = 0x61;
548 dev->core->pll_desc = &dvb_pll_fmd1216me;
549 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
550 &((struct vp3054_i2c_state *)dev->card_priv)->adap);
551 if (dev->dvb.frontend != NULL) {
552 dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
555 printk("%s: built without vp3054 support\n", dev->core->name);
558 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
559 dev->dvb.frontend = dvb_attach(zl10353_attach,
560 &dvico_fusionhdtv_hybrid,
561 &dev->core->i2c_adap);
562 if (dev->dvb.frontend != NULL) {
563 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
564 &dev->core->i2c_adap,
565 &dvb_pll_thomson_fe6600);
568 case CX88_BOARD_PCHDTV_HD3000:
569 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
570 &dev->core->i2c_adap);
571 if (dev->dvb.frontend != NULL) {
572 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
573 &dev->core->i2c_adap,
574 &dvb_pll_thomson_dtt761x);
577 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
578 dev->ts_gen_cntrl = 0x08;
580 /* Do a hardware reset of chip before using it. */
581 struct cx88_core *core = dev->core;
583 cx_clear(MO_GP0_IO, 1);
585 cx_set(MO_GP0_IO, 1);
588 /* Select RF connector callback */
589 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
590 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
592 &dev->core->i2c_adap);
593 if (dev->dvb.frontend != NULL) {
594 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
595 &dev->core->i2c_adap,
596 &dvb_pll_microtune_4042);
600 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
601 dev->ts_gen_cntrl = 0x08;
603 /* Do a hardware reset of chip before using it. */
604 struct cx88_core *core = dev->core;
606 cx_clear(MO_GP0_IO, 1);
608 cx_set(MO_GP0_IO, 9);
610 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
612 &dev->core->i2c_adap);
613 if (dev->dvb.frontend != NULL) {
614 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
615 &dev->core->i2c_adap,
616 &dvb_pll_thomson_dtt761x);
620 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
621 dev->ts_gen_cntrl = 0x08;
623 /* Do a hardware reset of chip before using it. */
624 struct cx88_core *core = dev->core;
626 cx_clear(MO_GP0_IO, 1);
628 cx_set(MO_GP0_IO, 1);
630 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
632 &dev->core->i2c_adap);
633 if (dev->dvb.frontend != NULL) {
634 dvb_attach(lgh06xf_attach, dev->dvb.frontend,
635 &dev->core->i2c_adap);
639 case CX88_BOARD_PCHDTV_HD5500:
640 dev->ts_gen_cntrl = 0x08;
642 /* Do a hardware reset of chip before using it. */
643 struct cx88_core *core = dev->core;
645 cx_clear(MO_GP0_IO, 1);
647 cx_set(MO_GP0_IO, 1);
649 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
651 &dev->core->i2c_adap);
652 if (dev->dvb.frontend != NULL) {
653 dvb_attach(lgh06xf_attach, dev->dvb.frontend,
654 &dev->core->i2c_adap);
658 case CX88_BOARD_ATI_HDTVWONDER:
659 dev->dvb.frontend = dvb_attach(nxt200x_attach,
661 &dev->core->i2c_adap);
662 if (dev->dvb.frontend != NULL) {
663 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
664 NULL, &dvb_pll_tuv1236d);
667 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
668 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
669 dev->dvb.frontend = dvb_attach(cx24123_attach,
670 &hauppauge_novas_config,
671 &dev->core->i2c_adap);
672 if (dev->dvb.frontend) {
673 dvb_attach(isl6421_attach, dev->dvb.frontend,
674 &dev->core->i2c_adap, 0x08, 0x00, 0x00);
677 case CX88_BOARD_KWORLD_DVBS_100:
678 dev->dvb.frontend = dvb_attach(cx24123_attach,
679 &kworld_dvbs_100_config,
680 &dev->core->i2c_adap);
681 if (dev->dvb.frontend) {
682 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
683 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
686 case CX88_BOARD_GENIATECH_DVBS:
687 dev->dvb.frontend = dvb_attach(cx24123_attach,
688 &geniatech_dvbs_config,
689 &dev->core->i2c_adap);
690 if (dev->dvb.frontend) {
691 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
692 dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
695 case CX88_BOARD_HAUPPAUGE_HVR1300:
696 dev->dvb.frontend = dvb_attach(cx22702_attach,
697 &hauppauge_hvr_config,
698 &dev->core->i2c_adap);
699 if (dev->dvb.frontend != NULL) {
700 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
701 &dev->core->i2c_adap, &dvb_pll_fmd1216me);
704 case CX88_BOARD_HAUPPAUGE_HVR3000:
705 dev->dvb.frontend = dvb_attach(cx22702_attach,
706 &hauppauge_hvr_config,
707 &dev->core->i2c_adap);
708 if (dev->dvb.frontend != NULL) {
709 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
710 &dev->core->i2c_adap, &dvb_pll_fmd1216me);
714 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
718 if (NULL == dev->dvb.frontend) {
719 printk("%s: frontend initialization failed\n",dev->core->name);
723 if (dev->core->pll_desc) {
724 dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
725 dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
727 /* Ensure all frontends negotiate bus access */
728 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
730 /* Put the analog decoder in standby to keep it quiet */
731 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
733 /* register everything */
734 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
737 /* ----------------------------------------------------------- */
739 /* CX8802 MPEG -> mini driver - We have been given the hardware */
740 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
742 struct cx88_core *core = drv->core;
744 dprintk( 1, "%s\n", __FUNCTION__);
746 switch (core->board) {
747 case CX88_BOARD_HAUPPAUGE_HVR1300:
748 /* We arrive here with either the cx23416 or the cx22702
749 * on the bus. Take the bus from the cx23416 and enable the
752 cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
753 cx_clear(MO_GP0_IO, 0x00000004);
762 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
763 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
765 struct cx88_core *core = drv->core;
767 dprintk( 1, "%s\n", __FUNCTION__);
769 switch (core->board) {
770 case CX88_BOARD_HAUPPAUGE_HVR1300:
771 /* Do Nothing, leave the cx22702 on the bus. */
779 static int cx8802_dvb_probe(struct cx8802_driver *drv)
781 struct cx88_core *core = drv->core;
782 struct cx8802_dev *dev = drv->core->dvbdev;
785 dprintk( 1, "%s\n", __FUNCTION__);
786 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
793 if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
796 #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
797 err = vp3054_i2c_probe(dev);
803 printk("%s/2: cx2388x based dvb card\n", core->name);
804 videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
805 dev->pci, &dev->slock,
806 V4L2_BUF_TYPE_VIDEO_CAPTURE,
808 sizeof(struct cx88_buffer),
810 err = dvb_register(dev);
812 printk("%s dvb_register failed err = %d\n", __FUNCTION__, err);
818 static int cx8802_dvb_remove(struct cx8802_driver *drv)
820 struct cx8802_dev *dev = drv->core->dvbdev;
823 videobuf_dvb_unregister(&dev->dvb);
825 #if defined(CONFIG_VIDEO_CX88_VP3054) || defined(CONFIG_VIDEO_CX88_VP3054_MODULE)
826 vp3054_i2c_remove(dev);
832 static struct cx8802_driver cx8802_dvb_driver = {
833 .type_id = CX88_MPEG_DVB,
834 .hw_access = CX8802_DRVCTL_SHARED,
835 .probe = cx8802_dvb_probe,
836 .remove = cx8802_dvb_remove,
837 .advise_acquire = cx8802_dvb_advise_acquire,
838 .advise_release = cx8802_dvb_advise_release,
841 static int dvb_init(void)
843 printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
844 (CX88_VERSION_CODE >> 16) & 0xff,
845 (CX88_VERSION_CODE >> 8) & 0xff,
846 CX88_VERSION_CODE & 0xff);
848 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
849 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
851 return cx8802_register_driver(&cx8802_dvb_driver);
854 static void dvb_fini(void)
856 cx8802_unregister_driver(&cx8802_dvb_driver);
859 module_init(dvb_init);
860 module_exit(dvb_fini);
865 * compile-command: "make DVB=1"