Staging: rt2870: remove dead EXT_BUILD_CHANNEL_LIST code
[linux-2.6] / drivers / staging / rt2870 / common / rtmp_init.c
1 /*
2  *************************************************************************
3  * Ralink Tech Inc.
4  * 5F., No.36, Taiyuan St., Jhubei City,
5  * Hsinchu County 302,
6  * Taiwan, R.O.C.
7  *
8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
9  *
10  * This program is free software; you can redistribute it and/or modify  *
11  * it under the terms of the GNU General Public License as published by  *
12  * the Free Software Foundation; either version 2 of the License, or     *
13  * (at your option) any later version.                                   *
14  *                                                                       *
15  * This program is distributed in the hope that it will be useful,       *
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
18  * GNU General Public License for more details.                          *
19  *                                                                       *
20  * You should have received a copy of the GNU General Public License     *
21  * along with this program; if not, write to the                         *
22  * Free Software Foundation, Inc.,                                       *
23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
24  *                                                                       *
25  *************************************************************************
26
27         Module Name:
28         rtmp_init.c
29
30         Abstract:
31         Miniport generic portion header file
32
33         Revision History:
34         Who         When          What
35         --------    ----------    ----------------------------------------------
36         Paul Lin    2002-08-01    created
37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
39 */
40 #include "../rt_config.h"
41 #include "firmware.h"
42
43 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
44 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
45                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
46                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
47                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
48                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
49                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
50                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
51                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
52
53 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
54
55 const unsigned short ccitt_16Table[] = {
56         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
57         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
58         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
59         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
60         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
61         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
62         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
63         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
64         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
65         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
66         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
67         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
68         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
69         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
70         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
71         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
72         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
73         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
74         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
75         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
76         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
77         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
78         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
79         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
80         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
81         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
82         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
83         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
84         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
85         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
86         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
87         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
88 };
89 #define ByteCRC16(v, crc) \
90         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
91
92 unsigned char BitReverse(unsigned char x)
93 {
94         int i;
95         unsigned char Temp=0;
96         for(i=0; ; i++)
97         {
98                 if(x & 0x80)    Temp |= 0x80;
99                 if(i==7)                break;
100                 x       <<= 1;
101                 Temp >>= 1;
102         }
103         return Temp;
104 }
105
106 //
107 // BBP register initialization set
108 //
109 REG_PAIR   BBPRegTable[] = {
110         {BBP_R65,               0x2C},          // fix rssi issue
111         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
112         {BBP_R69,               0x12},
113         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
114         {BBP_R73,               0x10},
115         {BBP_R81,               0x37},
116         {BBP_R82,               0x62},
117         {BBP_R83,               0x6A},
118         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
119         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
120         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
121         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
122         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
123         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
124 };
125 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
126
127 //
128 // RF register initialization set
129 //
130 #ifdef RT2870
131 REG_PAIR   RT30xx_RFRegTable[] = {
132         {RF_R04,          0x40},
133         {RF_R05,          0x03},
134         {RF_R06,          0x02},
135         {RF_R07,          0x70},
136         {RF_R09,          0x0F},
137         {RF_R10,          0x71},
138         {RF_R11,          0x21},
139         {RF_R12,          0x7B},
140         {RF_R14,          0x90},
141         {RF_R15,          0x58},
142         {RF_R16,          0xB3},
143         {RF_R17,          0x92},
144         {RF_R18,          0x2C},
145         {RF_R19,          0x02},
146         {RF_R20,          0xBA},
147         {RF_R21,          0xDB},
148         {RF_R24,          0x16},
149         {RF_R25,          0x01},
150         {RF_R27,          0x03},
151         {RF_R29,          0x1F},
152 };
153 #define NUM_RF_REG_PARMS        (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
154 #endif // RT2870 //
155
156 //
157 // ASIC register initialization sets
158 //
159
160 RTMP_REG_PAIR   MACRegTable[] = {
161 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
162         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
163         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
164 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
165         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
166         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
167 #else
168     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
169 #endif // HW_BEACON_OFFSET //
170
171         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
172         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
173         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
174         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
175         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
176         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
177         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
178         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
179         //{TX_TIMEOUT_CFG,      0x00182090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT
180         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
181         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
182         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
183         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
184         //{TX_RTY_CFG,                  0x6bb80408},    // Jan, 2006/11/16
185         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
186         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
187         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
188         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
189 #ifdef RT2870
190         {PBF_CFG,                               0xf40006},              // Only enable Queue 2
191         {MM40_PROT_CFG,                 0x3F44084},             // Initial Auto_Responder, because QA will turn off Auto-Responder
192         {WPDMA_GLO_CFG,                 0x00000030},
193 #endif // RT2870 //
194         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
195         {GF40_PROT_CFG,                 0x03F44084},
196         {MM20_PROT_CFG,                 0x01744004},
197         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
198         {TX_RTS_CFG,                    0x00092b20},
199 //#ifdef WIFI_TEST
200         {EXP_ACK_TIME,                  0x002400ca},    // default value
201 //#else
202 //      {EXP_ACK_TIME,                  0x005400ca},    // suggested by Gray @ 20070323 for 11n intel-sta throughput
203 //#endif // end - WIFI_TEST //
204         {TXOP_HLDR_ET,                  0x00000002},
205
206         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
207                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
208                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
209                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
210         {XIFS_TIME_CFG,                 0x33a41010},
211         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
212 };
213
214
215 #ifdef CONFIG_STA_SUPPORT
216 RTMP_REG_PAIR   STAMACRegTable[] =      {
217         {WMM_AIFSN_CFG,         0x00002273},
218         {WMM_CWMIN_CFG, 0x00002344},
219         {WMM_CWMAX_CFG, 0x000034aa},
220 };
221 #endif // CONFIG_STA_SUPPORT //
222
223 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
224 #ifdef CONFIG_STA_SUPPORT
225 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
226 #endif // CONFIG_STA_SUPPORT //
227
228 #ifdef RT2870
229 //
230 // RT2870 Firmware Spec only used 1 oct for version expression
231 //
232 #define FIRMWARE_MINOR_VERSION  7
233
234 #endif // RT2870 //
235
236 // New 8k byte firmware size for RT3071/RT3072
237 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
238 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
239 #define FIRMWARE_MAJOR_VERSION  0
240
241 #define FIRMWAREIMAGEV1_LENGTH  0x1000
242 #define FIRMWAREIMAGEV2_LENGTH  0x1000
243
244
245
246 /*
247         ========================================================================
248
249         Routine Description:
250                 Allocate RTMP_ADAPTER data block and do some initialization
251
252         Arguments:
253                 Adapter         Pointer to our adapter
254
255         Return Value:
256                 NDIS_STATUS_SUCCESS
257                 NDIS_STATUS_FAILURE
258
259         IRQL = PASSIVE_LEVEL
260
261         Note:
262
263         ========================================================================
264 */
265 NDIS_STATUS     RTMPAllocAdapterBlock(
266         IN  PVOID       handle,
267         OUT     PRTMP_ADAPTER   *ppAdapter)
268 {
269         PRTMP_ADAPTER   pAd;
270         NDIS_STATUS             Status;
271         INT                     index;
272         UCHAR                   *pBeaconBuf = NULL;
273
274         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
275
276         *ppAdapter = NULL;
277
278         do
279         {
280                 // Allocate RTMP_ADAPTER memory block
281                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
282                 if (pBeaconBuf == NULL)
283                 {
284                         Status = NDIS_STATUS_FAILURE;
285                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
286                         break;
287                 }
288
289                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
290                 if (Status != NDIS_STATUS_SUCCESS)
291                 {
292                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
293                         break;
294                 }
295                 pAd->BeaconBuf = pBeaconBuf;
296                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
297
298
299                 // Init spin locks
300                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
301
302                 for (index =0 ; index < NUM_OF_TX_RING; index++)
303                 {
304                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
305                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
306                         pAd->DeQueueRunning[index] = FALSE;
307                 }
308
309                 NdisAllocateSpinLock(&pAd->irq_lock);
310
311         } while (FALSE);
312
313         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
314                 kfree(pBeaconBuf);
315
316         *ppAdapter = pAd;
317
318         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
319         return Status;
320 }
321
322 /*
323         ========================================================================
324
325         Routine Description:
326                 Read initial Tx power per MCS and BW from EEPROM
327
328         Arguments:
329                 Adapter                                         Pointer to our adapter
330
331         Return Value:
332                 None
333
334         IRQL = PASSIVE_LEVEL
335
336         Note:
337
338         ========================================================================
339 */
340 VOID    RTMPReadTxPwrPerRate(
341         IN      PRTMP_ADAPTER   pAd)
342 {
343         ULONG           data, Adata, Gdata;
344         USHORT          i, value, value2;
345         INT                     Apwrdelta, Gpwrdelta;
346         UCHAR           t1,t2,t3,t4;
347         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
348
349         //
350         // Get power delta for 20MHz and 40MHz.
351         //
352         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
353         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
354         Apwrdelta = 0;
355         Gpwrdelta = 0;
356
357         if ((value2 & 0xff) != 0xff)
358         {
359                 if ((value2 & 0x80))
360                         Gpwrdelta = (value2&0xf);
361
362                 if ((value2 & 0x40))
363                         bGpwrdeltaMinus = FALSE;
364                 else
365                         bGpwrdeltaMinus = TRUE;
366         }
367         if ((value2 & 0xff00) != 0xff00)
368         {
369                 if ((value2 & 0x8000))
370                         Apwrdelta = ((value2&0xf00)>>8);
371
372                 if ((value2 & 0x4000))
373                         bApwrdeltaMinus = FALSE;
374                 else
375                         bApwrdeltaMinus = TRUE;
376         }
377         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
378
379         //
380         // Get Txpower per MCS for 20MHz in 2.4G.
381         //
382         for (i=0; i<5; i++)
383         {
384                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
385                 data = value;
386                 if (bApwrdeltaMinus == FALSE)
387                 {
388                         t1 = (value&0xf)+(Apwrdelta);
389                         if (t1 > 0xf)
390                                 t1 = 0xf;
391                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
392                         if (t2 > 0xf)
393                                 t2 = 0xf;
394                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
395                         if (t3 > 0xf)
396                                 t3 = 0xf;
397                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
398                         if (t4 > 0xf)
399                                 t4 = 0xf;
400                 }
401                 else
402                 {
403                         if ((value&0xf) > Apwrdelta)
404                                 t1 = (value&0xf)-(Apwrdelta);
405                         else
406                                 t1 = 0;
407                         if (((value&0xf0)>>4) > Apwrdelta)
408                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
409                         else
410                                 t2 = 0;
411                         if (((value&0xf00)>>8) > Apwrdelta)
412                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
413                         else
414                                 t3 = 0;
415                         if (((value&0xf000)>>12) > Apwrdelta)
416                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
417                         else
418                                 t4 = 0;
419                 }
420                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
421                 if (bGpwrdeltaMinus == FALSE)
422                 {
423                         t1 = (value&0xf)+(Gpwrdelta);
424                         if (t1 > 0xf)
425                                 t1 = 0xf;
426                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
427                         if (t2 > 0xf)
428                                 t2 = 0xf;
429                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
430                         if (t3 > 0xf)
431                                 t3 = 0xf;
432                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
433                         if (t4 > 0xf)
434                                 t4 = 0xf;
435                 }
436                 else
437                 {
438                         if ((value&0xf) > Gpwrdelta)
439                                 t1 = (value&0xf)-(Gpwrdelta);
440                         else
441                                 t1 = 0;
442                         if (((value&0xf0)>>4) > Gpwrdelta)
443                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
444                         else
445                                 t2 = 0;
446                         if (((value&0xf00)>>8) > Gpwrdelta)
447                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
448                         else
449                                 t3 = 0;
450                         if (((value&0xf000)>>12) > Gpwrdelta)
451                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
452                         else
453                                 t4 = 0;
454                 }
455                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
456
457                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
458                 if (bApwrdeltaMinus == FALSE)
459                 {
460                         t1 = (value&0xf)+(Apwrdelta);
461                         if (t1 > 0xf)
462                                 t1 = 0xf;
463                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
464                         if (t2 > 0xf)
465                                 t2 = 0xf;
466                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
467                         if (t3 > 0xf)
468                                 t3 = 0xf;
469                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
470                         if (t4 > 0xf)
471                                 t4 = 0xf;
472                 }
473                 else
474                 {
475                         if ((value&0xf) > Apwrdelta)
476                                 t1 = (value&0xf)-(Apwrdelta);
477                         else
478                                 t1 = 0;
479                         if (((value&0xf0)>>4) > Apwrdelta)
480                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
481                         else
482                                 t2 = 0;
483                         if (((value&0xf00)>>8) > Apwrdelta)
484                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
485                         else
486                                 t3 = 0;
487                         if (((value&0xf000)>>12) > Apwrdelta)
488                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
489                         else
490                                 t4 = 0;
491                 }
492                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
493                 if (bGpwrdeltaMinus == FALSE)
494                 {
495                         t1 = (value&0xf)+(Gpwrdelta);
496                         if (t1 > 0xf)
497                                 t1 = 0xf;
498                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
499                         if (t2 > 0xf)
500                                 t2 = 0xf;
501                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
502                         if (t3 > 0xf)
503                                 t3 = 0xf;
504                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
505                         if (t4 > 0xf)
506                                 t4 = 0xf;
507                 }
508                 else
509                 {
510                         if ((value&0xf) > Gpwrdelta)
511                                 t1 = (value&0xf)-(Gpwrdelta);
512                         else
513                                 t1 = 0;
514                         if (((value&0xf0)>>4) > Gpwrdelta)
515                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
516                         else
517                                 t2 = 0;
518                         if (((value&0xf00)>>8) > Gpwrdelta)
519                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
520                         else
521                                 t3 = 0;
522                         if (((value&0xf000)>>12) > Gpwrdelta)
523                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
524                         else
525                                 t4 = 0;
526                 }
527                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
528                 data |= (value<<16);
529
530                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
531                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
532
533                 if (data != 0xffffffff)
534                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
535                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
536         }
537
538         //
539         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
540         //
541         bValid = TRUE;
542         for (i=0; i<6; i++)
543         {
544                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
545                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
546                 {
547                         bValid = FALSE;
548                         break;
549                 }
550         }
551
552         //
553         // Get Txpower per MCS for 40MHz in 2.4G.
554         //
555         if (bValid)
556         {
557                 for (i=0; i<4; i++)
558                 {
559                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
560                         if (bGpwrdeltaMinus == FALSE)
561                         {
562                                 t1 = (value&0xf)+(Gpwrdelta);
563                                 if (t1 > 0xf)
564                                         t1 = 0xf;
565                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
566                                 if (t2 > 0xf)
567                                         t2 = 0xf;
568                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
569                                 if (t3 > 0xf)
570                                         t3 = 0xf;
571                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
572                                 if (t4 > 0xf)
573                                         t4 = 0xf;
574                         }
575                         else
576                         {
577                                 if ((value&0xf) > Gpwrdelta)
578                                         t1 = (value&0xf)-(Gpwrdelta);
579                                 else
580                                         t1 = 0;
581                                 if (((value&0xf0)>>4) > Gpwrdelta)
582                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
583                                 else
584                                         t2 = 0;
585                                 if (((value&0xf00)>>8) > Gpwrdelta)
586                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
587                                 else
588                                         t3 = 0;
589                                 if (((value&0xf000)>>12) > Gpwrdelta)
590                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
591                                 else
592                                         t4 = 0;
593                         }
594                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
595
596                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
597                         if (bGpwrdeltaMinus == FALSE)
598                         {
599                                 t1 = (value&0xf)+(Gpwrdelta);
600                                 if (t1 > 0xf)
601                                         t1 = 0xf;
602                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
603                                 if (t2 > 0xf)
604                                         t2 = 0xf;
605                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
606                                 if (t3 > 0xf)
607                                         t3 = 0xf;
608                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
609                                 if (t4 > 0xf)
610                                         t4 = 0xf;
611                         }
612                         else
613                         {
614                                 if ((value&0xf) > Gpwrdelta)
615                                         t1 = (value&0xf)-(Gpwrdelta);
616                                 else
617                                         t1 = 0;
618                                 if (((value&0xf0)>>4) > Gpwrdelta)
619                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
620                                 else
621                                         t2 = 0;
622                                 if (((value&0xf00)>>8) > Gpwrdelta)
623                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
624                                 else
625                                         t3 = 0;
626                                 if (((value&0xf000)>>12) > Gpwrdelta)
627                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
628                                 else
629                                         t4 = 0;
630                         }
631                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
632
633                         if (i == 0)
634                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
635                         else
636                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
637
638                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
639                 }
640         }
641
642         //
643         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
644         //
645         bValid = TRUE;
646         for (i=0; i<8; i++)
647         {
648                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
649                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
650                 {
651                         bValid = FALSE;
652                         break;
653                 }
654         }
655
656         //
657         // Get Txpower per MCS for 20MHz in 5G.
658         //
659         if (bValid)
660         {
661                 for (i=0; i<5; i++)
662                 {
663                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
664                         if (bApwrdeltaMinus == FALSE)
665                         {
666                                 t1 = (value&0xf)+(Apwrdelta);
667                                 if (t1 > 0xf)
668                                         t1 = 0xf;
669                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
670                                 if (t2 > 0xf)
671                                         t2 = 0xf;
672                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
673                                 if (t3 > 0xf)
674                                         t3 = 0xf;
675                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
676                                 if (t4 > 0xf)
677                                         t4 = 0xf;
678                         }
679                         else
680                         {
681                                 if ((value&0xf) > Apwrdelta)
682                                         t1 = (value&0xf)-(Apwrdelta);
683                                 else
684                                         t1 = 0;
685                                 if (((value&0xf0)>>4) > Apwrdelta)
686                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
687                                 else
688                                         t2 = 0;
689                                 if (((value&0xf00)>>8) > Apwrdelta)
690                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
691                                 else
692                                         t3 = 0;
693                                 if (((value&0xf000)>>12) > Apwrdelta)
694                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
695                                 else
696                                         t4 = 0;
697                         }
698                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
699
700                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
701                         if (bApwrdeltaMinus == FALSE)
702                         {
703                                 t1 = (value&0xf)+(Apwrdelta);
704                                 if (t1 > 0xf)
705                                         t1 = 0xf;
706                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
707                                 if (t2 > 0xf)
708                                         t2 = 0xf;
709                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
710                                 if (t3 > 0xf)
711                                         t3 = 0xf;
712                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
713                                 if (t4 > 0xf)
714                                         t4 = 0xf;
715                         }
716                         else
717                         {
718                                 if ((value&0xf) > Apwrdelta)
719                                         t1 = (value&0xf)-(Apwrdelta);
720                                 else
721                                         t1 = 0;
722                                 if (((value&0xf0)>>4) > Apwrdelta)
723                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
724                                 else
725                                         t2 = 0;
726                                 if (((value&0xf00)>>8) > Apwrdelta)
727                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
728                                 else
729                                         t3 = 0;
730                                 if (((value&0xf000)>>12) > Apwrdelta)
731                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
732                                 else
733                                         t4 = 0;
734                         }
735                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
736
737                         if (i == 0)
738                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
739                         else
740                                 pAd->Tx20MPwrCfgABand[i] = Adata;
741
742                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
743                 }
744         }
745
746         //
747         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
748         //
749         bValid = TRUE;
750         for (i=0; i<6; i++)
751         {
752                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
753                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
754                 {
755                         bValid = FALSE;
756                         break;
757                 }
758         }
759
760         //
761         // Get Txpower per MCS for 40MHz in 5G.
762         //
763         if (bValid)
764         {
765                 for (i=0; i<4; i++)
766                 {
767                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
768                         if (bApwrdeltaMinus == FALSE)
769                         {
770                                 t1 = (value&0xf)+(Apwrdelta);
771                                 if (t1 > 0xf)
772                                         t1 = 0xf;
773                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
774                                 if (t2 > 0xf)
775                                         t2 = 0xf;
776                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
777                                 if (t3 > 0xf)
778                                         t3 = 0xf;
779                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
780                                 if (t4 > 0xf)
781                                         t4 = 0xf;
782                         }
783                         else
784                         {
785                                 if ((value&0xf) > Apwrdelta)
786                                         t1 = (value&0xf)-(Apwrdelta);
787                                 else
788                                         t1 = 0;
789                                 if (((value&0xf0)>>4) > Apwrdelta)
790                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
791                                 else
792                                         t2 = 0;
793                                 if (((value&0xf00)>>8) > Apwrdelta)
794                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
795                                 else
796                                         t3 = 0;
797                                 if (((value&0xf000)>>12) > Apwrdelta)
798                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
799                                 else
800                                         t4 = 0;
801                         }
802                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
803
804                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
805                         if (bApwrdeltaMinus == FALSE)
806                         {
807                                 t1 = (value&0xf)+(Apwrdelta);
808                                 if (t1 > 0xf)
809                                         t1 = 0xf;
810                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
811                                 if (t2 > 0xf)
812                                         t2 = 0xf;
813                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
814                                 if (t3 > 0xf)
815                                         t3 = 0xf;
816                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
817                                 if (t4 > 0xf)
818                                         t4 = 0xf;
819                         }
820                         else
821                         {
822                                 if ((value&0xf) > Apwrdelta)
823                                         t1 = (value&0xf)-(Apwrdelta);
824                                 else
825                                         t1 = 0;
826                                 if (((value&0xf0)>>4) > Apwrdelta)
827                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
828                                 else
829                                         t2 = 0;
830                                 if (((value&0xf00)>>8) > Apwrdelta)
831                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
832                                 else
833                                         t3 = 0;
834                                 if (((value&0xf000)>>12) > Apwrdelta)
835                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
836                                 else
837                                         t4 = 0;
838                         }
839                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
840
841                         if (i == 0)
842                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
843                         else
844                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
845
846                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
847                 }
848         }
849 }
850
851
852 /*
853         ========================================================================
854
855         Routine Description:
856                 Read initial channel power parameters from EEPROM
857
858         Arguments:
859                 Adapter                                         Pointer to our adapter
860
861         Return Value:
862                 None
863
864         IRQL = PASSIVE_LEVEL
865
866         Note:
867
868         ========================================================================
869 */
870 VOID    RTMPReadChannelPwr(
871         IN      PRTMP_ADAPTER   pAd)
872 {
873         UCHAR                           i, choffset;
874         EEPROM_TX_PWR_STRUC         Power;
875         EEPROM_TX_PWR_STRUC         Power2;
876
877         // Read Tx power value for all channels
878         // Value from 1 - 0x7f. Default value is 24.
879         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
880         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
881
882         // 0. 11b/g, ch1 - ch 14
883         for (i = 0; i < 7; i++)
884         {
885 //              Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2);
886 //              Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2);
887                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
888                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
889                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
890                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
891
892                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
893                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
894                 else
895                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
896
897                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
898                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
899                 else
900                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
901
902                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
903                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
904                 else
905                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
906
907                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
908                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
909                 else
910                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
911         }
912
913         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
914         // 1.1 Fill up channel
915         choffset = 14;
916         for (i = 0; i < 4; i++)
917         {
918                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
919                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
920                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
921
922                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
923                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
924                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
925
926                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
927                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
928                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
929         }
930
931         // 1.2 Fill up power
932         for (i = 0; i < 6; i++)
933         {
934 //              Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2);
935 //              Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2);
936                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
937                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
938
939                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
940                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
941
942                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
943                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
944
945                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
946                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
947
948                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
949                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
950         }
951
952         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
953         // 2.1 Fill up channel
954         choffset = 14 + 12;
955         for (i = 0; i < 5; i++)
956         {
957                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
958                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
959                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
960
961                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
962                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
963                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
964
965                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
966                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
967                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
968         }
969         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
970         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
971         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
972
973         // 2.2 Fill up power
974         for (i = 0; i < 8; i++)
975         {
976 //              Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
977 //              Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
978                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
979                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
980
981                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
982                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
983
984                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
985                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
986
987                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
988                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
989
990                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
991                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
992         }
993
994         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
995         // 3.1 Fill up channel
996         choffset = 14 + 12 + 16;
997         for (i = 0; i < 2; i++)
998         {
999                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
1000                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
1001                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
1002
1003                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
1004                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
1005                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
1006
1007                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
1008                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
1009                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
1010         }
1011         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
1012         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
1013         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
1014
1015         // 3.2 Fill up power
1016         for (i = 0; i < 4; i++)
1017         {
1018 //              Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
1019 //              Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
1020                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1021                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1022
1023                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1024                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1025
1026                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1027                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1028
1029                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1030                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1031
1032                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1033                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1034         }
1035
1036         // 4. Print and Debug
1037         choffset = 14 + 12 + 16 + 7;
1038
1039 }
1040
1041 /*
1042         ========================================================================
1043
1044         Routine Description:
1045                 Read the following from the registry
1046                 1. All the parameters
1047                 2. NetworkAddres
1048
1049         Arguments:
1050                 Adapter                                         Pointer to our adapter
1051                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1052
1053         Return Value:
1054                 NDIS_STATUS_SUCCESS
1055                 NDIS_STATUS_FAILURE
1056                 NDIS_STATUS_RESOURCES
1057
1058         IRQL = PASSIVE_LEVEL
1059
1060         Note:
1061
1062         ========================================================================
1063 */
1064 NDIS_STATUS     NICReadRegParameters(
1065         IN      PRTMP_ADAPTER           pAd,
1066         IN      NDIS_HANDLE                     WrapperConfigurationContext
1067         )
1068 {
1069         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1070         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1071         return Status;
1072 }
1073
1074
1075 #ifdef RT2870
1076 /*
1077         ========================================================================
1078
1079         Routine Description:
1080                 For RF filter calibration purpose
1081
1082         Arguments:
1083                 pAd                          Pointer to our adapter
1084
1085         Return Value:
1086                 None
1087
1088         IRQL = PASSIVE_LEVEL
1089
1090         ========================================================================
1091 */
1092 VOID RTUSBFilterCalibration(
1093         IN PRTMP_ADAPTER pAd)
1094 {
1095         UCHAR   R55x = 0, value, FilterTarget = 0x1E, BBPValue;
1096         UINT    loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1097         UCHAR   RF_R24_Value = 0;
1098
1099         // Give bbp filter initial value
1100         pAd->Mlme.CaliBW20RfR24 = 0x16;
1101         pAd->Mlme.CaliBW40RfR24 = 0x36;  //Bit[5] must be 1 for BW 40
1102
1103         do
1104         {
1105                 if (loop == 1)  //BandWidth = 40 MHz
1106                 {
1107                         // Write 0x27 to RF_R24 to program filter
1108                         RF_R24_Value = 0x27;
1109                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1110                         FilterTarget = 0x19;
1111
1112                         // when calibrate BW40, BBP mask must set to BW40.
1113                         RTUSBReadBBPRegister(pAd, BBP_R4, &BBPValue);
1114                         BBPValue&= (~0x18);
1115                         BBPValue|= (0x10);
1116                         RTUSBWriteBBPRegister(pAd, BBP_R4, BBPValue);
1117                 }
1118                 else                    //BandWidth = 20 MHz
1119                 {
1120                         // Write 0x07 to RF_R24 to program filter
1121                         RF_R24_Value = 0x07;
1122                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1123                         FilterTarget = 0x16;
1124                 }
1125
1126                 // Write 0x01 to RF_R22 to enable baseband loopback mode
1127                 RT30xxReadRFRegister(pAd, RF_R22, &value);
1128                 value |= 0x01;
1129                 RT30xxWriteRFRegister(pAd, RF_R22, value);
1130
1131                 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1132                 RTUSBWriteBBPRegister(pAd, BBP_R24, 0);
1133
1134                 do
1135                 {
1136                         // Write 0x90 to BBP_R25 to transmit test tone
1137                         RTUSBWriteBBPRegister(pAd, BBP_R25, 0x90);
1138
1139                         RTMPusecDelay(1000);
1140                         // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1141                         RTUSBReadBBPRegister(pAd, BBP_R55, &value);
1142                         R55x = value & 0xFF;
1143
1144                 } while ((ReTry++ < 100) && (R55x == 0));
1145
1146                 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1147                 RTUSBWriteBBPRegister(pAd, BBP_R24, 0x06);
1148
1149                 while(TRUE)
1150                 {
1151                         // Write 0x90 to BBP_R25 to transmit test tone
1152                         RTUSBWriteBBPRegister(pAd, BBP_R25, 0x90);
1153
1154                         //We need to wait for calibration
1155                         RTMPusecDelay(1000);
1156                         RTUSBReadBBPRegister(pAd, BBP_R55, &value);
1157                         value &= 0xFF;
1158                         if ((R55x - value) < FilterTarget)
1159                         {
1160                                 RF_R24_Value ++;
1161                         }
1162                         else if ((R55x - value) == FilterTarget)
1163                         {
1164                                 RF_R24_Value ++;
1165                                 count ++;
1166                         }
1167                         else
1168                         {
1169                                 break;
1170                         }
1171
1172                         // prevent infinite loop cause driver hang.
1173                         if (loopcnt++ > 100)
1174                         {
1175                                 DBGPRINT(RT_DEBUG_ERROR, ("RTUSBFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1176                                 break;
1177                         }
1178
1179                         // Write RF_R24 to program filter
1180                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1181                 }
1182
1183                 if (count > 0)
1184                 {
1185                         RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1186                 }
1187
1188                 // Store for future usage
1189                 if (loopcnt < 100)
1190                 {
1191                         if (loop++ == 0)
1192                         {
1193                                 //BandWidth = 20 MHz
1194                                 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1195                         }
1196                         else
1197                         {
1198                                 //BandWidth = 40 MHz
1199                                 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1200                                 break;
1201                         }
1202                 }
1203                 else
1204                         break;
1205
1206                 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1207
1208                 // reset count
1209                 count = 0;
1210         } while(TRUE);
1211
1212         //
1213         // Set back to initial state
1214         //
1215         RTUSBWriteBBPRegister(pAd, BBP_R24, 0);
1216
1217         RT30xxReadRFRegister(pAd, RF_R22, &value);
1218         value &= ~(0x01);
1219         RT30xxWriteRFRegister(pAd, RF_R22, value);
1220
1221         // set BBP back to BW20
1222         RTUSBReadBBPRegister(pAd, BBP_R4, &BBPValue);
1223         BBPValue&= (~0x18);
1224         RTUSBWriteBBPRegister(pAd, BBP_R4, BBPValue);
1225
1226         DBGPRINT(RT_DEBUG_TRACE, ("RTUSBFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1227 }
1228
1229
1230 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1231 {
1232         INT i;
1233         // Driver must read EEPROM to get RfIcType before initial RF registers
1234         // Initialize RF register to default value
1235         if (IS_RT3070(pAd) && ((pAd->RfIcType == RFIC_3020) ||(pAd->RfIcType == RFIC_2020)))
1236         {
1237                 // Init RF calibration
1238                 // Driver should toggle RF R30 bit7 before init RF registers
1239                 ULONG RfReg = 0;
1240                 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1241                 RfReg |= 0x80;
1242                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1243                 RTMPusecDelay(1000);
1244                 RfReg &= 0x7F;
1245                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1246
1247                 // Initialize RF register to default value
1248                 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1249                 {
1250                         RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1251                 }
1252
1253                 //For RF filter Calibration
1254                 RTUSBFilterCalibration(pAd);
1255         }
1256
1257 }
1258 #endif // RT2870 //
1259
1260
1261 /*
1262         ========================================================================
1263
1264         Routine Description:
1265                 Read initial parameters from EEPROM
1266
1267         Arguments:
1268                 Adapter                                         Pointer to our adapter
1269
1270         Return Value:
1271                 None
1272
1273         IRQL = PASSIVE_LEVEL
1274
1275         Note:
1276
1277         ========================================================================
1278 */
1279 VOID    NICReadEEPROMParameters(
1280         IN      PRTMP_ADAPTER   pAd,
1281         IN      PUCHAR                  mac_addr)
1282 {
1283         UINT32                  data = 0;
1284         USHORT                  i, value, value2;
1285         UCHAR                   TmpPhy;
1286         EEPROM_TX_PWR_STRUC         Power;
1287         EEPROM_VERSION_STRUC    Version;
1288         EEPROM_ANTENNA_STRUC    Antenna;
1289         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1290
1291         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1292
1293         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1294         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1295         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1296
1297         if((data & 0x30) == 0)
1298                 pAd->EEPROMAddressNum = 6;              // 93C46
1299         else if((data & 0x30) == 0x10)
1300                 pAd->EEPROMAddressNum = 8;     // 93C66
1301         else
1302                 pAd->EEPROMAddressNum = 8;     // 93C86
1303         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1304
1305         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1306         // MAC address registers according to E2PROM setting
1307         if (mac_addr == NULL ||
1308                 strlen(mac_addr) != 17 ||
1309                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1310                 mac_addr[11] != ':' || mac_addr[14] != ':')
1311         {
1312                 USHORT  Addr01,Addr23,Addr45 ;
1313
1314                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1315                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1316                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1317
1318                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1319                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1320                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1321                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1322                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1323                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1324
1325                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1326         }
1327         else
1328         {
1329                 INT             j;
1330                 PUCHAR  macptr;
1331
1332                 macptr = mac_addr;
1333
1334                 for (j=0; j<MAC_ADDR_LEN; j++)
1335                 {
1336                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1337                         macptr=macptr+3;
1338                 }
1339
1340                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1341         }
1342
1343
1344         {
1345 #if 0
1346                 USHORT  Addr01,Addr23,Addr45 ;
1347
1348                 Addr01=RTMP_EEPROM_READ16(pAd, 0x04);
1349                 Addr23=RTMP_EEPROM_READ16(pAd, 0x06);
1350                 Addr45=RTMP_EEPROM_READ16(pAd, 0x08);
1351
1352                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1353                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1354                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1355                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1356                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1357                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1358 #endif
1359                 //more conveninet to test mbssid, so ap's bssid &0xf1
1360                 if (pAd->PermanentAddress[0] == 0xff)
1361                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1362
1363                 //if (pAd->PermanentAddress[5] == 0xff)
1364                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1365
1366                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1367                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1368                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1369                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1370                 if (pAd->bLocalAdminMAC == FALSE)
1371                 {
1372                         MAC_DW0_STRUC csr2;
1373                         MAC_DW1_STRUC csr3;
1374                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1375                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1376                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1377                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1378                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1379                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1380                         csr3.word = 0;
1381                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1382                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1383                         csr3.field.U2MeMask = 0xff;
1384                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1385                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1386                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1387                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1388                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1389                 }
1390         }
1391
1392         // if not return early. cause fail at emulation.
1393         // Init the channel number for TX channel power
1394         RTMPReadChannelPwr(pAd);
1395
1396         // if E2PROM version mismatch with driver's expectation, then skip
1397         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1398         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1399         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1400         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1401
1402         if (Version.field.Version > VALID_EEPROM_VERSION)
1403         {
1404                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1405                 /*pAd->SystemErrorBitmap |= 0x00000001;
1406
1407                 // hard-code default value when no proper E2PROM installed
1408                 pAd->bAutoTxAgcA = FALSE;
1409                 pAd->bAutoTxAgcG = FALSE;
1410
1411                 // Default the channel power
1412                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1413                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1414
1415                 // Default the channel power
1416                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1417                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1418
1419                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1420                         pAd->EEPROMDefaultValue[i] = 0xffff;
1421                 return;  */
1422         }
1423
1424         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1425         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1426         pAd->EEPROMDefaultValue[0] = value;
1427
1428         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1429         pAd->EEPROMDefaultValue[1] = value;
1430
1431         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1432         pAd->EEPROMDefaultValue[2] = value;
1433
1434         for(i = 0; i < 8; i++)
1435         {
1436                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1437                 pAd->EEPROMDefaultValue[i+3] = value;
1438         }
1439
1440         // We have to parse NIC configuration 0 at here.
1441         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1442         // Therefore, we have to read TxAutoAgc control beforehand.
1443         // Read Tx AGC control bit
1444         Antenna.word = pAd->EEPROMDefaultValue[0];
1445         if (Antenna.word == 0xFFFF)
1446         {
1447                 Antenna.word = 0;
1448                 Antenna.field.RfIcType = RFIC_2820;
1449                 Antenna.field.TxPath = 1;
1450                 Antenna.field.RxPath = 2;
1451                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1452         }
1453
1454         // Choose the desired Tx&Rx stream.
1455         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1456                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1457
1458         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1459         {
1460                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1461
1462                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1463                         (pAd->CommonCfg.RxStream > 2))
1464                 {
1465                         // only 2 Rx streams for RT2860 series
1466                         pAd->CommonCfg.RxStream = 2;
1467                 }
1468         }
1469
1470         // 3*3
1471         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1472         // yet implement
1473         for(i=0; i<3; i++)
1474         {
1475         }
1476
1477         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1478
1479
1480
1481 #ifdef CONFIG_STA_SUPPORT
1482         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1483         {
1484                 NicConfig2.word = 0;
1485                 if ((NicConfig2.word & 0x00ff) == 0xff)
1486                 {
1487                         NicConfig2.word &= 0xff00;
1488                 }
1489
1490                 if ((NicConfig2.word >> 8) == 0xff)
1491                 {
1492                         NicConfig2.word &= 0x00ff;
1493                 }
1494         }
1495 #endif // CONFIG_STA_SUPPORT //
1496
1497         if (NicConfig2.field.DynamicTxAgcControl == 1)
1498                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1499         else
1500                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1501
1502         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1503
1504         // Save the antenna for future use
1505         pAd->Antenna.word = Antenna.word;
1506
1507         //
1508         // Reset PhyMode if we don't support 802.11a
1509         // Only RFIC_2850 & RFIC_2750 support 802.11a
1510         //
1511         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1512         {
1513                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1514                         (pAd->CommonCfg.PhyMode == PHY_11A))
1515                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1516 #ifdef DOT11_N_SUPPORT
1517                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1518                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1519                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1520                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1521                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1522 #endif // DOT11_N_SUPPORT //
1523         }
1524
1525         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1526         // 0. 11b/g
1527         {
1528                 /* these are tempature reference value (0x00 ~ 0xFE)
1529                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1530                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1531                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1532                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1533                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1534                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1535                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1536                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1537                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1538                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1539                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1540                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1541                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1542                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1543                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1544                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1545                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1546                 pAd->TxAgcStepG = Power.field.Byte1;
1547                 pAd->TxAgcCompensateG = 0;
1548                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1549                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1550
1551                 // Disable TxAgc if the based value is not right
1552                 if (pAd->TssiRefG == 0xff)
1553                         pAd->bAutoTxAgcG = FALSE;
1554
1555                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1556                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1557                         pAd->TssiRefG,
1558                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1559                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1560         }
1561         // 1. 11a
1562         {
1563                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1564                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1565                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1566                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1567                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1568                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1569                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1570                 pAd->TssiRefA   = Power.field.Byte0;
1571                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1572                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1573                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1574                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1575                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1576                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1577                 pAd->TxAgcStepA = Power.field.Byte1;
1578                 pAd->TxAgcCompensateA = 0;
1579                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1580                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1581
1582                 // Disable TxAgc if the based value is not right
1583                 if (pAd->TssiRefA == 0xff)
1584                         pAd->bAutoTxAgcA = FALSE;
1585
1586                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1587                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1588                         pAd->TssiRefA,
1589                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1590                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1591         }
1592         pAd->BbpRssiToDbmDelta = 0x0;
1593
1594         // Read frequency offset setting for RF
1595         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1596         if ((value & 0x00FF) != 0x00FF)
1597                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1598         else
1599                 pAd->RfFreqOffset = 0;
1600         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1601
1602         //CountryRegion byte offset (38h)
1603         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1604         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1605
1606         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1607         {
1608                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1609                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1610                 TmpPhy = pAd->CommonCfg.PhyMode;
1611                 pAd->CommonCfg.PhyMode = 0xff;
1612                 RTMPSetPhyMode(pAd, TmpPhy);
1613 #ifdef DOT11_N_SUPPORT
1614                 SetCommonHT(pAd);
1615 #endif // DOT11_N_SUPPORT //
1616         }
1617
1618         //
1619         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1620         // The valid value are (-10 ~ 10)
1621         //
1622         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1623         pAd->BGRssiOffset0 = value & 0x00ff;
1624         pAd->BGRssiOffset1 = (value >> 8);
1625         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1626         pAd->BGRssiOffset2 = value & 0x00ff;
1627         pAd->ALNAGain1 = (value >> 8);
1628         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1629         pAd->BLNAGain = value & 0x00ff;
1630         pAd->ALNAGain0 = (value >> 8);
1631
1632         // Validate 11b/g RSSI_0 offset.
1633         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1634                 pAd->BGRssiOffset0 = 0;
1635
1636         // Validate 11b/g RSSI_1 offset.
1637         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1638                 pAd->BGRssiOffset1 = 0;
1639
1640         // Validate 11b/g RSSI_2 offset.
1641         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1642                 pAd->BGRssiOffset2 = 0;
1643
1644         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1645         pAd->ARssiOffset0 = value & 0x00ff;
1646         pAd->ARssiOffset1 = (value >> 8);
1647         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1648         pAd->ARssiOffset2 = value & 0x00ff;
1649         pAd->ALNAGain2 = (value >> 8);
1650
1651         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1652                 pAd->ALNAGain1 = pAd->ALNAGain0;
1653         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1654                 pAd->ALNAGain2 = pAd->ALNAGain0;
1655
1656         // Validate 11a RSSI_0 offset.
1657         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1658                 pAd->ARssiOffset0 = 0;
1659
1660         // Validate 11a RSSI_1 offset.
1661         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1662                 pAd->ARssiOffset1 = 0;
1663
1664         //Validate 11a RSSI_2 offset.
1665         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1666                 pAd->ARssiOffset2 = 0;
1667
1668         //
1669         // Get LED Setting.
1670         //
1671         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1672         pAd->LedCntl.word = (value&0xff00) >> 8;
1673         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1674         pAd->Led1 = value;
1675         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1676         pAd->Led2 = value;
1677         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1678         pAd->Led3 = value;
1679
1680         RTMPReadTxPwrPerRate(pAd);
1681
1682 #ifdef SINGLE_SKU
1683         //pAd->CommonCfg.DefineMaxTxPwr = RTMP_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR);
1684         RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1685 #endif // SINGLE_SKU //
1686
1687         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1688 }
1689
1690 /*
1691         ========================================================================
1692
1693         Routine Description:
1694                 Set default value from EEPROM
1695
1696         Arguments:
1697                 Adapter                                         Pointer to our adapter
1698
1699         Return Value:
1700                 None
1701
1702         IRQL = PASSIVE_LEVEL
1703
1704         Note:
1705
1706         ========================================================================
1707 */
1708 VOID    NICInitAsicFromEEPROM(
1709         IN      PRTMP_ADAPTER   pAd)
1710 {
1711 #ifdef CONFIG_STA_SUPPORT
1712         UINT32                                  data = 0;
1713         UCHAR   BBPR1 = 0;
1714 #endif // CONFIG_STA_SUPPORT //
1715         USHORT                                  i;
1716         EEPROM_ANTENNA_STRUC    Antenna;
1717         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1718         UCHAR   BBPR3 = 0;
1719
1720         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1721         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1722         {
1723                 UCHAR BbpRegIdx, BbpValue;
1724
1725                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1726                 {
1727                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1728                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1729                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1730                 }
1731         }
1732
1733         Antenna.word = pAd->Antenna.word;
1734         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1735         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1736
1737         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1738
1739
1740         // Save the antenna for future use
1741         pAd->NicConfig2.word = NicConfig2.word;
1742
1743         //
1744         // Send LED Setting to MCU.
1745         //
1746         if (pAd->LedCntl.word == 0xFF)
1747         {
1748                 pAd->LedCntl.word = 0x01;
1749                 pAd->Led1 = 0x5555;
1750                 pAd->Led2 = 0x2221;
1751
1752 #ifdef RT2870
1753                 pAd->Led3 = 0x5627;
1754 #endif // RT2870 //
1755         }
1756
1757         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1758         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1759         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1760     pAd->LedIndicatorStregth = 0xFF;
1761     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1762
1763 #ifdef CONFIG_STA_SUPPORT
1764         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1765         {
1766                 // Read Hardware controlled Radio state enable bit
1767                 if (NicConfig2.field.HardwareRadioControl == 1)
1768                 {
1769                         pAd->StaCfg.bHardwareRadio = TRUE;
1770
1771                         // Read GPIO pin2 as Hardware controlled radio state
1772                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1773                         if ((data & 0x04) == 0)
1774                         {
1775                                 pAd->StaCfg.bHwRadio = FALSE;
1776                                 pAd->StaCfg.bRadio = FALSE;
1777 //                              RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1778                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1779                         }
1780                 }
1781                 else
1782                         pAd->StaCfg.bHardwareRadio = FALSE;
1783
1784                 if (pAd->StaCfg.bRadio == FALSE)
1785                 {
1786                         RTMPSetLED(pAd, LED_RADIO_OFF);
1787                 }
1788                 else
1789                 {
1790                         RTMPSetLED(pAd, LED_RADIO_ON);
1791                 }
1792         }
1793 #endif // CONFIG_STA_SUPPORT //
1794
1795         // Turn off patching for cardbus controller
1796         if (NicConfig2.field.CardbusAcceleration == 1)
1797         {
1798 //              pAd->bTest1 = TRUE;
1799         }
1800
1801         if (NicConfig2.field.DynamicTxAgcControl == 1)
1802                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1803         else
1804                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1805         //
1806         // Since BBP has been progamed, to make sure BBP setting will be
1807         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1808         //
1809         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1810
1811         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1812         BBPR3 &= (~0x18);
1813         if(pAd->Antenna.field.RxPath == 3)
1814         {
1815                 BBPR3 |= (0x10);
1816         }
1817         else if(pAd->Antenna.field.RxPath == 2)
1818         {
1819                 BBPR3 |= (0x8);
1820         }
1821         else if(pAd->Antenna.field.RxPath == 1)
1822         {
1823                 BBPR3 |= (0x0);
1824         }
1825         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1826
1827 #ifdef CONFIG_STA_SUPPORT
1828         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1829         {
1830                 // Handle the difference when 1T
1831                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1832                 if(pAd->Antenna.field.TxPath == 1)
1833                 {
1834                 BBPR1 &= (~0x18);
1835                 }
1836                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1837
1838                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1839         }
1840 #endif // CONFIG_STA_SUPPORT //
1841         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1842         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1843 }
1844
1845 /*
1846         ========================================================================
1847
1848         Routine Description:
1849                 Initialize NIC hardware
1850
1851         Arguments:
1852                 Adapter                                         Pointer to our adapter
1853
1854         Return Value:
1855                 None
1856
1857         IRQL = PASSIVE_LEVEL
1858
1859         Note:
1860
1861         ========================================================================
1862 */
1863 NDIS_STATUS     NICInitializeAdapter(
1864         IN      PRTMP_ADAPTER   pAd,
1865         IN   BOOLEAN    bHardReset)
1866 {
1867         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1868         WPDMA_GLO_CFG_STRUC     GloCfg;
1869 //      INT_MASK_CSR_STRUC              IntMask;
1870         ULONG   i =0, j=0;
1871         AC_TXOP_CSR0_STRUC      csr0;
1872
1873         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1874
1875         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1876 retry:
1877         i = 0;
1878         do
1879         {
1880                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1881                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1882                         break;
1883
1884                 RTMPusecDelay(1000);
1885                 i++;
1886         }while ( i<100);
1887         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1888         GloCfg.word &= 0xff0;
1889         GloCfg.field.EnTXWriteBackDDONE =1;
1890         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1891
1892         // Record HW Beacon offset
1893         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1894         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1895         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1896         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1897         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1898         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1899         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1900         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1901
1902         //
1903         // write all shared Ring's base address into ASIC
1904         //
1905
1906         // asic simulation sequence put this ahead before loading firmware.
1907         // pbf hardware reset
1908
1909         // Initialze ASIC for TX & Rx operation
1910         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1911         {
1912                 if (j++ == 0)
1913                 {
1914                         NICLoadFirmware(pAd);
1915                         goto retry;
1916                 }
1917                 return NDIS_STATUS_FAILURE;
1918         }
1919
1920
1921
1922
1923         // WMM parameter
1924         csr0.word = 0;
1925         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1926         if (pAd->CommonCfg.PhyMode == PHY_11B)
1927         {
1928                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1929                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1930         }
1931         else
1932         {
1933                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1934                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1935         }
1936         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1937
1938
1939
1940
1941         // reset action
1942         // Load firmware
1943         //  Status = NICLoadFirmware(pAd);
1944
1945         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1946         return Status;
1947 }
1948
1949 /*
1950         ========================================================================
1951
1952         Routine Description:
1953                 Initialize ASIC
1954
1955         Arguments:
1956                 Adapter                                         Pointer to our adapter
1957
1958         Return Value:
1959                 None
1960
1961         IRQL = PASSIVE_LEVEL
1962
1963         Note:
1964
1965         ========================================================================
1966 */
1967 NDIS_STATUS     NICInitializeAsic(
1968         IN      PRTMP_ADAPTER   pAd,
1969         IN  BOOLEAN             bHardReset)
1970 {
1971         ULONG                   Index = 0;
1972         UCHAR                   R0 = 0xff;
1973         UINT32                  MacCsr12 = 0, Counter = 0;
1974 #ifdef RT2870
1975         UINT32                  MacCsr0 = 0;
1976         NTSTATUS                Status;
1977         UCHAR                   Value = 0xff;
1978 #endif // RT2870 //
1979         USHORT                  KeyIdx;
1980         INT                             i,apidx;
1981
1982         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1983
1984
1985 #ifdef RT2870
1986         //
1987         // Make sure MAC gets ready after NICLoadFirmware().
1988         //
1989         Index = 0;
1990
1991         //To avoid hang-on issue when interface up in kernel 2.4,
1992         //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
1993         do
1994         {
1995                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
1996
1997                 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
1998                         break;
1999
2000                 RTMPusecDelay(10);
2001         } while (Index++ < 100);
2002
2003         pAd->MACVersion = MacCsr0;
2004         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2005         // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2006         RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2007         MacCsr12 &= (~0x2000);
2008         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2009
2010         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2011         RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2012         Status = RTUSBVenderReset(pAd);
2013
2014         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2015
2016         // Initialize MAC register to default value
2017         for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2018         {
2019                 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2020         }
2021
2022         if(IS_RT3070(pAd))
2023         {
2024                 // According to Frank Hsu (from Gary Tsao)
2025                 RTMP_IO_WRITE32(pAd, (USHORT)TX_SW_CFG0, 0x00000400);
2026
2027                 // Initialize RT3070 serial MAC registers which is different from RT2870 serial
2028                 RTUSBWriteMACRegister(pAd, TX_SW_CFG1, 0);
2029                 RTUSBWriteMACRegister(pAd, TX_SW_CFG2, 0);
2030         }
2031
2032
2033 #ifdef CONFIG_STA_SUPPORT
2034         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2035         {
2036                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2037                 {
2038                         RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2039                 }
2040         }
2041 #endif // CONFIG_STA_SUPPORT //
2042 #endif // RT2870 //
2043
2044         //
2045         // Before program BBP, we need to wait BBP/RF get wake up.
2046         //
2047         Index = 0;
2048         do
2049         {
2050                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2051
2052                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
2053                         break;
2054
2055                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
2056                 RTMPusecDelay(1000);
2057         } while (Index++ < 100);
2058
2059     // The commands to firmware should be after these commands, these commands will init firmware
2060         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2061         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2062         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2063         RTMPusecDelay(1000);
2064
2065         // Read BBP register, make sure BBP is up and running before write new data
2066         Index = 0;
2067         do
2068         {
2069                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2070                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2071         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2072         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2073
2074         if ((R0 == 0xff) || (R0 == 0x00))
2075                 return NDIS_STATUS_FAILURE;
2076
2077         // Initialize BBP register to default value
2078         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2079         {
2080                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2081         }
2082
2083         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2084         if ((pAd->MACVersion&0xffff) != 0x0101)
2085                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2086
2087 #ifdef RT2870
2088         //write RT3070 BBP wchich different with 2870 after write RT2870 BBP
2089         if (IS_RT3070(pAd))
2090         {
2091                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a);
2092                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x99);
2093                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, 0x05);
2094         }
2095 #endif // RT2870 //
2096
2097         if (pAd->MACVersion == 0x28600100)
2098         {
2099                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2100                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2101     }
2102
2103         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2104         {
2105                 // enlarge MAX_LEN_CFG
2106                 UINT32 csr;
2107                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2108                 csr &= 0xFFF;
2109                 csr |= 0x2000;
2110                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2111         }
2112
2113 #ifdef RT2870
2114 {
2115         UCHAR   MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2116
2117         //Initialize WCID table
2118         Value = 0xff;
2119         for(Index =0 ;Index < 254;Index++)
2120         {
2121                 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2122         }
2123 }
2124 #endif // RT2870 //
2125
2126         // Add radio off control
2127 #ifdef CONFIG_STA_SUPPORT
2128         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2129         {
2130                 if (pAd->StaCfg.bRadio == FALSE)
2131                 {
2132 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2133                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2134                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2135                 }
2136         }
2137 #endif // CONFIG_STA_SUPPORT //
2138
2139         // Clear raw counters
2140         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2141         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2142         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2143         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2144         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2145         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2146
2147         // ASIC will keep garbage value after boot
2148         // Clear all seared key table when initial
2149         // This routine can be ignored in radio-ON/OFF operation.
2150         if (bHardReset)
2151         {
2152                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2153                 {
2154                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2155                 }
2156
2157                 // Clear all pairwise key table when initial
2158                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2159                 {
2160                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2161                 }
2162         }
2163
2164         // assert HOST ready bit
2165 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
2166 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
2167
2168         // It isn't necessary to clear this space when not hard reset.
2169         if (bHardReset == TRUE)
2170         {
2171                 // clear all on-chip BEACON frame space
2172                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2173                 {
2174                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2175                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2176                 }
2177         }
2178 #ifdef RT2870
2179         AsicDisableSync(pAd);
2180         // Clear raw counters
2181         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2182         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2183         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2184         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2185         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2186         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2187         // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2188         RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2189         Counter&=0xffffff00;
2190         Counter|=0x000001e;
2191         RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2192 #endif // RT2870 //
2193
2194 #ifdef CONFIG_STA_SUPPORT
2195         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2196         {
2197                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2198                 if ((pAd->MACVersion&0xffff) != 0x0101)
2199                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2200         }
2201 #endif // CONFIG_STA_SUPPORT //
2202
2203         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2204         return NDIS_STATUS_SUCCESS;
2205 }
2206
2207 /*
2208         ========================================================================
2209
2210         Routine Description:
2211                 Reset NIC Asics
2212
2213         Arguments:
2214                 Adapter                                         Pointer to our adapter
2215
2216         Return Value:
2217                 None
2218
2219         IRQL = PASSIVE_LEVEL
2220
2221         Note:
2222                 Reset NIC to initial state AS IS system boot up time.
2223
2224         ========================================================================
2225 */
2226 VOID    NICIssueReset(
2227         IN      PRTMP_ADAPTER   pAd)
2228 {
2229         UINT32  Value = 0;
2230         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2231
2232         // Abort Tx, prevent ASIC from writing to Host memory
2233         //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
2234
2235         // Disable Rx, register value supposed will remain after reset
2236         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2237         Value &= (0xfffffff3);
2238         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2239
2240         // Issue reset and clear from reset state
2241         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2242         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2243
2244         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2245 }
2246
2247 /*
2248         ========================================================================
2249
2250         Routine Description:
2251                 Check ASIC registers and find any reason the system might hang
2252
2253         Arguments:
2254                 Adapter                                         Pointer to our adapter
2255
2256         Return Value:
2257                 None
2258
2259         IRQL = DISPATCH_LEVEL
2260
2261         ========================================================================
2262 */
2263 BOOLEAN NICCheckForHang(
2264         IN      PRTMP_ADAPTER   pAd)
2265 {
2266         return (FALSE);
2267 }
2268
2269 VOID NICUpdateFifoStaCounters(
2270         IN PRTMP_ADAPTER pAd)
2271 {
2272         TX_STA_FIFO_STRUC       StaFifo;
2273         MAC_TABLE_ENTRY         *pEntry;
2274         UCHAR                           i = 0;
2275         UCHAR                   pid = 0, wcid = 0;
2276         CHAR                            reTry;
2277         UCHAR                           succMCS;
2278
2279                 do
2280                 {
2281                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2282
2283                         if (StaFifo.field.bValid == 0)
2284                                 break;
2285
2286                         wcid = (UCHAR)StaFifo.field.wcid;
2287
2288
2289                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2290                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2291                         {
2292                                 i++;
2293                                 continue;
2294                         }
2295
2296                         /* PID store Tx MCS Rate */
2297                         pid = (UCHAR)StaFifo.field.PidType;
2298
2299                         pEntry = &pAd->MacTab.Content[wcid];
2300
2301                         pEntry->DebugFIFOCount++;
2302
2303 #ifdef DOT11_N_SUPPORT
2304                         if (StaFifo.field.TxBF) // 3*3
2305                                 pEntry->TxBFCount++;
2306 #endif // DOT11_N_SUPPORT //
2307
2308 #ifdef UAPSD_AP_SUPPORT
2309                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2310 #endif // UAPSD_AP_SUPPORT //
2311
2312                         if (!StaFifo.field.TxSuccess)
2313                         {
2314                                 pEntry->FIFOCount++;
2315                                 pEntry->OneSecTxFailCount++;
2316
2317                                 if (pEntry->FIFOCount >= 1)
2318                                 {
2319                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2320 #if 0
2321                                         SendRefreshBAR(pAd, pEntry);
2322                                         pEntry->NoBADataCountDown = 64;
2323 #else
2324 #ifdef DOT11_N_SUPPORT
2325                                         pEntry->NoBADataCountDown = 64;
2326 #endif // DOT11_N_SUPPORT //
2327
2328                                         if(pEntry->PsMode == PWR_ACTIVE)
2329                                         {
2330 #ifdef DOT11_N_SUPPORT
2331                                                 int tid;
2332                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2333                                                 {
2334                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2335                                                 }
2336 #endif // DOT11_N_SUPPORT //
2337
2338                                                 // Update the continuous transmission counter except PS mode
2339                                                 pEntry->ContinueTxFailCnt++;
2340                                         }
2341                                         else
2342                                         {
2343                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2344                                                 //     this tx error happened due to sta just go to sleep.
2345                                                 pEntry->FIFOCount = 0;
2346                                                 pEntry->ContinueTxFailCnt = 0;
2347                                         }
2348 #endif
2349                                         //pEntry->FIFOCount = 0;
2350                                 }
2351                                 //pEntry->bSendBAR = TRUE;
2352                         }
2353                         else
2354                         {
2355 #ifdef DOT11_N_SUPPORT
2356                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2357                                 {
2358                                         pEntry->NoBADataCountDown--;
2359                                         if (pEntry->NoBADataCountDown==0)
2360                                         {
2361                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2362                                         }
2363                                 }
2364 #endif // DOT11_N_SUPPORT //
2365                                 pEntry->FIFOCount = 0;
2366                                 pEntry->OneSecTxNoRetryOkCount++;
2367                                 // update NoDataIdleCount when sucessful send packet to STA.
2368                                 pEntry->NoDataIdleCount = 0;
2369                                 pEntry->ContinueTxFailCnt = 0;
2370                         }
2371
2372                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2373
2374                         reTry = pid - succMCS;
2375
2376                         if (StaFifo.field.TxSuccess)
2377                         {
2378                                 pEntry->TXMCSExpected[pid]++;
2379                                 if (pid == succMCS)
2380                                 {
2381                                         pEntry->TXMCSSuccessful[pid]++;
2382                                 }
2383                                 else
2384                                 {
2385                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2386                                 }
2387                         }
2388                         else
2389                         {
2390                                 pEntry->TXMCSFailed[pid]++;
2391                         }
2392
2393                         if (reTry > 0)
2394                         {
2395                                 if ((pid >= 12) && succMCS <=7)
2396                                 {
2397                                         reTry -= 4;
2398                                 }
2399                                 pEntry->OneSecTxRetryOkCount += reTry;
2400                         }
2401
2402                         i++;
2403                         // ASIC store 16 stack
2404                 } while ( i < (2*TX_RING_SIZE) );
2405
2406 }
2407
2408 /*
2409         ========================================================================
2410
2411         Routine Description:
2412                 Read statistical counters from hardware registers and record them
2413                 in software variables for later on query
2414
2415         Arguments:
2416                 pAd                                     Pointer to our adapter
2417
2418         Return Value:
2419                 None
2420
2421         IRQL = DISPATCH_LEVEL
2422
2423         ========================================================================
2424 */
2425 VOID NICUpdateRawCounters(
2426         IN PRTMP_ADAPTER pAd)
2427 {
2428         UINT32  OldValue;
2429         RX_STA_CNT0_STRUC        RxStaCnt0;
2430         RX_STA_CNT1_STRUC   RxStaCnt1;
2431         RX_STA_CNT2_STRUC   RxStaCnt2;
2432         TX_STA_CNT0_STRUC        TxStaCnt0;
2433         TX_STA_CNT1_STRUC        StaTx1;
2434         TX_STA_CNT2_STRUC        StaTx2;
2435         TX_AGG_CNT_STRUC        TxAggCnt;
2436         TX_AGG_CNT0_STRUC       TxAggCnt0;
2437         TX_AGG_CNT1_STRUC       TxAggCnt1;
2438         TX_AGG_CNT2_STRUC       TxAggCnt2;
2439         TX_AGG_CNT3_STRUC       TxAggCnt3;
2440         TX_AGG_CNT4_STRUC       TxAggCnt4;
2441         TX_AGG_CNT5_STRUC       TxAggCnt5;
2442         TX_AGG_CNT6_STRUC       TxAggCnt6;
2443         TX_AGG_CNT7_STRUC       TxAggCnt7;
2444
2445
2446         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2447         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2448
2449         {
2450                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2451             // Update RX PLCP error counter
2452             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2453                 // Update False CCA counter
2454                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2455         }
2456
2457         // Update FCS counters
2458         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2459         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2460         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2461                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2462
2463         // Add FCS error count to private counters
2464         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2465         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2466         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2467         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2468                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2469
2470         // Update Duplicate Rcv check
2471         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2472         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2473         // Update RX Overflow counter
2474         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2475
2476         //pAd->RalinkCounters.RxCount = 0;
2477 #ifdef RT2870
2478         if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2479         {
2480                 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2481                 pAd->watchDogRxOverFlowCnt = 0;
2482         }
2483         else
2484         {
2485                 if (RxStaCnt2.field.RxFifoOverflowCount)
2486                         pAd->watchDogRxOverFlowCnt++;
2487                 else
2488                         pAd->watchDogRxOverFlowCnt = 0;
2489         }
2490 #endif // RT2870 //
2491
2492
2493         //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2494         //      (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2495         if (!pAd->bUpdateBcnCntDone)
2496         {
2497         // Update BEACON sent count
2498         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2499         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2500         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2501         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2502         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2503         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2504         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2505         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2506         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2507         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2508         }
2509
2510 #if 0
2511         Retry = StaTx1.field.TxRetransmit;
2512         Fail = TxStaCnt0.field.TxFailCount;
2513         TxErrorRatio = 0;
2514         OneSecTransmitCount = pAd->WlanCounters.TransmittedFragmentCount.u.LowPart- pAd->WlanCounters.LastTransmittedFragmentCount.u.LowPart;
2515         if ((OneSecTransmitCount+Retry + Fail) > 0)
2516                 TxErrorRatio = (( Retry + Fail) *100) / (OneSecTransmitCount+Retry + Fail);
2517
2518         if ((OneSecTransmitCount+Retry + Fail) > 0)
2519                 TxErrorRatio = (( Retry + Fail) *100) / (OneSecTransmitCount+Retry + Fail);
2520         DBGPRINT(RT_DEBUG_INFO, ("TX ERROR Rate = %ld %%, Retry = %ld, Fail = %ld, Total = %ld  \n",TxErrorRatio, Retry, Fail, (OneSecTransmitCount+Retry + Fail)));
2521         pAd->WlanCounters.LastTransmittedFragmentCount.u.LowPart = pAd->WlanCounters.TransmittedFragmentCount.u.LowPart;
2522 #endif
2523
2524         //if (pAd->bStaFifoTest == TRUE)
2525         {
2526                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2527                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2528                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2529                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2530                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2531                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2532                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2533                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2534                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2535                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2536                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2537                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2538                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2539
2540                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2541                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2542                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2543                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2544
2545                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2546                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2547                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2548                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2549
2550                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2551                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2552                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2553                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2554
2555                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2556                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2557
2558                 // Calculate the transmitted A-MPDU count
2559                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2560                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2561
2562                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2563                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2564
2565                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2566                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2567
2568                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2569                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2570
2571                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2572                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2573
2574                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2575                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2576
2577                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2578                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2579
2580                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2581                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2582         }
2583
2584 #ifdef DBG_DIAGNOSE
2585         {
2586                 RtmpDiagStruct  *pDiag;
2587                 COUNTER_RALINK  *pRalinkCounters;
2588                 UCHAR                   ArrayCurIdx, i;
2589
2590                 pDiag = &pAd->DiagStruct;
2591                 pRalinkCounters = &pAd->RalinkCounters;
2592                 ArrayCurIdx = pDiag->ArrayCurIdx;
2593
2594                 if (pDiag->inited == 0)
2595                 {
2596                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2597                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2598                         pDiag->inited = 1;
2599                 }
2600                 else
2601                 {
2602                         // Tx
2603                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2604                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2605                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2606                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2607                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2608                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2609                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2610                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2611                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2612                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2613                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2614                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2615                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2616                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2617                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2618                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2619                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2620                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2621                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2622
2623                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2624
2625                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2626                         ArrayCurIdx = pDiag->ArrayCurIdx;
2627                         for (i =0; i < 9; i++)
2628                         {
2629                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2630                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2631                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2632                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2633                         }
2634                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2635                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2636                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2637                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2638 //                      for (i = 9; i < 16; i++)
2639                         for (i = 9; i < 24; i++) // 3*3
2640                         {
2641                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2642                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2643                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2644 }
2645
2646                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2647                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2648                 }
2649
2650         }
2651 #endif // DBG_DIAGNOSE //
2652
2653
2654 }
2655
2656
2657 /*
2658         ========================================================================
2659
2660         Routine Description:
2661                 Reset NIC from error
2662
2663         Arguments:
2664                 Adapter                                         Pointer to our adapter
2665
2666         Return Value:
2667                 None
2668
2669         IRQL = PASSIVE_LEVEL
2670
2671         Note:
2672                 Reset NIC from error state
2673
2674         ========================================================================
2675 */
2676 VOID    NICResetFromError(
2677         IN      PRTMP_ADAPTER   pAd)
2678 {
2679         // Reset BBP (according to alex, reset ASIC will force reset BBP
2680         // Therefore, skip the reset BBP
2681         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2682
2683         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2684         // Remove ASIC from reset state
2685         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2686
2687         NICInitializeAdapter(pAd, FALSE);
2688         NICInitAsicFromEEPROM(pAd);
2689
2690         // Switch to current channel, since during reset process, the connection should remains on.
2691         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2692         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2693 }
2694
2695 /*
2696         ========================================================================
2697
2698         Routine Description:
2699                 erase 8051 firmware image in MAC ASIC
2700
2701         Arguments:
2702                 Adapter                                         Pointer to our adapter
2703
2704         IRQL = PASSIVE_LEVEL
2705
2706         ========================================================================
2707 */
2708 VOID NICEraseFirmware(
2709         IN PRTMP_ADAPTER pAd)
2710 {
2711         ULONG i;
2712
2713         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2714                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2715
2716 }/* End of NICEraseFirmware */
2717
2718 /*
2719         ========================================================================
2720
2721         Routine Description:
2722                 Load 8051 firmware RT2561.BIN file into MAC ASIC
2723
2724         Arguments:
2725                 Adapter                                         Pointer to our adapter
2726
2727         Return Value:
2728                 NDIS_STATUS_SUCCESS         firmware image load ok
2729                 NDIS_STATUS_FAILURE         image not found
2730
2731         IRQL = PASSIVE_LEVEL
2732
2733         ========================================================================
2734 */
2735 NDIS_STATUS NICLoadFirmware(
2736         IN PRTMP_ADAPTER pAd)
2737 {
2738         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2739         PUCHAR                  pFirmwareImage;
2740         ULONG                   FileLength, Index;
2741         //ULONG                 firm;
2742         UINT32                  MacReg = 0;
2743 #ifdef RT2870
2744         UINT32                  Version = (pAd->MACVersion >> 16);
2745 #endif // RT2870 //
2746
2747         pFirmwareImage = FirmwareImage;
2748         FileLength = sizeof(FirmwareImage);
2749 #ifdef RT2870
2750         // New 8k byte firmware size for RT3071/RT3072
2751         //printk("Usb Chip\n");
2752         if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
2753         //The firmware image consists of two parts. One is the origianl and the other is the new.
2754         //Use Second Part
2755         {
2756                 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
2757                 {       // Use Firmware V2.
2758                         //printk("KH:Use New Version,part2\n");
2759                         pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
2760                         FileLength = FIRMWAREIMAGEV2_LENGTH;
2761                 }
2762                 else
2763                 {
2764                         //printk("KH:Use New Version,part1\n");
2765                         pFirmwareImage = FirmwareImage;
2766                         FileLength = FIRMWAREIMAGEV1_LENGTH;
2767                 }
2768         }
2769         else
2770         {
2771                 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
2772                 Status = NDIS_STATUS_FAILURE;
2773         }
2774
2775 #endif // RT2870 //
2776
2777 #if 0
2778         /* enable Host program ram write selection */
2779         RT28XX_FIRMUD_INIT(pAd);
2780
2781         for(i=0; i<FileLength; i+=4)
2782         {
2783                 firm = pFirmwareImage[i] +
2784                            (pFirmwareImage[i+3] << 24) +
2785                            (pFirmwareImage[i+2] << 16) +
2786                            (pFirmwareImage[i+1] << 8);
2787
2788                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
2789         } /* End of for */
2790
2791         RT28XX_FIRMUD_END(pAd);
2792 #else
2793         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2794 #endif
2795
2796         /* check if MCU is ready */
2797         Index = 0;
2798         do
2799         {
2800                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2801
2802                 if (MacReg & 0x80)
2803                         break;
2804
2805                 RTMPusecDelay(1000);
2806         } while (Index++ < 1000);
2807
2808     if (Index >= 1000)
2809         {
2810                 Status = NDIS_STATUS_FAILURE;
2811                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2812         } /* End of if */
2813
2814 #if 0
2815     DBGPRINT(RT_DEBUG_TRACE,
2816                          ("<=== %s (src=%s, status=%d)\n", __func__, src, Status));
2817 #else
2818     DBGPRINT(RT_DEBUG_TRACE,
2819                          ("<=== %s (status=%d)\n", __func__, Status));
2820 #endif
2821     return Status;
2822 } /* End of NICLoadFirmware */
2823
2824
2825 /*
2826         ========================================================================
2827
2828         Routine Description:
2829                 Load Tx rate switching parameters
2830
2831         Arguments:
2832                 Adapter                                         Pointer to our adapter
2833
2834         Return Value:
2835                 NDIS_STATUS_SUCCESS         firmware image load ok
2836                 NDIS_STATUS_FAILURE         image not found
2837
2838         IRQL = PASSIVE_LEVEL
2839
2840         Rate Table Format:
2841                 1. (B0: Valid Item number) (B1:Initial item from zero)
2842                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2843
2844         ========================================================================
2845 */
2846 NDIS_STATUS NICLoadRateSwitchingParams(
2847         IN PRTMP_ADAPTER pAd)
2848 {
2849 #if 0
2850         NDIS_STATUS Status;
2851
2852         NDIS_HANDLE FileHandle;
2853         UINT FileLength = 0, i, j;
2854         PUCHAR pFirmwareImage;
2855         NDIS_STRING FileName;
2856         NDIS_PHYSICAL_ADDRESS HighestAcceptableMax = NDIS_PHYSICAL_ADDRESS_CONST(-1, -1);
2857
2858         DBGPRINT(RT_DEBUG_TRACE,("===> NICLoadRateSwitchingParams \n"));
2859         pAd->CommonCfg.TxRateTableSize = 0;
2860
2861         if ((pAd->DeviceID == NIC2860_PCI_DEVICE_ID) || (pAd->DeviceID == NIC2860_PCIe_DEVICE_ID))
2862         {
2863                 NdisInitializeString(&FileName,"rate.bin");
2864                 DBGPRINT(RT_DEBUG_TRACE, ("NICLoadRateSwitchingParams: load file - rate.bin for tx rate switch \n"));
2865         }
2866         else
2867         {
2868                 DBGPRINT_ERR(("NICLoadRateSwitchingParams: wrong DeviceID = 0x%04x, can't find Tx rate switch parameters file\n", pAd->DeviceID));
2869                 return NDIS_STATUS_SUCCESS;
2870         }
2871         NdisOpenFile(&Status, &FileHandle, &FileLength, &FileName, HighestAcceptableMax);
2872         NdisFreeString(FileName);
2873
2874         if (Status != NDIS_STATUS_SUCCESS)
2875         {
2876                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadRateSwitchingParams: NdisOpenFile() failed, used RateSwitchTable instead\n"));
2877                 return NDIS_STATUS_SUCCESS;
2878         }
2879
2880         if ((FileLength == 0) || (FileLength > (MAX_STEP_OF_TX_RATE_SWITCH+1)*16))
2881         {
2882                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadRateSwitchingParams: file size is not reasonable, used RateSwitchTable instead\n"));
2883
2884                 NdisCloseFile(FileHandle);
2885                 return NDIS_STATUS_SUCCESS;
2886         }
2887         else
2888         {
2889                 //
2890                 // NDIS_STATUS_SUCCESS means
2891                 // The handle at FileHandle is valid for a subsequent call to NdisMapFile.
2892                 //
2893                 NdisMapFile(&Status, &pFirmwareImage, FileHandle);
2894                 DBGPRINT(RT_DEBUG_TRACE, ("NdisMapFile FileLength=%d\n", FileLength));
2895         }
2896
2897         for (i=0, j=0; i<FileLength; i++)
2898         {
2899                 if ((i%16) <= 4)        // trim reserved field
2900                 {
2901                         if (i%16 == 1)  // deal with DEC and HEX, only row0 is Hex, others are Dec
2902                         {
2903                                 RateSwitchTable[j] = *(pFirmwareImage + i);
2904                         }
2905                         else
2906                         {
2907                                 RateSwitchTable[j] = (*(pFirmwareImage + i)>>4) * 10 + (*(pFirmwareImage + i) & 0x0F);
2908                         }
2909
2910                         j++;
2911                 }
2912         }
2913
2914         pAd->CommonCfg.TxRateTableSize = RateSwitchTable[0];            // backup table size
2915
2916         if (Status == NDIS_STATUS_SUCCESS)
2917         {
2918                 NdisUnmapFile(FileHandle);
2919                 NdisCloseFile(FileHandle);
2920         }
2921
2922         DBGPRINT(RT_DEBUG_TRACE,("<=== NICLoadRateSwitchingParams(Valid TxRateTable item number=%d)\n", pAd->CommonCfg.TxRateTableSize));
2923 #endif
2924         return NDIS_STATUS_SUCCESS;
2925 }
2926
2927 /*
2928         ========================================================================
2929
2930         Routine Description:
2931                 if  pSrc1 all zero with length Length, return 0.
2932                 If not all zero, return 1
2933
2934         Arguments:
2935                 pSrc1
2936
2937         Return Value:
2938                 1:                      not all zero
2939                 0:                      all zero
2940
2941         IRQL = DISPATCH_LEVEL
2942
2943         Note:
2944
2945         ========================================================================
2946 */
2947 ULONG   RTMPNotAllZero(
2948         IN      PVOID   pSrc1,
2949         IN      ULONG   Length)
2950 {
2951         PUCHAR  pMem1;
2952         ULONG   Index = 0;
2953
2954         pMem1 = (PUCHAR) pSrc1;
2955
2956         for (Index = 0; Index < Length; Index++)
2957         {
2958                 if (pMem1[Index] != 0x0)
2959                 {
2960                         break;
2961                 }
2962         }
2963
2964         if (Index == Length)
2965         {
2966                 return (0);
2967         }
2968         else
2969         {
2970                 return (1);
2971         }
2972 }
2973
2974 /*
2975         ========================================================================
2976
2977         Routine Description:
2978                 Compare two memory block
2979
2980         Arguments:
2981                 pSrc1           Pointer to first memory address
2982                 pSrc2           Pointer to second memory address
2983
2984         Return Value:
2985                 0:                      memory is equal
2986                 1:                      pSrc1 memory is larger
2987                 2:                      pSrc2 memory is larger
2988
2989         IRQL = DISPATCH_LEVEL
2990
2991         Note:
2992
2993         ========================================================================
2994 */
2995 ULONG   RTMPCompareMemory(
2996         IN      PVOID   pSrc1,
2997         IN      PVOID   pSrc2,
2998         IN      ULONG   Length)
2999 {
3000         PUCHAR  pMem1;
3001         PUCHAR  pMem2;
3002         ULONG   Index = 0;
3003
3004         pMem1 = (PUCHAR) pSrc1;
3005         pMem2 = (PUCHAR) pSrc2;
3006
3007         for (Index = 0; Index < Length; Index++)
3008         {
3009                 if (pMem1[Index] > pMem2[Index])
3010                         return (1);
3011                 else if (pMem1[Index] < pMem2[Index])
3012                         return (2);
3013         }
3014
3015         // Equal
3016         return (0);
3017 }
3018
3019 /*
3020         ========================================================================
3021
3022         Routine Description:
3023                 Zero out memory block
3024
3025         Arguments:
3026                 pSrc1           Pointer to memory address
3027                 Length          Size
3028
3029         Return Value:
3030                 None
3031
3032         IRQL = PASSIVE_LEVEL
3033         IRQL = DISPATCH_LEVEL
3034
3035         Note:
3036
3037         ========================================================================
3038 */
3039 VOID    RTMPZeroMemory(
3040         IN      PVOID   pSrc,
3041         IN      ULONG   Length)
3042 {
3043         PUCHAR  pMem;
3044         ULONG   Index = 0;
3045
3046         pMem = (PUCHAR) pSrc;
3047
3048         for (Index = 0; Index < Length; Index++)
3049         {
3050                 pMem[Index] = 0x00;
3051         }
3052 }
3053
3054 VOID    RTMPFillMemory(
3055         IN      PVOID   pSrc,
3056         IN      ULONG   Length,
3057         IN      UCHAR   Fill)
3058 {
3059         PUCHAR  pMem;
3060         ULONG   Index = 0;
3061
3062         pMem = (PUCHAR) pSrc;
3063
3064         for (Index = 0; Index < Length; Index++)
3065         {
3066                 pMem[Index] = Fill;
3067         }
3068 }
3069
3070 /*
3071         ========================================================================
3072
3073         Routine Description:
3074                 Copy data from memory block 1 to memory block 2
3075
3076         Arguments:
3077                 pDest           Pointer to destination memory address
3078                 pSrc            Pointer to source memory address
3079                 Length          Copy size
3080
3081         Return Value:
3082                 None
3083
3084         IRQL = PASSIVE_LEVEL
3085         IRQL = DISPATCH_LEVEL
3086
3087         Note:
3088
3089         ========================================================================
3090 */
3091 VOID    RTMPMoveMemory(
3092         OUT     PVOID   pDest,
3093         IN      PVOID   pSrc,
3094         IN      ULONG   Length)
3095 {
3096         PUCHAR  pMem1;
3097         PUCHAR  pMem2;
3098         UINT    Index;
3099
3100         ASSERT((Length==0) || (pDest && pSrc));
3101
3102         pMem1 = (PUCHAR) pDest;
3103         pMem2 = (PUCHAR) pSrc;
3104
3105         for (Index = 0; Index < Length; Index++)
3106         {
3107                 pMem1[Index] = pMem2[Index];
3108         }
3109 }
3110
3111 /*
3112         ========================================================================
3113
3114         Routine Description:
3115                 Initialize port configuration structure
3116
3117         Arguments:
3118                 Adapter                                         Pointer to our adapter
3119
3120         Return Value:
3121                 None
3122
3123         IRQL = PASSIVE_LEVEL
3124
3125         Note:
3126
3127         ========================================================================
3128 */
3129 VOID    UserCfgInit(
3130         IN      PRTMP_ADAPTER pAd)
3131 {
3132 //      EDCA_PARM DefaultEdcaParm;
3133     UINT key_index, bss_index;
3134
3135         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3136
3137         //
3138         //  part I. intialize common configuration
3139         //
3140 #ifdef RT2870
3141         pAd->BulkOutReq = 0;
3142
3143         pAd->BulkOutComplete = 0;
3144         pAd->BulkOutCompleteOther = 0;
3145         pAd->BulkOutCompleteCancel = 0;
3146         pAd->BulkInReq = 0;
3147         pAd->BulkInComplete = 0;
3148         pAd->BulkInCompleteFail = 0;
3149
3150         //pAd->QuickTimerP = 100;
3151         //pAd->TurnAggrBulkInCount = 0;
3152         pAd->bUsbTxBulkAggre = 0;
3153
3154         // init as unsed value to ensure driver will set to MCU once.
3155         pAd->LedIndicatorStregth = 0xFF;
3156
3157         pAd->CommonCfg.MaxPktOneTxBulk = 2;
3158         pAd->CommonCfg.TxBulkFactor = 1;
3159         pAd->CommonCfg.RxBulkFactor =1;
3160
3161         pAd->CommonCfg.TxPower = 100; //mW
3162
3163         NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3164 #endif // RT2870 //
3165
3166         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3167         {
3168                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3169                 {
3170                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3171                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3172                 }
3173         }
3174
3175         pAd->Antenna.word = 0;
3176         pAd->CommonCfg.BBPCurrentBW = BW_20;
3177
3178         pAd->LedCntl.word = 0;
3179
3180         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
3181         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
3182         pAd->RfIcType = RFIC_2820;
3183
3184         // Init timer for reset complete event
3185         pAd->CommonCfg.CentralChannel = 1;
3186         pAd->bForcePrintTX = FALSE;
3187         pAd->bForcePrintRX = FALSE;
3188         pAd->bStaFifoTest = FALSE;
3189         pAd->bProtectionTest = FALSE;
3190         pAd->bHCCATest = FALSE;
3191         pAd->bGenOneHCCA = FALSE;
3192         pAd->CommonCfg.Dsifs = 10;      // in units of usec
3193         pAd->CommonCfg.TxPower = 100; //mW
3194         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3195         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3196         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3197         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3198         pAd->CommonCfg.RtsThreshold = 2347;
3199         pAd->CommonCfg.FragmentThreshold = 2346;
3200         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
3201         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3202         pAd->CommonCfg.PhyMode = 0xff;     // unknown
3203         pAd->CommonCfg.BandState = UNKNOWN_BAND;
3204         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3205         pAd->CommonCfg.RadarDetect.CSCount = 0;
3206         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3207         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3208         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3209         pAd->CommonCfg.bAPSDCapable = FALSE;
3210         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3211         pAd->CommonCfg.TriggerTimerCount = 0;
3212         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3213         pAd->CommonCfg.bCountryFlag = FALSE;
3214         pAd->CommonCfg.TxStream = 0;
3215         pAd->CommonCfg.RxStream = 0;
3216
3217         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3218
3219 #ifdef DOT11_N_SUPPORT
3220         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3221         pAd->HTCEnable = FALSE;
3222         pAd->bBroadComHT = FALSE;
3223         pAd->CommonCfg.bRdg = FALSE;
3224
3225 #ifdef DOT11N_DRAFT3
3226         pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell;   // Unit : TU. 5~1000
3227         pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell;     // Unit : TU. 10~1000
3228         pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval;  // Unit : Second
3229         pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel;       // Unit : TU. 200~10000
3230         pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
3231         pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
3232         pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold;       // Unit : percentage
3233         pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
3234 #endif  // DOT11N_DRAFT3 //
3235
3236         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3237         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3238         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3239         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3240         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3241         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3242         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3243
3244         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3245         BATableInit(pAd, &pAd->BATable);
3246
3247         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3248         pAd->CommonCfg.bHTProtect = 1;
3249         pAd->CommonCfg.bMIMOPSEnable = TRUE;
3250         pAd->CommonCfg.bBADecline = FALSE;
3251         pAd->CommonCfg.bDisableReordering = FALSE;
3252
3253         pAd->CommonCfg.TxBASize = 7;
3254
3255         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3256 #endif // DOT11_N_SUPPORT //
3257
3258         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3259         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3260         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3261         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3262         pAd->CommonCfg.TxRate = RATE_6;
3263
3264         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3265         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3266         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3267
3268         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3269
3270         //
3271         // part II. intialize STA specific configuration
3272         //
3273 #ifdef CONFIG_STA_SUPPORT
3274         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3275         {
3276                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3277                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3278                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3279                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3280
3281                 pAd->StaCfg.Psm = PWR_ACTIVE;
3282
3283                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3284                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3285                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3286                 pAd->StaCfg.bMixCipher = FALSE;
3287                 pAd->StaCfg.DefaultKeyId = 0;
3288
3289                 // 802.1x port control
3290                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3291                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3292                 pAd->StaCfg.LastMicErrorTime = 0;
3293                 pAd->StaCfg.MicErrCnt        = 0;
3294                 pAd->StaCfg.bBlockAssoc      = FALSE;
3295                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3296
3297                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3298
3299                 pAd->StaCfg.RssiTrigger = 0;
3300                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3301                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3302                 pAd->StaCfg.AtimWin = 0;
3303                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3304                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3305                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3306                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3307                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3308
3309                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3310                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3311         }
3312 #endif // CONFIG_STA_SUPPORT //
3313
3314         // global variables mXXXX used in MAC protocol state machines
3315         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3316         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3317         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3318
3319         // PHY specification
3320         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3321         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3322
3323 #ifdef CONFIG_STA_SUPPORT
3324         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3325         {
3326                 // user desired power mode
3327                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3328                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3329                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3330
3331 #ifdef LEAP_SUPPORT
3332                 // CCX v1.0 releated init value
3333                 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3334                 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3335                 pAd->StaCfg.bCkipOn = FALSE;
3336 #endif // LEAP_SUPPORT //
3337
3338                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3339                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3340
3341                 // Patch for Ndtest
3342                 pAd->StaCfg.ScanCnt = 0;
3343
3344                 // CCX 2.0 control flag init
3345                 pAd->StaCfg.CCXEnable = FALSE;
3346                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3347                 pAd->StaCfg.CCXQosECWMin        = 4;
3348                 pAd->StaCfg.CCXQosECWMax        = 10;
3349
3350                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3351                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3352                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3353                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3354                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3355
3356                 // Nitro mode control
3357                 pAd->StaCfg.bAutoReconnect = TRUE;
3358
3359                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3360                 // This patch is for driver wake up from standby mode, system will do scan right away.
3361                 pAd->StaCfg.LastScanTime = 0;
3362                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3363                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3364                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3365 #ifdef WPA_SUPPLICANT_SUPPORT
3366                 pAd->StaCfg.IEEE8021X = FALSE;
3367                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3368                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3369 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3370                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3371 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3372 #endif // WPA_SUPPLICANT_SUPPORT //
3373
3374         }
3375 #endif // CONFIG_STA_SUPPORT //
3376
3377         // Default for extra information is not valid
3378         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3379
3380         // Default Config change flag
3381         pAd->bConfigChanged = FALSE;
3382
3383         //
3384         // part III. AP configurations
3385         //
3386
3387
3388         //
3389         // part IV. others
3390         //
3391         // dynamic BBP R66:sensibity tuning to overcome background noise
3392         pAd->BbpTuning.bEnable                = TRUE;
3393         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3394         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3395         pAd->BbpTuning.R66Delta               = 4;
3396         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3397
3398         //
3399         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3400         // if not initial this value, the default value will be 0.
3401         //
3402         pAd->BbpTuning.R66CurrentValue = 0x38;
3403
3404         pAd->Bbp94 = BBPR94_DEFAULT;
3405         pAd->BbpForCCK = FALSE;
3406
3407         // Default is FALSE for test bit 1
3408         //pAd->bTest1 = FALSE;
3409
3410         // initialize MAC table and allocate spin lock
3411         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3412         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3413         NdisAllocateSpinLock(&pAd->MacTabLock);
3414
3415         //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
3416         //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
3417
3418         pAd->CommonCfg.bWiFiTest = FALSE;
3419
3420
3421         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3422 }
3423
3424 // IRQL = PASSIVE_LEVEL
3425 UCHAR BtoH(char ch)
3426 {
3427         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3428         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3429         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3430         return(255);
3431 }
3432
3433 //
3434 //  FUNCTION: AtoH(char *, UCHAR *, int)
3435 //
3436 //  PURPOSE:  Converts ascii string to network order hex
3437 //
3438 //  PARAMETERS:
3439 //    src    - pointer to input ascii string
3440 //    dest   - pointer to output hex
3441 //    destlen - size of dest
3442 //
3443 //  COMMENTS:
3444 //
3445 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3446 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3447 //
3448 // IRQL = PASSIVE_LEVEL
3449
3450 void AtoH(char * src, UCHAR * dest, int destlen)
3451 {
3452         char * srcptr;
3453         PUCHAR destTemp;
3454
3455         srcptr = src;
3456         destTemp = (PUCHAR) dest;
3457
3458         while(destlen--)
3459         {
3460                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3461                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3462                 destTemp++;
3463         }
3464 }
3465
3466 VOID    RTMPPatchMacBbpBug(
3467         IN      PRTMP_ADAPTER   pAd)
3468 {
3469         ULONG   Index;
3470
3471         // Initialize BBP register to default value
3472         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3473         {
3474                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3475         }
3476
3477         // Initialize RF register to default value
3478         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3479         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3480
3481         // Re-init BBP register from EEPROM value
3482         NICInitAsicFromEEPROM(pAd);
3483 }
3484
3485 /*
3486         ========================================================================
3487
3488         Routine Description:
3489                 Init timer objects
3490
3491         Arguments:
3492                 pAd                     Pointer to our adapter
3493                 pTimer                          Timer structure
3494                 pTimerFunc                      Function to execute when timer expired
3495                 Repeat                          Ture for period timer
3496
3497         Return Value:
3498                 None
3499
3500         Note:
3501
3502         ========================================================================
3503 */
3504 VOID    RTMPInitTimer(
3505         IN      PRTMP_ADAPTER                   pAd,
3506         IN      PRALINK_TIMER_STRUCT    pTimer,
3507         IN      PVOID                                   pTimerFunc,
3508         IN      PVOID                                   pData,
3509         IN      BOOLEAN                                 Repeat)
3510 {
3511         //
3512         // Set Valid to TRUE for later used.
3513         // It will crash if we cancel a timer or set a timer
3514         // that we haven't initialize before.
3515         //
3516         pTimer->Valid      = TRUE;
3517
3518         pTimer->PeriodicType = Repeat;
3519         pTimer->State      = FALSE;
3520         pTimer->cookie = (ULONG) pData;
3521
3522 #ifdef RT2870
3523         pTimer->pAd = pAd;
3524 #endif // RT2870 //
3525
3526         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3527 }
3528
3529 /*
3530         ========================================================================
3531
3532         Routine Description:
3533                 Init timer objects
3534
3535         Arguments:
3536                 pTimer                          Timer structure
3537                 Value                           Timer value in milliseconds
3538
3539         Return Value:
3540                 None
3541
3542         Note:
3543                 To use this routine, must call RTMPInitTimer before.
3544
3545         ========================================================================
3546 */
3547 VOID    RTMPSetTimer(
3548         IN      PRALINK_TIMER_STRUCT    pTimer,
3549         IN      ULONG                                   Value)
3550 {
3551         if (pTimer->Valid)
3552         {
3553                 pTimer->TimerValue = Value;
3554                 pTimer->State      = FALSE;
3555                 if (pTimer->PeriodicType == TRUE)
3556                 {
3557                         pTimer->Repeat = TRUE;
3558                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3559                 }
3560                 else
3561                 {
3562                         pTimer->Repeat = FALSE;
3563                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3564                 }
3565         }
3566         else
3567         {
3568                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3569         }
3570 }
3571
3572
3573 /*
3574         ========================================================================
3575
3576         Routine Description:
3577                 Init timer objects
3578
3579         Arguments:
3580                 pTimer                          Timer structure
3581                 Value                           Timer value in milliseconds
3582
3583         Return Value:
3584                 None
3585
3586         Note:
3587                 To use this routine, must call RTMPInitTimer before.
3588
3589         ========================================================================
3590 */
3591 VOID    RTMPModTimer(
3592         IN      PRALINK_TIMER_STRUCT    pTimer,
3593         IN      ULONG                                   Value)
3594 {
3595         BOOLEAN Cancel;
3596
3597         if (pTimer->Valid)
3598         {
3599                 pTimer->TimerValue = Value;
3600                 pTimer->State      = FALSE;
3601                 if (pTimer->PeriodicType == TRUE)
3602                 {
3603                         RTMPCancelTimer(pTimer, &Cancel);
3604                         RTMPSetTimer(pTimer, Value);
3605                 }
3606                 else
3607                 {
3608                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3609                 }
3610         }
3611         else
3612         {
3613                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3614         }
3615 }
3616
3617 /*
3618         ========================================================================
3619
3620         Routine Description:
3621                 Cancel timer objects
3622
3623         Arguments:
3624                 Adapter                                         Pointer to our adapter
3625
3626         Return Value:
3627                 None
3628
3629         IRQL = PASSIVE_LEVEL
3630         IRQL = DISPATCH_LEVEL
3631
3632         Note:
3633                 1.) To use this routine, must call RTMPInitTimer before.
3634                 2.) Reset NIC to initial state AS IS system boot up time.
3635
3636         ========================================================================
3637 */
3638 VOID    RTMPCancelTimer(
3639         IN      PRALINK_TIMER_STRUCT    pTimer,
3640         OUT     BOOLEAN                                 *pCancelled)
3641 {
3642         if (pTimer->Valid)
3643         {
3644                 if (pTimer->State == FALSE)
3645                         pTimer->Repeat = FALSE;
3646                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3647
3648                 if (*pCancelled == TRUE)
3649                         pTimer->State = TRUE;
3650
3651 #ifdef RT2870
3652                 // We need to go-through the TimerQ to findout this timer handler and remove it if
3653                 //              it's still waiting for execution.
3654
3655                 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3656 #endif // RT2870 //
3657         }
3658         else
3659         {
3660                 //
3661                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3662                 // And don't set the "Valid" to False. So that we can use this timer again.
3663                 //
3664                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3665         }
3666 }
3667
3668 /*
3669         ========================================================================
3670
3671         Routine Description:
3672                 Set LED Status
3673
3674         Arguments:
3675                 pAd                                             Pointer to our adapter
3676                 Status                                  LED Status
3677
3678         Return Value:
3679                 None
3680
3681         IRQL = PASSIVE_LEVEL
3682         IRQL = DISPATCH_LEVEL
3683
3684         Note:
3685
3686         ========================================================================
3687 */
3688 VOID RTMPSetLED(
3689         IN PRTMP_ADAPTER        pAd,
3690         IN UCHAR                        Status)
3691 {
3692         //ULONG                 data;
3693         UCHAR                   HighByte = 0;
3694         UCHAR                   LowByte;
3695
3696         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3697         switch (Status)
3698         {
3699                 case LED_LINK_DOWN:
3700                         HighByte = 0x20;
3701                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3702                         pAd->LedIndicatorStregth = 0;
3703                         break;
3704                 case LED_LINK_UP:
3705                         if (pAd->CommonCfg.Channel > 14)
3706                                 HighByte = 0xa0;
3707                         else
3708                                 HighByte = 0x60;
3709                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3710                         break;
3711                 case LED_RADIO_ON:
3712                         HighByte = 0x20;
3713                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3714                         break;
3715                 case LED_HALT:
3716                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3717                 case LED_RADIO_OFF:
3718                         HighByte = 0;
3719                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3720                         break;
3721         case LED_WPS:
3722                         HighByte = 0x10;
3723                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3724                         break;
3725                 case LED_ON_SITE_SURVEY:
3726                         HighByte = 0x08;
3727                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3728                         break;
3729                 case LED_POWER_UP:
3730                         HighByte = 0x04;
3731                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3732                         break;
3733                 default:
3734                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3735                         break;
3736         }
3737
3738     //
3739         // Keep LED status for LED SiteSurvey mode.
3740         // After SiteSurvey, we will set the LED mode to previous status.
3741         //
3742         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3743                 pAd->LedStatus = Status;
3744
3745         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3746 }
3747
3748 /*
3749         ========================================================================
3750
3751         Routine Description:
3752                 Set LED Signal Stregth
3753
3754         Arguments:
3755                 pAd                                             Pointer to our adapter
3756                 Dbm                                             Signal Stregth
3757
3758         Return Value:
3759                 None
3760
3761         IRQL = PASSIVE_LEVEL
3762
3763         Note:
3764                 Can be run on any IRQL level.
3765
3766                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3767                 <= -90  No Signal
3768                 <= -81  Very Low
3769                 <= -71  Low
3770                 <= -67  Good
3771                 <= -57  Very Good
3772                  > -57  Excellent
3773         ========================================================================
3774 */
3775 VOID RTMPSetSignalLED(
3776         IN PRTMP_ADAPTER        pAd,
3777         IN NDIS_802_11_RSSI Dbm)
3778 {
3779         UCHAR           nLed = 0;
3780
3781         //
3782         // if not Signal Stregth, then do nothing.
3783         //
3784         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3785         {
3786                 return;
3787         }
3788
3789         if (Dbm <= -90)
3790                 nLed = 0;
3791         else if (Dbm <= -81)
3792                 nLed = 1;
3793         else if (Dbm <= -71)
3794                 nLed = 3;
3795         else if (Dbm <= -67)
3796                 nLed = 7;
3797         else if (Dbm <= -57)
3798                 nLed = 15;
3799         else
3800                 nLed = 31;
3801
3802         //
3803         // Update Signal Stregth to firmware if changed.
3804         //
3805         if (pAd->LedIndicatorStregth != nLed)
3806         {
3807                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3808                 pAd->LedIndicatorStregth = nLed;
3809         }
3810 }
3811
3812 /*
3813         ========================================================================
3814
3815         Routine Description:
3816                 Enable RX
3817
3818         Arguments:
3819                 pAd                                             Pointer to our adapter
3820
3821         Return Value:
3822                 None
3823
3824         IRQL <= DISPATCH_LEVEL
3825
3826         Note:
3827                 Before Enable RX, make sure you have enabled Interrupt.
3828         ========================================================================
3829 */
3830 VOID RTMPEnableRxTx(
3831         IN PRTMP_ADAPTER        pAd)
3832 {
3833 //      WPDMA_GLO_CFG_STRUC     GloCfg;
3834 //      ULONG   i = 0;
3835
3836         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3837
3838 #if 0
3839         // Enable Rx DMA.
3840         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x4);
3841         do
3842         {
3843                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
3844                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
3845                         break;
3846
3847                 DBGPRINT(RT_DEBUG_TRACE, ("==>  DMABusy\n"));
3848                 RTMPusecDelay(1000);
3849                 i++;
3850         }while ( i <200);
3851
3852         RTMPusecDelay(50);
3853         RT28XX_DMA_WRITE_INIT(GloCfg);
3854         DBGPRINT(RT_DEBUG_TRACE, ("<== WRITE DMA offset 0x208 = 0x%x\n", GloCfg.word));
3855         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
3856
3857         RT28XX_DMA_POST_WRITE(pAd);
3858 #else
3859         // Enable Rx DMA.
3860         RT28XXDMAEnable(pAd);
3861 #endif
3862
3863         // enable RX of MAC block
3864         if (pAd->OpMode == OPMODE_AP)
3865         {
3866                 UINT32 rx_filter_flag = APNORMAL;
3867
3868
3869                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3870         }
3871         else
3872         {
3873                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
3874         }
3875
3876         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3877         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3878 }
3879
3880