2 * arch/arm/mach-at91/at91rm9200_devices.c
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c-gpio.h>
19 #include <asm/arch/board.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/at91rm9200.h>
22 #include <asm/arch/at91rm9200_mc.h>
27 /* --------------------------------------------------------------------
29 * -------------------------------------------------------------------- */
31 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
32 static u64 ohci_dmamask = 0xffffffffUL;
33 static struct at91_usbh_data usbh_data;
35 static struct resource usbh_resources[] = {
37 .start = AT91RM9200_UHP_BASE,
38 .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
39 .flags = IORESOURCE_MEM,
42 .start = AT91RM9200_ID_UHP,
43 .end = AT91RM9200_ID_UHP,
44 .flags = IORESOURCE_IRQ,
48 static struct platform_device at91rm9200_usbh_device = {
52 .dma_mask = &ohci_dmamask,
53 .coherent_dma_mask = 0xffffffff,
54 .platform_data = &usbh_data,
56 .resource = usbh_resources,
57 .num_resources = ARRAY_SIZE(usbh_resources),
60 void __init at91_add_device_usbh(struct at91_usbh_data *data)
66 platform_device_register(&at91rm9200_usbh_device);
69 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
73 /* --------------------------------------------------------------------
75 * -------------------------------------------------------------------- */
77 #ifdef CONFIG_USB_GADGET_AT91
78 static struct at91_udc_data udc_data;
80 static struct resource udc_resources[] = {
82 .start = AT91RM9200_BASE_UDP,
83 .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
84 .flags = IORESOURCE_MEM,
87 .start = AT91RM9200_ID_UDP,
88 .end = AT91RM9200_ID_UDP,
89 .flags = IORESOURCE_IRQ,
93 static struct platform_device at91rm9200_udc_device = {
97 .platform_data = &udc_data,
99 .resource = udc_resources,
100 .num_resources = ARRAY_SIZE(udc_resources),
103 void __init at91_add_device_udc(struct at91_udc_data *data)
108 if (data->vbus_pin) {
109 at91_set_gpio_input(data->vbus_pin, 0);
110 at91_set_deglitch(data->vbus_pin, 1);
112 if (data->pullup_pin)
113 at91_set_gpio_output(data->pullup_pin, 0);
116 platform_device_register(&at91rm9200_udc_device);
119 void __init at91_add_device_udc(struct at91_udc_data *data) {}
123 /* --------------------------------------------------------------------
125 * -------------------------------------------------------------------- */
127 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
128 static u64 eth_dmamask = 0xffffffffUL;
129 static struct at91_eth_data eth_data;
131 static struct resource eth_resources[] = {
133 .start = AT91_VA_BASE_EMAC,
134 .end = AT91_VA_BASE_EMAC + SZ_16K - 1,
135 .flags = IORESOURCE_MEM,
138 .start = AT91RM9200_ID_EMAC,
139 .end = AT91RM9200_ID_EMAC,
140 .flags = IORESOURCE_IRQ,
144 static struct platform_device at91rm9200_eth_device = {
145 .name = "at91_ether",
148 .dma_mask = ð_dmamask,
149 .coherent_dma_mask = 0xffffffff,
150 .platform_data = ð_data,
152 .resource = eth_resources,
153 .num_resources = ARRAY_SIZE(eth_resources),
156 void __init at91_add_device_eth(struct at91_eth_data *data)
161 if (data->phy_irq_pin) {
162 at91_set_gpio_input(data->phy_irq_pin, 0);
163 at91_set_deglitch(data->phy_irq_pin, 1);
166 /* Pins used for MII and RMII */
167 at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
168 at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
169 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
170 at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
171 at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
172 at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
173 at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
174 at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
175 at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
176 at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
178 if (!data->is_rmii) {
179 at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
180 at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
181 at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
182 at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
183 at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
184 at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
185 at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
186 at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
190 platform_device_register(&at91rm9200_eth_device);
193 void __init at91_add_device_eth(struct at91_eth_data *data) {}
197 /* --------------------------------------------------------------------
198 * Compact Flash / PCMCIA
199 * -------------------------------------------------------------------- */
201 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
202 static struct at91_cf_data cf_data;
204 #define CF_BASE AT91_CHIPSELECT_4
206 static struct resource cf_resources[] = {
209 /* ties up CS4, CS5 and CS6 */
210 .end = CF_BASE + (0x30000000 - 1),
211 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
215 static struct platform_device at91rm9200_cf_device = {
219 .platform_data = &cf_data,
221 .resource = cf_resources,
222 .num_resources = ARRAY_SIZE(cf_resources),
225 void __init at91_add_device_cf(struct at91_cf_data *data)
232 data->chipselect = 4; /* can only use EBI ChipSelect 4 */
234 /* CF takes over CS4, CS5, CS6 */
235 csa = at91_sys_read(AT91_EBI_CSA);
236 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
239 * Static memory controller timing adjustments.
240 * REVISIT: these timings are in terms of MCK cycles, so
241 * when MCK changes (cpufreq etc) so must these values...
243 at91_sys_write(AT91_SMC_CSR(4),
248 | AT91_SMC_NWS_(32) /* wait states */
249 | AT91_SMC_RWSETUP_(6) /* setup time */
250 | AT91_SMC_RWHOLD_(4) /* hold time */
255 at91_set_gpio_input(data->irq_pin, 1);
256 at91_set_deglitch(data->irq_pin, 1);
258 at91_set_gpio_input(data->det_pin, 1);
259 at91_set_deglitch(data->det_pin, 1);
261 /* outputs, initially off */
263 at91_set_gpio_output(data->vcc_pin, 0);
264 at91_set_gpio_output(data->rst_pin, 0);
266 /* force poweron defaults for these pins ... */
267 at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
268 at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
269 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
270 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
272 /* nWAIT is _not_ a default setting */
273 at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
276 platform_device_register(&at91rm9200_cf_device);
279 void __init at91_add_device_cf(struct at91_cf_data *data) {}
283 /* --------------------------------------------------------------------
285 * -------------------------------------------------------------------- */
287 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
288 static u64 mmc_dmamask = 0xffffffffUL;
289 static struct at91_mmc_data mmc_data;
291 static struct resource mmc_resources[] = {
293 .start = AT91RM9200_BASE_MCI,
294 .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
295 .flags = IORESOURCE_MEM,
298 .start = AT91RM9200_ID_MCI,
299 .end = AT91RM9200_ID_MCI,
300 .flags = IORESOURCE_IRQ,
304 static struct platform_device at91rm9200_mmc_device = {
308 .dma_mask = &mmc_dmamask,
309 .coherent_dma_mask = 0xffffffff,
310 .platform_data = &mmc_data,
312 .resource = mmc_resources,
313 .num_resources = ARRAY_SIZE(mmc_resources),
316 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
323 at91_set_gpio_input(data->det_pin, 1);
324 at91_set_deglitch(data->det_pin, 1);
327 at91_set_gpio_input(data->wp_pin, 1);
329 at91_set_gpio_output(data->vcc_pin, 0);
332 at91_set_A_periph(AT91_PIN_PA27, 0);
336 at91_set_B_periph(AT91_PIN_PA8, 1);
338 /* DAT0, maybe DAT1..DAT3 */
339 at91_set_B_periph(AT91_PIN_PA9, 1);
341 at91_set_B_periph(AT91_PIN_PA10, 1);
342 at91_set_B_periph(AT91_PIN_PA11, 1);
343 at91_set_B_periph(AT91_PIN_PA12, 1);
347 at91_set_A_periph(AT91_PIN_PA28, 1);
349 /* DAT0, maybe DAT1..DAT3 */
350 at91_set_A_periph(AT91_PIN_PA29, 1);
352 at91_set_B_periph(AT91_PIN_PB3, 1);
353 at91_set_B_periph(AT91_PIN_PB4, 1);
354 at91_set_B_periph(AT91_PIN_PB5, 1);
359 platform_device_register(&at91rm9200_mmc_device);
362 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
366 /* --------------------------------------------------------------------
368 * -------------------------------------------------------------------- */
370 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
371 static struct at91_nand_data nand_data;
373 #define NAND_BASE AT91_CHIPSELECT_3
375 static struct resource nand_resources[] = {
378 .end = NAND_BASE + SZ_8M - 1,
379 .flags = IORESOURCE_MEM,
383 static struct platform_device at91rm9200_nand_device = {
387 .platform_data = &nand_data,
389 .resource = nand_resources,
390 .num_resources = ARRAY_SIZE(nand_resources),
393 void __init at91_add_device_nand(struct at91_nand_data *data)
400 /* enable the address range of CS3 */
401 csa = at91_sys_read(AT91_EBI_CSA);
402 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
404 /* set the bus interface characteristics */
405 at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
408 | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
409 | AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */
413 if (data->enable_pin)
414 at91_set_gpio_output(data->enable_pin, 1);
418 at91_set_gpio_input(data->rdy_pin, 1);
420 /* card detect pin */
422 at91_set_gpio_input(data->det_pin, 1);
424 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
425 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
428 platform_device_register(&at91rm9200_nand_device);
431 void __init at91_add_device_nand(struct at91_nand_data *data) {}
435 /* --------------------------------------------------------------------
437 * -------------------------------------------------------------------- */
440 * Prefer the GPIO code since the TWI controller isn't robust
441 * (gets overruns and underruns under load) and can only issue
442 * repeated STARTs in one scenario (the driver doesn't yet handle them).
444 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
446 static struct i2c_gpio_platform_data pdata = {
447 .sda_pin = AT91_PIN_PA25,
448 .sda_is_open_drain = 1,
449 .scl_pin = AT91_PIN_PA26,
450 .scl_is_open_drain = 1,
451 .udelay = 2, /* ~100 kHz */
454 static struct platform_device at91rm9200_twi_device = {
457 .dev.platform_data = &pdata,
460 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
462 at91_set_GPIO_periph(AT91_PIN_PA25, 1); /* TWD (SDA) */
463 at91_set_multi_drive(AT91_PIN_PA25, 1);
465 at91_set_GPIO_periph(AT91_PIN_PA26, 1); /* TWCK (SCL) */
466 at91_set_multi_drive(AT91_PIN_PA26, 1);
468 i2c_register_board_info(0, devices, nr_devices);
469 platform_device_register(&at91rm9200_twi_device);
472 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
474 static struct resource twi_resources[] = {
476 .start = AT91RM9200_BASE_TWI,
477 .end = AT91RM9200_BASE_TWI + SZ_16K - 1,
478 .flags = IORESOURCE_MEM,
481 .start = AT91RM9200_ID_TWI,
482 .end = AT91RM9200_ID_TWI,
483 .flags = IORESOURCE_IRQ,
487 static struct platform_device at91rm9200_twi_device = {
490 .resource = twi_resources,
491 .num_resources = ARRAY_SIZE(twi_resources),
494 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
496 /* pins used for TWI interface */
497 at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
498 at91_set_multi_drive(AT91_PIN_PA25, 1);
500 at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
501 at91_set_multi_drive(AT91_PIN_PA26, 1);
503 i2c_register_board_info(0, devices, nr_devices);
504 platform_device_register(&at91rm9200_twi_device);
507 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
511 /* --------------------------------------------------------------------
513 * -------------------------------------------------------------------- */
515 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
516 static u64 spi_dmamask = 0xffffffffUL;
518 static struct resource spi_resources[] = {
520 .start = AT91RM9200_BASE_SPI,
521 .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
522 .flags = IORESOURCE_MEM,
525 .start = AT91RM9200_ID_SPI,
526 .end = AT91RM9200_ID_SPI,
527 .flags = IORESOURCE_IRQ,
531 static struct platform_device at91rm9200_spi_device = {
535 .dma_mask = &spi_dmamask,
536 .coherent_dma_mask = 0xffffffff,
538 .resource = spi_resources,
539 .num_resources = ARRAY_SIZE(spi_resources),
542 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
544 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
547 unsigned long cs_pin;
549 at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */
550 at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */
551 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */
553 /* Enable SPI chip-selects */
554 for (i = 0; i < nr_devices; i++) {
555 if (devices[i].controller_data)
556 cs_pin = (unsigned long) devices[i].controller_data;
558 cs_pin = spi_standard_cs[devices[i].chip_select];
560 /* enable chip-select pin */
561 at91_set_gpio_output(cs_pin, 1);
563 /* pass chip-select pin to driver */
564 devices[i].controller_data = (void *) cs_pin;
567 spi_register_board_info(devices, nr_devices);
568 platform_device_register(&at91rm9200_spi_device);
571 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
575 /* --------------------------------------------------------------------
577 * -------------------------------------------------------------------- */
579 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
580 static struct platform_device at91rm9200_rtc_device = {
586 static void __init at91_add_device_rtc(void)
588 platform_device_register(&at91rm9200_rtc_device);
591 static void __init at91_add_device_rtc(void) {}
595 /* --------------------------------------------------------------------
597 * -------------------------------------------------------------------- */
599 #if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
600 static struct platform_device at91rm9200_wdt_device = {
606 static void __init at91_add_device_watchdog(void)
608 platform_device_register(&at91rm9200_wdt_device);
611 static void __init at91_add_device_watchdog(void) {}
615 /* --------------------------------------------------------------------
617 * -------------------------------------------------------------------- */
619 #if defined(CONFIG_LEDS)
623 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
625 /* Enable GPIO to access the LEDs */
626 at91_set_gpio_output(cpu_led, 1);
627 at91_set_gpio_output(timer_led, 1);
629 at91_leds_cpu = cpu_led;
630 at91_leds_timer = timer_led;
633 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
637 /* --------------------------------------------------------------------
639 * -------------------------------------------------------------------- */
641 #if defined(CONFIG_SERIAL_ATMEL)
642 static struct resource dbgu_resources[] = {
644 .start = AT91_VA_BASE_SYS + AT91_DBGU,
645 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
646 .flags = IORESOURCE_MEM,
649 .start = AT91_ID_SYS,
651 .flags = IORESOURCE_IRQ,
655 static struct atmel_uart_data dbgu_data = {
657 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
658 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
661 static struct platform_device at91rm9200_dbgu_device = {
662 .name = "atmel_usart",
665 .platform_data = &dbgu_data,
666 .coherent_dma_mask = 0xffffffff,
668 .resource = dbgu_resources,
669 .num_resources = ARRAY_SIZE(dbgu_resources),
672 static inline void configure_dbgu_pins(void)
674 at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
675 at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
678 static struct resource uart0_resources[] = {
680 .start = AT91RM9200_BASE_US0,
681 .end = AT91RM9200_BASE_US0 + SZ_16K - 1,
682 .flags = IORESOURCE_MEM,
685 .start = AT91RM9200_ID_US0,
686 .end = AT91RM9200_ID_US0,
687 .flags = IORESOURCE_IRQ,
691 static struct atmel_uart_data uart0_data = {
696 static struct platform_device at91rm9200_uart0_device = {
697 .name = "atmel_usart",
700 .platform_data = &uart0_data,
701 .coherent_dma_mask = 0xffffffff,
703 .resource = uart0_resources,
704 .num_resources = ARRAY_SIZE(uart0_resources),
707 static inline void configure_usart0_pins(void)
709 at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
710 at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
711 at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
714 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
715 * We need to drive the pin manually. Default is off (RTS is active low).
717 at91_set_gpio_output(AT91_PIN_PA21, 1);
720 static struct resource uart1_resources[] = {
722 .start = AT91RM9200_BASE_US1,
723 .end = AT91RM9200_BASE_US1 + SZ_16K - 1,
724 .flags = IORESOURCE_MEM,
727 .start = AT91RM9200_ID_US1,
728 .end = AT91RM9200_ID_US1,
729 .flags = IORESOURCE_IRQ,
733 static struct atmel_uart_data uart1_data = {
738 static struct platform_device at91rm9200_uart1_device = {
739 .name = "atmel_usart",
742 .platform_data = &uart1_data,
743 .coherent_dma_mask = 0xffffffff,
745 .resource = uart1_resources,
746 .num_resources = ARRAY_SIZE(uart1_resources),
749 static inline void configure_usart1_pins(void)
751 at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
752 at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
753 at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
754 at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
755 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
756 at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
757 at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
758 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
761 static struct resource uart2_resources[] = {
763 .start = AT91RM9200_BASE_US2,
764 .end = AT91RM9200_BASE_US2 + SZ_16K - 1,
765 .flags = IORESOURCE_MEM,
768 .start = AT91RM9200_ID_US2,
769 .end = AT91RM9200_ID_US2,
770 .flags = IORESOURCE_IRQ,
774 static struct atmel_uart_data uart2_data = {
779 static struct platform_device at91rm9200_uart2_device = {
780 .name = "atmel_usart",
783 .platform_data = &uart2_data,
784 .coherent_dma_mask = 0xffffffff,
786 .resource = uart2_resources,
787 .num_resources = ARRAY_SIZE(uart2_resources),
790 static inline void configure_usart2_pins(void)
792 at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
793 at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
796 static struct resource uart3_resources[] = {
798 .start = AT91RM9200_BASE_US3,
799 .end = AT91RM9200_BASE_US3 + SZ_16K - 1,
800 .flags = IORESOURCE_MEM,
803 .start = AT91RM9200_ID_US3,
804 .end = AT91RM9200_ID_US3,
805 .flags = IORESOURCE_IRQ,
809 static struct atmel_uart_data uart3_data = {
814 static struct platform_device at91rm9200_uart3_device = {
815 .name = "atmel_usart",
818 .platform_data = &uart3_data,
819 .coherent_dma_mask = 0xffffffff,
821 .resource = uart3_resources,
822 .num_resources = ARRAY_SIZE(uart3_resources),
825 static inline void configure_usart3_pins(void)
827 at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
828 at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
831 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
832 struct platform_device *atmel_default_console_device; /* the serial console device */
834 void __init at91_init_serial(struct at91_uart_config *config)
838 /* Fill in list of supported UARTs */
839 for (i = 0; i < config->nr_tty; i++) {
840 switch (config->tty_map[i]) {
842 configure_usart0_pins();
843 at91_uarts[i] = &at91rm9200_uart0_device;
844 at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
847 configure_usart1_pins();
848 at91_uarts[i] = &at91rm9200_uart1_device;
849 at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
852 configure_usart2_pins();
853 at91_uarts[i] = &at91rm9200_uart2_device;
854 at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
857 configure_usart3_pins();
858 at91_uarts[i] = &at91rm9200_uart3_device;
859 at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
862 configure_dbgu_pins();
863 at91_uarts[i] = &at91rm9200_dbgu_device;
864 at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
869 at91_uarts[i]->id = i; /* update ID number to mapped ID */
872 /* Set serial console device */
873 if (config->console_tty < ATMEL_MAX_UART)
874 atmel_default_console_device = at91_uarts[config->console_tty];
875 if (!atmel_default_console_device)
876 printk(KERN_INFO "AT91: No default serial console defined.\n");
879 void __init at91_add_device_serial(void)
883 for (i = 0; i < ATMEL_MAX_UART; i++) {
885 platform_device_register(at91_uarts[i]);
889 void __init at91_init_serial(struct at91_uart_config *config) {}
890 void __init at91_add_device_serial(void) {}
894 /* -------------------------------------------------------------------- */
897 * These devices are always present and don't need any board-specific
900 static int __init at91_add_standard_devices(void)
902 at91_add_device_rtc();
903 at91_add_device_watchdog();
907 arch_initcall(at91_add_standard_devices);