git.oblomov.eu Git - linux-2.6/blob - drivers/staging/rt3070/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include        "../rt_config.h"
  41 #include        "../firmware.h"
  42
  43 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  44 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  45                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  46                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  47                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  48                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  49                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  50                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  51                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  52
  53 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  54
  55 const unsigned short ccitt_16Table[] = {
  56         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  57         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  58         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  59         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  60         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  61         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  62         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  63         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  64         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  65         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  66         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  67         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  68         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  69         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  70         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  71         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  72         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  73         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  74         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  75         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  76         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  77         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  78         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  79         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  80         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  81         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  82         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  83         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  84         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  85         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  86         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  87         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  88 };
  89 #define ByteCRC16(v, crc) \
  90         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
  91
  92 unsigned char BitReverse(unsigned char x)
  93 {
  94         int i;
  95         unsigned char Temp=0;
  96         for(i=0; ; i++)
  97         {
  98                 if(x & 0x80)    Temp |= 0x80;
  99                 if(i==7)                break;
 100                 x       <<= 1;
 101                 Temp >>= 1;
 102         }
 103         return Temp;
 104 }
 105
 106 //
 107 // BBP register initialization set
 108 //
 109 REG_PAIR   BBPRegTable[] = {
 110         {BBP_R65,               0x2C},          // fix rssi issue
 111         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
 112         {BBP_R69,               0x12},
 113         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 114         {BBP_R73,               0x10},
 115         {BBP_R81,               0x37},
 116         {BBP_R82,               0x62},
 117         {BBP_R83,               0x6A},
 118         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 119         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 120         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 121         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 122         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 123         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 124 };
 125 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 126
 127 //
 128 // RF register initialization set
 129 //
 130 #ifdef RT30xx
 131 REG_PAIR   RT30xx_RFRegTable[] = {
 132         {RF_R04,          0x40},
 133         {RF_R05,          0x03},
 134         {RF_R06,          0x02},
 135         {RF_R07,          0x70},
 136         {RF_R09,          0x0F},
 137         {RF_R10,          0x41},
 138         {RF_R11,          0x21},
 139         {RF_R12,          0x7B},
 140         {RF_R14,          0x90},
 141         {RF_R15,          0x58},
 142         {RF_R16,          0xB3},
 143         {RF_R17,          0x92},
 144         {RF_R18,          0x2C},
 145         {RF_R19,          0x02},
 146         {RF_R20,          0xBA},
 147         {RF_R21,          0xDB},
 148         {RF_R24,          0x16},
 149         {RF_R25,          0x01},
 150         {RF_R29,          0x1F},
 151 };
 152 #define NUM_RF_REG_PARMS        (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
 153 #endif // RT30xx //
 154
 155 //
 156 // ASIC register initialization sets
 157 //
 158
 159 RTMP_REG_PAIR   MACRegTable[] = {
 160 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 161         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 162         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 163 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 164         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 165         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 166 #else
 167     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 168 #endif // HW_BEACON_OFFSET //
 169
 170         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 171         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 172         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 173         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 174         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 175         //{TX_SW_CFG0,          0x40a06}, // Gary,2006-08-23
 176         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 177         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 178         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 179         {TX_TIMEOUT_CFG,        0x000a2090},
 180         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 181         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 182
 183 //#ifdef CONFIG_STA_SUPPORT
 184 //      {WMM_AIFSN_CFG,         0x00002273},
 185 //      {WMM_CWMIN_CFG,         0x00002344},
 186 //      {WMM_CWMAX_CFG,         0x000034aa},
 187 //#endif // CONFIG_STA_SUPPORT //
 188 #ifdef INF_AMAZON_SE
 189         {PBF_MAX_PCNT,                  0x1F3F6F6F},    //iverson modify for usb issue, 2008/09/19
 190                                                                                         // 6F + 6F < total page count FE
 191                                                                                         // so that RX doesn't occupy TX's buffer space when WMM congestion.
 192 #else
 193         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 194 #endif // INF_AMAZON_SE //
 195         //{TX_RTY_CFG,                  0x6bb80408},    // Jan, 2006/11/16
 196         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 197         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 198         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 199         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 200 //PS packets use Tx1Q (for HCCA) when dequeue from PS unicast queue (WiFi WPA2 MA9_DT1 for Marvell B STA)
 201 #ifdef RT2870
 202 #ifdef CONFIG_STA_SUPPORT
 203         {PBF_CFG,                               0xf40006},              // Only enable Queue 2
 204 #endif // CONFIG_STA_SUPPORT //
 205         {MM40_PROT_CFG,                 0x3F44084},             // Initial Auto_Responder, because QA will turn off Auto-Responder
 206         {WPDMA_GLO_CFG,                 0x00000030},
 207 #endif // RT2870 //
 208         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 209         {GF40_PROT_CFG,                 0x03F44084},
 210         {MM20_PROT_CFG,                 0x01744004},
 211         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 212         {TX_RTS_CFG,                    0x00092b20},
 213 //#ifdef WIFI_TEST
 214         {EXP_ACK_TIME,                  0x002400ca},    // default value
 215 //#else
 216 //      {EXP_ACK_TIME,                  0x005400ca},    // suggested by Gray @ 20070323 for 11n intel-sta throughput
 217 //#endif // end - WIFI_TEST //
 218         {TXOP_HLDR_ET,                  0x00000002},
 219
 220         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 221                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 222                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 223                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 224         {XIFS_TIME_CFG,                 0x33a41010},
 225         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 226 };
 227
 228
 229 #ifdef CONFIG_STA_SUPPORT
 230 RTMP_REG_PAIR   STAMACRegTable[] =      {
 231         {WMM_AIFSN_CFG,         0x00002273},
 232         {WMM_CWMIN_CFG, 0x00002344},
 233         {WMM_CWMAX_CFG, 0x000034aa},
 234 };
 235 #endif // CONFIG_STA_SUPPORT //
 236
 237 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 238 #ifdef CONFIG_STA_SUPPORT
 239 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 240 #endif // CONFIG_STA_SUPPORT //
 241
 242 #ifdef RT2870
 243 //
 244 // RT2870 Firmware Spec only used 1 oct for version expression
 245 //
 246 #define FIRMWARE_MINOR_VERSION  7
 247
 248 #endif // RT2870 //
 249
 250 // New 8k byte firmware size for RT3071/RT3072
 251 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 252 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 253 #define FIRMWARE_MAJOR_VERSION  0
 254
 255 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 256 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 257
 258
 259
 260 /*
 261         ========================================================================
 262
 263         Routine Description:
 264                 Allocate RTMP_ADAPTER data block and do some initialization
 265
 266         Arguments:
 267                 Adapter         Pointer to our adapter
 268
 269         Return Value:
 270                 NDIS_STATUS_SUCCESS
 271                 NDIS_STATUS_FAILURE
 272
 273         IRQL = PASSIVE_LEVEL
 274
 275         Note:
 276
 277         ========================================================================
 278 */
 279 NDIS_STATUS     RTMPAllocAdapterBlock(
 280         IN  PVOID       handle,
 281         OUT     PRTMP_ADAPTER   *ppAdapter)
 282 {
 283         PRTMP_ADAPTER   pAd;
 284         NDIS_STATUS             Status;
 285         INT                     index;
 286         UCHAR                   *pBeaconBuf = NULL;
 287
 288         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 289
 290         *ppAdapter = NULL;
 291
 292         do
 293         {
 294                 // Allocate RTMP_ADAPTER memory block
 295                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 296                 if (pBeaconBuf == NULL)
 297                 {
 298                         Status = NDIS_STATUS_FAILURE;
 299                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 300                         break;
 301                 }
 302
 303                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 304                 if (Status != NDIS_STATUS_SUCCESS)
 305                 {
 306                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 307                         break;
 308                 }
 309                 pAd->BeaconBuf = pBeaconBuf;
 310                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 311
 312
 313                 // Init spin locks
 314                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 315
 316                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 317                 {
 318                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 319                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 320                         pAd->DeQueueRunning[index] = FALSE;
 321                 }
 322
 323                 NdisAllocateSpinLock(&pAd->irq_lock);
 324
 325         } while (FALSE);
 326
 327         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 328                 kfree(pBeaconBuf);
 329
 330         *ppAdapter = pAd;
 331
 332         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 333         return Status;
 334 }
 335
 336 /*
 337         ========================================================================
 338
 339         Routine Description:
 340                 Read initial Tx power per MCS and BW from EEPROM
 341
 342         Arguments:
 343                 Adapter                                         Pointer to our adapter
 344
 345         Return Value:
 346                 None
 347
 348         IRQL = PASSIVE_LEVEL
 349
 350         Note:
 351
 352         ========================================================================
 353 */
 354 VOID    RTMPReadTxPwrPerRate(
 355         IN      PRTMP_ADAPTER   pAd)
 356 {
 357         ULONG           data, Adata, Gdata;
 358         USHORT          i, value, value2;
 359         INT                     Apwrdelta, Gpwrdelta;
 360         UCHAR           t1,t2,t3,t4;
 361         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 362
 363         //
 364         // Get power delta for 20MHz and 40MHz.
 365         //
 366         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 367         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 368         Apwrdelta = 0;
 369         Gpwrdelta = 0;
 370
 371         if ((value2 & 0xff) != 0xff)
 372         {
 373                 if ((value2 & 0x80))
 374                         Gpwrdelta = (value2&0xf);
 375
 376                 if ((value2 & 0x40))
 377                         bGpwrdeltaMinus = FALSE;
 378                 else
 379                         bGpwrdeltaMinus = TRUE;
 380         }
 381         if ((value2 & 0xff00) != 0xff00)
 382         {
 383                 if ((value2 & 0x8000))
 384                         Apwrdelta = ((value2&0xf00)>>8);
 385
 386                 if ((value2 & 0x4000))
 387                         bApwrdeltaMinus = FALSE;
 388                 else
 389                         bApwrdeltaMinus = TRUE;
 390         }
 391         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 392
 393         //
 394         // Get Txpower per MCS for 20MHz in 2.4G.
 395         //
 396         for (i=0; i<5; i++)
 397         {
 398                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 399                 data = value;
 400                 if (bApwrdeltaMinus == FALSE)
 401                 {
 402                         t1 = (value&0xf)+(Apwrdelta);
 403                         if (t1 > 0xf)
 404                                 t1 = 0xf;
 405                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 406                         if (t2 > 0xf)
 407                                 t2 = 0xf;
 408                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 409                         if (t3 > 0xf)
 410                                 t3 = 0xf;
 411                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 412                         if (t4 > 0xf)
 413                                 t4 = 0xf;
 414                 }
 415                 else
 416                 {
 417                         if ((value&0xf) > Apwrdelta)
 418                                 t1 = (value&0xf)-(Apwrdelta);
 419                         else
 420                                 t1 = 0;
 421                         if (((value&0xf0)>>4) > Apwrdelta)
 422                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 423                         else
 424                                 t2 = 0;
 425                         if (((value&0xf00)>>8) > Apwrdelta)
 426                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 427                         else
 428                                 t3 = 0;
 429                         if (((value&0xf000)>>12) > Apwrdelta)
 430                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 431                         else
 432                                 t4 = 0;
 433                 }
 434                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 435                 if (bGpwrdeltaMinus == FALSE)
 436                 {
 437                         t1 = (value&0xf)+(Gpwrdelta);
 438                         if (t1 > 0xf)
 439                                 t1 = 0xf;
 440                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 441                         if (t2 > 0xf)
 442                                 t2 = 0xf;
 443                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 444                         if (t3 > 0xf)
 445                                 t3 = 0xf;
 446                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 447                         if (t4 > 0xf)
 448                                 t4 = 0xf;
 449                 }
 450                 else
 451                 {
 452                         if ((value&0xf) > Gpwrdelta)
 453                                 t1 = (value&0xf)-(Gpwrdelta);
 454                         else
 455                                 t1 = 0;
 456                         if (((value&0xf0)>>4) > Gpwrdelta)
 457                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 458                         else
 459                                 t2 = 0;
 460                         if (((value&0xf00)>>8) > Gpwrdelta)
 461                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 462                         else
 463                                 t3 = 0;
 464                         if (((value&0xf000)>>12) > Gpwrdelta)
 465                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 466                         else
 467                                 t4 = 0;
 468                 }
 469                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 470
 471                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 472                 if (bApwrdeltaMinus == FALSE)
 473                 {
 474                         t1 = (value&0xf)+(Apwrdelta);
 475                         if (t1 > 0xf)
 476                                 t1 = 0xf;
 477                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 478                         if (t2 > 0xf)
 479                                 t2 = 0xf;
 480                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 481                         if (t3 > 0xf)
 482                                 t3 = 0xf;
 483                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 484                         if (t4 > 0xf)
 485                                 t4 = 0xf;
 486                 }
 487                 else
 488                 {
 489                         if ((value&0xf) > Apwrdelta)
 490                                 t1 = (value&0xf)-(Apwrdelta);
 491                         else
 492                                 t1 = 0;
 493                         if (((value&0xf0)>>4) > Apwrdelta)
 494                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 495                         else
 496                                 t2 = 0;
 497                         if (((value&0xf00)>>8) > Apwrdelta)
 498                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 499                         else
 500                                 t3 = 0;
 501                         if (((value&0xf000)>>12) > Apwrdelta)
 502                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 503                         else
 504                                 t4 = 0;
 505                 }
 506                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 507                 if (bGpwrdeltaMinus == FALSE)
 508                 {
 509                         t1 = (value&0xf)+(Gpwrdelta);
 510                         if (t1 > 0xf)
 511                                 t1 = 0xf;
 512                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 513                         if (t2 > 0xf)
 514                                 t2 = 0xf;
 515                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 516                         if (t3 > 0xf)
 517                                 t3 = 0xf;
 518                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 519                         if (t4 > 0xf)
 520                                 t4 = 0xf;
 521                 }
 522                 else
 523                 {
 524                         if ((value&0xf) > Gpwrdelta)
 525                                 t1 = (value&0xf)-(Gpwrdelta);
 526                         else
 527                                 t1 = 0;
 528                         if (((value&0xf0)>>4) > Gpwrdelta)
 529                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 530                         else
 531                                 t2 = 0;
 532                         if (((value&0xf00)>>8) > Gpwrdelta)
 533                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 534                         else
 535                                 t3 = 0;
 536                         if (((value&0xf000)>>12) > Gpwrdelta)
 537                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 538                         else
 539                                 t4 = 0;
 540                 }
 541                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 542                 data |= (value<<16);
 543
 544                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 545                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 546
 547                 if (data != 0xffffffff)
 548                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 549                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 550         }
 551
 552         //
 553         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 554         //
 555         bValid = TRUE;
 556         for (i=0; i<6; i++)
 557         {
 558                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 559                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 560                 {
 561                         bValid = FALSE;
 562                         break;
 563                 }
 564         }
 565
 566         //
 567         // Get Txpower per MCS for 40MHz in 2.4G.
 568         //
 569         if (bValid)
 570         {
 571                 for (i=0; i<4; i++)
 572                 {
 573                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 574                         if (bGpwrdeltaMinus == FALSE)
 575                         {
 576                                 t1 = (value&0xf)+(Gpwrdelta);
 577                                 if (t1 > 0xf)
 578                                         t1 = 0xf;
 579                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 580                                 if (t2 > 0xf)
 581                                         t2 = 0xf;
 582                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 583                                 if (t3 > 0xf)
 584                                         t3 = 0xf;
 585                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 586                                 if (t4 > 0xf)
 587                                         t4 = 0xf;
 588                         }
 589                         else
 590                         {
 591                                 if ((value&0xf) > Gpwrdelta)
 592                                         t1 = (value&0xf)-(Gpwrdelta);
 593                                 else
 594                                         t1 = 0;
 595                                 if (((value&0xf0)>>4) > Gpwrdelta)
 596                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 597                                 else
 598                                         t2 = 0;
 599                                 if (((value&0xf00)>>8) > Gpwrdelta)
 600                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 601                                 else
 602                                         t3 = 0;
 603                                 if (((value&0xf000)>>12) > Gpwrdelta)
 604                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 605                                 else
 606                                         t4 = 0;
 607                         }
 608                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 609
 610                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 611                         if (bGpwrdeltaMinus == FALSE)
 612                         {
 613                                 t1 = (value&0xf)+(Gpwrdelta);
 614                                 if (t1 > 0xf)
 615                                         t1 = 0xf;
 616                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 617                                 if (t2 > 0xf)
 618                                         t2 = 0xf;
 619                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 620                                 if (t3 > 0xf)
 621                                         t3 = 0xf;
 622                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 623                                 if (t4 > 0xf)
 624                                         t4 = 0xf;
 625                         }
 626                         else
 627                         {
 628                                 if ((value&0xf) > Gpwrdelta)
 629                                         t1 = (value&0xf)-(Gpwrdelta);
 630                                 else
 631                                         t1 = 0;
 632                                 if (((value&0xf0)>>4) > Gpwrdelta)
 633                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 634                                 else
 635                                         t2 = 0;
 636                                 if (((value&0xf00)>>8) > Gpwrdelta)
 637                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 638                                 else
 639                                         t3 = 0;
 640                                 if (((value&0xf000)>>12) > Gpwrdelta)
 641                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 642                                 else
 643                                         t4 = 0;
 644                         }
 645                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 646
 647                         if (i == 0)
 648                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 649                         else
 650                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 651
 652                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 653                 }
 654         }
 655
 656         //
 657         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 658         //
 659         bValid = TRUE;
 660         for (i=0; i<8; i++)
 661         {
 662                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 663                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 664                 {
 665                         bValid = FALSE;
 666                         break;
 667                 }
 668         }
 669
 670         //
 671         // Get Txpower per MCS for 20MHz in 5G.
 672         //
 673         if (bValid)
 674         {
 675                 for (i=0; i<5; i++)
 676                 {
 677                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 678                         if (bApwrdeltaMinus == FALSE)
 679                         {
 680                                 t1 = (value&0xf)+(Apwrdelta);
 681                                 if (t1 > 0xf)
 682                                         t1 = 0xf;
 683                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 684                                 if (t2 > 0xf)
 685                                         t2 = 0xf;
 686                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 687                                 if (t3 > 0xf)
 688                                         t3 = 0xf;
 689                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 690                                 if (t4 > 0xf)
 691                                         t4 = 0xf;
 692                         }
 693                         else
 694                         {
 695                                 if ((value&0xf) > Apwrdelta)
 696                                         t1 = (value&0xf)-(Apwrdelta);
 697                                 else
 698                                         t1 = 0;
 699                                 if (((value&0xf0)>>4) > Apwrdelta)
 700                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 701                                 else
 702                                         t2 = 0;
 703                                 if (((value&0xf00)>>8) > Apwrdelta)
 704                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 705                                 else
 706                                         t3 = 0;
 707                                 if (((value&0xf000)>>12) > Apwrdelta)
 708                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 709                                 else
 710                                         t4 = 0;
 711                         }
 712                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 713
 714                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 715                         if (bApwrdeltaMinus == FALSE)
 716                         {
 717                                 t1 = (value&0xf)+(Apwrdelta);
 718                                 if (t1 > 0xf)
 719                                         t1 = 0xf;
 720                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 721                                 if (t2 > 0xf)
 722                                         t2 = 0xf;
 723                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 724                                 if (t3 > 0xf)
 725                                         t3 = 0xf;
 726                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 727                                 if (t4 > 0xf)
 728                                         t4 = 0xf;
 729                         }
 730                         else
 731                         {
 732                                 if ((value&0xf) > Apwrdelta)
 733                                         t1 = (value&0xf)-(Apwrdelta);
 734                                 else
 735                                         t1 = 0;
 736                                 if (((value&0xf0)>>4) > Apwrdelta)
 737                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 738                                 else
 739                                         t2 = 0;
 740                                 if (((value&0xf00)>>8) > Apwrdelta)
 741                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 742                                 else
 743                                         t3 = 0;
 744                                 if (((value&0xf000)>>12) > Apwrdelta)
 745                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 746                                 else
 747                                         t4 = 0;
 748                         }
 749                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 750
 751                         if (i == 0)
 752                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 753                         else
 754                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 755
 756                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 757                 }
 758         }
 759
 760         //
 761         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 762         //
 763         bValid = TRUE;
 764         for (i=0; i<6; i++)
 765         {
 766                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 767                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 768                 {
 769                         bValid = FALSE;
 770                         break;
 771                 }
 772         }
 773
 774         //
 775         // Get Txpower per MCS for 40MHz in 5G.
 776         //
 777         if (bValid)
 778         {
 779                 for (i=0; i<4; i++)
 780                 {
 781                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 782                         if (bApwrdeltaMinus == FALSE)
 783                         {
 784                                 t1 = (value&0xf)+(Apwrdelta);
 785                                 if (t1 > 0xf)
 786                                         t1 = 0xf;
 787                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 788                                 if (t2 > 0xf)
 789                                         t2 = 0xf;
 790                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 791                                 if (t3 > 0xf)
 792                                         t3 = 0xf;
 793                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 794                                 if (t4 > 0xf)
 795                                         t4 = 0xf;
 796                         }
 797                         else
 798                         {
 799                                 if ((value&0xf) > Apwrdelta)
 800                                         t1 = (value&0xf)-(Apwrdelta);
 801                                 else
 802                                         t1 = 0;
 803                                 if (((value&0xf0)>>4) > Apwrdelta)
 804                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 805                                 else
 806                                         t2 = 0;
 807                                 if (((value&0xf00)>>8) > Apwrdelta)
 808                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 809                                 else
 810                                         t3 = 0;
 811                                 if (((value&0xf000)>>12) > Apwrdelta)
 812                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 813                                 else
 814                                         t4 = 0;
 815                         }
 816                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 817
 818                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 819                         if (bApwrdeltaMinus == FALSE)
 820                         {
 821                                 t1 = (value&0xf)+(Apwrdelta);
 822                                 if (t1 > 0xf)
 823                                         t1 = 0xf;
 824                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 825                                 if (t2 > 0xf)
 826                                         t2 = 0xf;
 827                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 828                                 if (t3 > 0xf)
 829                                         t3 = 0xf;
 830                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 831                                 if (t4 > 0xf)
 832                                         t4 = 0xf;
 833                         }
 834                         else
 835                         {
 836                                 if ((value&0xf) > Apwrdelta)
 837                                         t1 = (value&0xf)-(Apwrdelta);
 838                                 else
 839                                         t1 = 0;
 840                                 if (((value&0xf0)>>4) > Apwrdelta)
 841                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 842                                 else
 843                                         t2 = 0;
 844                                 if (((value&0xf00)>>8) > Apwrdelta)
 845                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 846                                 else
 847                                         t3 = 0;
 848                                 if (((value&0xf000)>>12) > Apwrdelta)
 849                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 850                                 else
 851                                         t4 = 0;
 852                         }
 853                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 854
 855                         if (i == 0)
 856                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 857                         else
 858                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 859
 860                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 861                 }
 862         }
 863 }
 864
 865
 866 /*
 867         ========================================================================
 868
 869         Routine Description:
 870                 Read initial channel power parameters from EEPROM
 871
 872         Arguments:
 873                 Adapter                                         Pointer to our adapter
 874
 875         Return Value:
 876                 None
 877
 878         IRQL = PASSIVE_LEVEL
 879
 880         Note:
 881
 882         ========================================================================
 883 */
 884 VOID    RTMPReadChannelPwr(
 885         IN      PRTMP_ADAPTER   pAd)
 886 {
 887         UCHAR                           i, choffset;
 888         EEPROM_TX_PWR_STRUC         Power;
 889         EEPROM_TX_PWR_STRUC         Power2;
 890
 891         // Read Tx power value for all channels
 892         // Value from 1 - 0x7f. Default value is 24.
 893         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 894         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 895
 896         // 0. 11b/g, ch1 - ch 14
 897         for (i = 0; i < 7; i++)
 898         {
 899 //              Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2);
 900 //              Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2);
 901                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 902                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 903                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 904                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 905
 906                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 907                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 908                 else
 909                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 910
 911                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 912                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 913                 else
 914                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 915
 916                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 917                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 918                 else
 919                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 920
 921                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 922                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 923                 else
 924                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 925         }
 926
 927         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 928         // 1.1 Fill up channel
 929         choffset = 14;
 930         for (i = 0; i < 4; i++)
 931         {
 932                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 933                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 934                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 935
 936                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 937                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 938                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 939
 940                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 941                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 942                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 943         }
 944
 945         // 1.2 Fill up power
 946         for (i = 0; i < 6; i++)
 947         {
 948 //              Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2);
 949 //              Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2);
 950                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 951                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 952
 953                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 954                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 955
 956                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 957                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 958
 959                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 960                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 961
 962                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 963                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 964         }
 965
 966         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 967         // 2.1 Fill up channel
 968         choffset = 14 + 12;
 969         for (i = 0; i < 5; i++)
 970         {
 971                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 972                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 973                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 974
 975                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 976                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 977                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 978
 979                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 980                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 981                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 982         }
 983         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 984         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 985         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 986
 987         // 2.2 Fill up power
 988         for (i = 0; i < 8; i++)
 989         {
 990 //              Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
 991 //              Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
 992                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 993                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 994
 995                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 996                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 997
 998                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 999                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1000
1001                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1002                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1003
1004                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1005                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1006         }
1007
1008         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
1009         // 3.1 Fill up channel
1010         choffset = 14 + 12 + 16;
1011         for (i = 0; i < 2; i++)
1012         {
1013                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
1014                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
1015                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
1016
1017                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
1018                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
1019                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
1020
1021                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
1022                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
1023                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
1024         }
1025         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
1026         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
1027         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
1028
1029         // 3.2 Fill up power
1030         for (i = 0; i < 4; i++)
1031         {
1032 //              Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
1033 //              Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
1034                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1035                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1036
1037                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1038                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1039
1040                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1041                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1042
1043                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1044                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1045
1046                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1047                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1048         }
1049
1050         // 4. Print and Debug
1051         choffset = 14 + 12 + 16 + 7;
1052
1053 }
1054
1055 /*
1056         ========================================================================
1057
1058         Routine Description:
1059                 Read the following from the registry
1060                 1. All the parameters
1061                 2. NetworkAddres
1062
1063         Arguments:
1064                 Adapter                                         Pointer to our adapter
1065                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1066
1067         Return Value:
1068                 NDIS_STATUS_SUCCESS
1069                 NDIS_STATUS_FAILURE
1070                 NDIS_STATUS_RESOURCES
1071
1072         IRQL = PASSIVE_LEVEL
1073
1074         Note:
1075
1076         ========================================================================
1077 */
1078 NDIS_STATUS     NICReadRegParameters(
1079         IN      PRTMP_ADAPTER           pAd,
1080         IN      NDIS_HANDLE                     WrapperConfigurationContext
1081         )
1082 {
1083         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1084         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1085         return Status;
1086 }
1087
1088
1089 #ifdef RT30xx
1090 /*
1091         ========================================================================
1092
1093         Routine Description:
1094                 For RF filter calibration purpose
1095
1096         Arguments:
1097                 pAd                          Pointer to our adapter
1098
1099         Return Value:
1100                 None
1101
1102         IRQL = PASSIVE_LEVEL
1103
1104         ========================================================================
1105 */
1106 VOID RTMPFilterCalibration(
1107         IN PRTMP_ADAPTER pAd)
1108 {
1109         UCHAR   R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
1110         UINT    loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1111         UCHAR   RF_R24_Value = 0;
1112
1113         // Give bbp filter initial value
1114         pAd->Mlme.CaliBW20RfR24 = 0x1F;
1115         pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
1116
1117         do
1118         {
1119                 if (loop == 1)  //BandWidth = 40 MHz
1120                 {
1121                         // Write 0x27 to RF_R24 to program filter
1122                         RF_R24_Value = 0x27;
1123                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1124                         if (IS_RT3090(pAd))
1125                                 FilterTarget = 0x15;
1126                         else
1127                                 FilterTarget = 0x19;
1128
1129                         // when calibrate BW40, BBP mask must set to BW40.
1130                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1131                         BBPValue&= (~0x18);
1132                         BBPValue|= (0x10);
1133                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1134
1135                         // set to BW40
1136                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1137                         value |= 0x20;
1138                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1139                 }
1140                 else                    //BandWidth = 20 MHz
1141                 {
1142                         // Write 0x07 to RF_R24 to program filter
1143                         RF_R24_Value = 0x07;
1144                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1145                         if (IS_RT3090(pAd))
1146                                 FilterTarget = 0x13;
1147                         else
1148                                 FilterTarget = 0x16;
1149
1150                         // set to BW20
1151                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1152                         value &= (~0x20);
1153                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1154                 }
1155
1156                 // Write 0x01 to RF_R22 to enable baseband loopback mode
1157                 RT30xxReadRFRegister(pAd, RF_R22, &value);
1158                 value |= 0x01;
1159                 RT30xxWriteRFRegister(pAd, RF_R22, value);
1160
1161                 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1162                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1163
1164                 do
1165                 {
1166                         // Write 0x90 to BBP_R25 to transmit test tone
1167                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1168
1169                         RTMPusecDelay(1000);
1170                         // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1171                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1172                         R55x = value & 0xFF;
1173
1174                 } while ((ReTry++ < 100) && (R55x == 0));
1175
1176                 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1177                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
1178
1179                 while(TRUE)
1180                 {
1181                         // Write 0x90 to BBP_R25 to transmit test tone
1182                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1183
1184                         //We need to wait for calibration
1185                         RTMPusecDelay(1000);
1186                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1187                         value &= 0xFF;
1188                         if ((R55x - value) < FilterTarget)
1189                         {
1190                                 RF_R24_Value ++;
1191                         }
1192                         else if ((R55x - value) == FilterTarget)
1193                         {
1194                                 RF_R24_Value ++;
1195                                 count ++;
1196                         }
1197                         else
1198                         {
1199                                 break;
1200                         }
1201
1202                         // prevent infinite loop cause driver hang.
1203                         if (loopcnt++ > 100)
1204                         {
1205                                 DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1206                                 break;
1207                         }
1208
1209                         // Write RF_R24 to program filter
1210                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1211                 }
1212
1213                 if (count > 0)
1214                 {
1215                         RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1216                 }
1217
1218                 // Store for future usage
1219                 if (loopcnt < 100)
1220                 {
1221                         if (loop++ == 0)
1222                         {
1223                                 //BandWidth = 20 MHz
1224                                 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1225                         }
1226                         else
1227                         {
1228                                 //BandWidth = 40 MHz
1229                                 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1230                                 break;
1231                         }
1232                 }
1233                 else
1234                         break;
1235
1236                 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1237
1238                 // reset count
1239                 count = 0;
1240         } while(TRUE);
1241
1242         //
1243         // Set back to initial state
1244         //
1245         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1246
1247         RT30xxReadRFRegister(pAd, RF_R22, &value);
1248         value &= ~(0x01);
1249         RT30xxWriteRFRegister(pAd, RF_R22, value);
1250
1251         // set BBP back to BW20
1252         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1253         BBPValue&= (~0x18);
1254         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1255
1256         DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1257 }
1258 #endif // RT30xx //
1259
1260
1261 #ifdef RT3070
1262 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1263 {
1264         INT i;
1265         // Driver must read EEPROM to get RfIcType before initial RF registers
1266         // Initialize RF register to default value
1267         if (IS_RT3070(pAd) || IS_RT3071(pAd))
1268         {
1269                 // Init RF calibration
1270                 // Driver should toggle RF R30 bit7 before init RF registers
1271                 UINT32 RfReg = 0;
1272                 UINT32 data;
1273
1274                 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1275                 RfReg |= 0x80;
1276                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1277                 RTMPusecDelay(1000);
1278                 RfReg &= 0x7F;
1279                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1280
1281                 // Initialize RF register to default value
1282                 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1283                 {
1284                         RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1285                 }
1286
1287                 // add by johnli
1288                 if (IS_RT3070(pAd))
1289                 {
1290                         //  Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate
1291                         RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1292                         data = ((data & 0xF0FFFFFF) | 0x0D000000);
1293                         RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1294                 }
1295                 else if (IS_RT3071(pAd))
1296                 {
1297                         // Driver should set RF R6 bit6 on before init RF registers
1298                         RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
1299                         RfReg |= 0x40;
1300                         RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
1301
1302                         // init R31
1303                         RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
1304
1305                         // RT3071 version E has fixed this issue
1306                         if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
1307                         {
1308                                 // patch tx EVM issue temporarily
1309                                 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1310                                 data = ((data & 0xE0FFFFFF) | 0x0D000000);
1311                                 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1312                         }
1313                         else
1314                         {
1315                                 RTMP_IO_READ32(pAd, LDO_CFG0, &data);
1316                                 data = ((data & 0xE0FFFFFF) | 0x01000000);
1317                                 RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
1318                         }
1319
1320                         // patch LNA_PE_G1 failed issue
1321                         RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
1322                         data &= ~(0x20);
1323                         RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
1324                 }
1325
1326                 //For RF filter Calibration
1327                 RTMPFilterCalibration(pAd);
1328
1329                 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
1330                 if ((pAd->MACVersion & 0xffff) < 0x0211)
1331                         RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
1332
1333                 // set led open drain enable
1334                 RTUSBReadMACRegister(pAd, OPT_14, &data);
1335                 data |= 0x01;
1336                 RTUSBWriteMACRegister(pAd, OPT_14, data);
1337
1338                 if (IS_RT3071(pAd))
1339                 {
1340                         // add by johnli, RF power sequence setup, load RF normal operation-mode setup
1341                         RT30xxLoadRFNormalModeSetup(pAd);
1342                 }
1343         }
1344
1345 }
1346 #endif // RT3070 //
1347
1348
1349 /*
1350         ========================================================================
1351
1352         Routine Description:
1353                 Read initial parameters from EEPROM
1354
1355         Arguments:
1356                 Adapter                                         Pointer to our adapter
1357
1358         Return Value:
1359                 None
1360
1361         IRQL = PASSIVE_LEVEL
1362
1363         Note:
1364
1365         ========================================================================
1366 */
1367 VOID    NICReadEEPROMParameters(
1368         IN      PRTMP_ADAPTER   pAd,
1369         IN      PUCHAR                  mac_addr)
1370 {
1371         UINT32                  data = 0;
1372         USHORT                  i, value, value2;
1373         UCHAR                   TmpPhy;
1374         EEPROM_TX_PWR_STRUC         Power;
1375         EEPROM_VERSION_STRUC    Version;
1376         EEPROM_ANTENNA_STRUC    Antenna;
1377         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1378
1379         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1380
1381         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1382         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1383         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1384
1385         if((data & 0x30) == 0)
1386                 pAd->EEPROMAddressNum = 6;              // 93C46
1387         else if((data & 0x30) == 0x10)
1388                 pAd->EEPROMAddressNum = 8;     // 93C66
1389         else
1390                 pAd->EEPROMAddressNum = 8;     // 93C86
1391         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1392
1393         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1394         // MAC address registers according to E2PROM setting
1395         if (mac_addr == NULL ||
1396                 strlen(mac_addr) != 17 ||
1397                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1398                 mac_addr[11] != ':' || mac_addr[14] != ':')
1399         {
1400                 USHORT  Addr01,Addr23,Addr45 ;
1401
1402                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1403                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1404                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1405
1406                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1407                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1408                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1409                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1410                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1411                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1412
1413                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1414         }
1415         else
1416         {
1417                 INT             j;
1418                 PUCHAR  macptr;
1419
1420                 macptr = mac_addr;
1421
1422                 for (j=0; j<MAC_ADDR_LEN; j++)
1423                 {
1424                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1425                         macptr=macptr+3;
1426                 }
1427
1428                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1429         }
1430
1431
1432         {
1433                 //more conveninet to test mbssid, so ap's bssid &0xf1
1434                 if (pAd->PermanentAddress[0] == 0xff)
1435                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1436
1437                 //if (pAd->PermanentAddress[5] == 0xff)
1438                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1439
1440                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1441                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1442                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1443                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1444                 if (pAd->bLocalAdminMAC == FALSE)
1445                 {
1446                         MAC_DW0_STRUC csr2;
1447                         MAC_DW1_STRUC csr3;
1448                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1449                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1450                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1451                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1452                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1453                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1454                         csr3.word = 0;
1455                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1456                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1457                         csr3.field.U2MeMask = 0xff;
1458                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1459                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1460                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1461                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1462                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1463                 }
1464         }
1465
1466         // if not return early. cause fail at emulation.
1467         // Init the channel number for TX channel power
1468         RTMPReadChannelPwr(pAd);
1469
1470         // if E2PROM version mismatch with driver's expectation, then skip
1471         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1472         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1473         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1474         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1475
1476         if (Version.field.Version > VALID_EEPROM_VERSION)
1477         {
1478                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1479                 /*pAd->SystemErrorBitmap |= 0x00000001;
1480
1481                 // hard-code default value when no proper E2PROM installed
1482                 pAd->bAutoTxAgcA = FALSE;
1483                 pAd->bAutoTxAgcG = FALSE;
1484
1485                 // Default the channel power
1486                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1487                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1488
1489                 // Default the channel power
1490                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1491                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1492
1493                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1494                         pAd->EEPROMDefaultValue[i] = 0xffff;
1495                 return;  */
1496         }
1497
1498         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1499         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1500         pAd->EEPROMDefaultValue[0] = value;
1501
1502         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1503         pAd->EEPROMDefaultValue[1] = value;
1504
1505         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1506         pAd->EEPROMDefaultValue[2] = value;
1507
1508         for(i = 0; i < 8; i++)
1509         {
1510                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1511                 pAd->EEPROMDefaultValue[i+3] = value;
1512         }
1513
1514         // We have to parse NIC configuration 0 at here.
1515         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1516         // Therefore, we have to read TxAutoAgc control beforehand.
1517         // Read Tx AGC control bit
1518         Antenna.word = pAd->EEPROMDefaultValue[0];
1519         if (Antenna.word == 0xFFFF)
1520         {
1521 #ifdef RT30xx
1522                 if(IS_RT3090(pAd))
1523                 {
1524                         Antenna.word = 0;
1525                         Antenna.field.RfIcType = RFIC_3020;
1526                         Antenna.field.TxPath = 1;
1527                         Antenna.field.RxPath = 1;
1528                 }
1529                 else
1530                 {
1531 #endif // RT30xx //
1532                         Antenna.word = 0;
1533                         Antenna.field.RfIcType = RFIC_2820;
1534                         Antenna.field.TxPath = 1;
1535                         Antenna.field.RxPath = 2;
1536                         DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1537 #ifdef RT30xx
1538                 }
1539 #endif // RT30xx //
1540         }
1541
1542         // Choose the desired Tx&Rx stream.
1543         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1544                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1545
1546         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1547         {
1548                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1549
1550                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1551                         (pAd->CommonCfg.RxStream > 2))
1552                 {
1553                         // only 2 Rx streams for RT2860 series
1554                         pAd->CommonCfg.RxStream = 2;
1555                 }
1556         }
1557
1558         // 3*3
1559         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1560         // yet implement
1561         for(i=0; i<3; i++)
1562         {
1563         }
1564
1565         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1566
1567
1568
1569 #ifdef CONFIG_STA_SUPPORT
1570         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1571         {
1572                 if ((NicConfig2.word & 0x00ff) == 0xff)
1573                 {
1574                         NicConfig2.word &= 0xff00;
1575                 }
1576
1577                 if ((NicConfig2.word >> 8) == 0xff)
1578                 {
1579                         NicConfig2.word &= 0x00ff;
1580                 }
1581         }
1582 #endif // CONFIG_STA_SUPPORT //
1583
1584         if (NicConfig2.field.DynamicTxAgcControl == 1)
1585                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1586         else
1587                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1588
1589         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1590
1591         // Save the antenna for future use
1592         pAd->Antenna.word = Antenna.word;
1593
1594         //
1595         // Reset PhyMode if we don't support 802.11a
1596         // Only RFIC_2850 & RFIC_2750 support 802.11a
1597         //
1598         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1599         {
1600                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1601                         (pAd->CommonCfg.PhyMode == PHY_11A))
1602                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1603 #ifdef DOT11_N_SUPPORT
1604                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1605                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1606                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1607                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1608                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1609 #endif // DOT11_N_SUPPORT //
1610         }
1611
1612         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1613         // 0. 11b/g
1614         {
1615                 /* these are tempature reference value (0x00 ~ 0xFE)
1616                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1617                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1618                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1619                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1620                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1621                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1622                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1623                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1624                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1625                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1626                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1627                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1628                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1629                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1630                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1631                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1632                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1633                 pAd->TxAgcStepG = Power.field.Byte1;
1634                 pAd->TxAgcCompensateG = 0;
1635                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1636                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1637
1638                 // Disable TxAgc if the based value is not right
1639                 if (pAd->TssiRefG == 0xff)
1640                         pAd->bAutoTxAgcG = FALSE;
1641
1642                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1643                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1644                         pAd->TssiRefG,
1645                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1646                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1647         }
1648         // 1. 11a
1649         {
1650                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1651                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1652                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1653                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1654                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1655                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1656                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1657                 pAd->TssiRefA   = Power.field.Byte0;
1658                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1659                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1660                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1661                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1662                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1663                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1664                 pAd->TxAgcStepA = Power.field.Byte1;
1665                 pAd->TxAgcCompensateA = 0;
1666                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1667                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1668
1669                 // Disable TxAgc if the based value is not right
1670                 if (pAd->TssiRefA == 0xff)
1671                         pAd->bAutoTxAgcA = FALSE;
1672
1673                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1674                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1675                         pAd->TssiRefA,
1676                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1677                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1678         }
1679         pAd->BbpRssiToDbmDelta = 0x0;
1680
1681         // Read frequency offset setting for RF
1682         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1683         if ((value & 0x00FF) != 0x00FF)
1684                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1685         else
1686                 pAd->RfFreqOffset = 0;
1687         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1688
1689         //CountryRegion byte offset (38h)
1690         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1691         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1692
1693         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1694         {
1695                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1696                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1697                 TmpPhy = pAd->CommonCfg.PhyMode;
1698                 pAd->CommonCfg.PhyMode = 0xff;
1699                 RTMPSetPhyMode(pAd, TmpPhy);
1700 #ifdef DOT11_N_SUPPORT
1701                 SetCommonHT(pAd);
1702 #endif // DOT11_N_SUPPORT //
1703         }
1704
1705         //
1706         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1707         // The valid value are (-10 ~ 10)
1708         //
1709         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1710         pAd->BGRssiOffset0 = value & 0x00ff;
1711         pAd->BGRssiOffset1 = (value >> 8);
1712         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1713         pAd->BGRssiOffset2 = value & 0x00ff;
1714         pAd->ALNAGain1 = (value >> 8);
1715         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1716         pAd->BLNAGain = value & 0x00ff;
1717         pAd->ALNAGain0 = (value >> 8);
1718
1719         // Validate 11b/g RSSI_0 offset.
1720         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1721                 pAd->BGRssiOffset0 = 0;
1722
1723         // Validate 11b/g RSSI_1 offset.
1724         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1725                 pAd->BGRssiOffset1 = 0;
1726
1727         // Validate 11b/g RSSI_2 offset.
1728         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1729                 pAd->BGRssiOffset2 = 0;
1730
1731         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1732         pAd->ARssiOffset0 = value & 0x00ff;
1733         pAd->ARssiOffset1 = (value >> 8);
1734         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1735         pAd->ARssiOffset2 = value & 0x00ff;
1736         pAd->ALNAGain2 = (value >> 8);
1737
1738         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1739                 pAd->ALNAGain1 = pAd->ALNAGain0;
1740         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1741                 pAd->ALNAGain2 = pAd->ALNAGain0;
1742
1743         // Validate 11a RSSI_0 offset.
1744         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1745                 pAd->ARssiOffset0 = 0;
1746
1747         // Validate 11a RSSI_1 offset.
1748         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1749                 pAd->ARssiOffset1 = 0;
1750
1751         //Validate 11a RSSI_2 offset.
1752         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1753                 pAd->ARssiOffset2 = 0;
1754
1755         //
1756         // Get LED Setting.
1757         //
1758         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1759         pAd->LedCntl.word = (value&0xff00) >> 8;
1760         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1761         pAd->Led1 = value;
1762         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1763         pAd->Led2 = value;
1764         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1765         pAd->Led3 = value;
1766
1767         RTMPReadTxPwrPerRate(pAd);
1768
1769 #ifdef RT30xx
1770         if (IS_RT30xx(pAd))
1771         {
1772                 eFusePhysicalReadRegisters(pAd, EFUSE_TAG, 2, &value);
1773                 pAd->EFuseTag = (value & 0xff);
1774         }
1775 #endif // RT30xx //
1776
1777         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1778 }
1779
1780 /*
1781         ========================================================================
1782
1783         Routine Description:
1784                 Set default value from EEPROM
1785
1786         Arguments:
1787                 Adapter                                         Pointer to our adapter
1788
1789         Return Value:
1790                 None
1791
1792         IRQL = PASSIVE_LEVEL
1793
1794         Note:
1795
1796         ========================================================================
1797 */
1798 VOID    NICInitAsicFromEEPROM(
1799         IN      PRTMP_ADAPTER   pAd)
1800 {
1801 #ifdef CONFIG_STA_SUPPORT
1802         UINT32                                  data = 0;
1803         UCHAR   BBPR1 = 0;
1804 #endif // CONFIG_STA_SUPPORT //
1805         USHORT                                  i;
1806         EEPROM_ANTENNA_STRUC    Antenna;
1807         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1808         UCHAR   BBPR3 = 0;
1809
1810         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1811         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1812         {
1813                 UCHAR BbpRegIdx, BbpValue;
1814
1815                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1816                 {
1817                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1818                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1819                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1820                 }
1821         }
1822
1823         Antenna.word = pAd->EEPROMDefaultValue[0];
1824         if (Antenna.word == 0xFFFF)
1825         {
1826                 DBGPRINT(RT_DEBUG_ERROR, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1827                 BUG_ON(Antenna.word == 0xFFFF);
1828         }
1829         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1830         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1831
1832         DBGPRINT(RT_DEBUG_WARN, ("pAd->RfIcType = %d, RealRxPath=%d, TxPath = %d\n", pAd->RfIcType, pAd->Mlme.RealRxPath,Antenna.field.TxPath));
1833
1834         // Save the antenna for future use
1835         pAd->Antenna.word = Antenna.word;
1836
1837         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1838
1839
1840 #ifdef CONFIG_STA_SUPPORT
1841         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1842         {
1843                 if ((NicConfig2.word & 0x00ff) == 0xff)
1844                 {
1845                         NicConfig2.word &= 0xff00;
1846                 }
1847
1848                 if ((NicConfig2.word >> 8) == 0xff)
1849                 {
1850                         NicConfig2.word &= 0x00ff;
1851                 }
1852         }
1853 #endif // CONFIG_STA_SUPPORT //
1854
1855         // Save the antenna for future use
1856         pAd->NicConfig2.word = NicConfig2.word;
1857
1858         // set default antenna as main
1859         if (pAd->RfIcType == RFIC_3020)
1860                 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1861
1862         //
1863         // Send LED Setting to MCU.
1864         //
1865         if (pAd->LedCntl.word == 0xFF)
1866         {
1867                 pAd->LedCntl.word = 0x01;
1868                 pAd->Led1 = 0x5555;
1869                 pAd->Led2 = 0x2221;
1870
1871 #ifdef RT2870
1872                 pAd->Led3 = 0x5627;
1873 #endif // RT2870 //
1874         }
1875
1876         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1877         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1878         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1879     pAd->LedIndicatorStregth = 0xFF;
1880     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1881
1882 #ifdef CONFIG_STA_SUPPORT
1883         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1884         {
1885                 // Read Hardware controlled Radio state enable bit
1886                 if (NicConfig2.field.HardwareRadioControl == 1)
1887                 {
1888                         pAd->StaCfg.bHardwareRadio = TRUE;
1889
1890                         // Read GPIO pin2 as Hardware controlled radio state
1891                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1892                         if ((data & 0x04) == 0)
1893                         {
1894                                 pAd->StaCfg.bHwRadio = FALSE;
1895                                 pAd->StaCfg.bRadio = FALSE;
1896 //                              RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1897                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1898                         }
1899                 }
1900                 else
1901                         pAd->StaCfg.bHardwareRadio = FALSE;
1902
1903                 if (pAd->StaCfg.bRadio == FALSE)
1904                 {
1905                         RTMPSetLED(pAd, LED_RADIO_OFF);
1906                 }
1907                 else
1908                 {
1909                         RTMPSetLED(pAd, LED_RADIO_ON);
1910                 }
1911         }
1912 #endif // CONFIG_STA_SUPPORT //
1913
1914         // Turn off patching for cardbus controller
1915         if (NicConfig2.field.CardbusAcceleration == 1)
1916         {
1917 //              pAd->bTest1 = TRUE;
1918         }
1919
1920         if (NicConfig2.field.DynamicTxAgcControl == 1)
1921                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1922         else
1923                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1924         //
1925         // Since BBP has been progamed, to make sure BBP setting will be
1926         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1927         //
1928         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1929
1930         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1931         BBPR3 &= (~0x18);
1932         if(pAd->Antenna.field.RxPath == 3)
1933         {
1934                 BBPR3 |= (0x10);
1935         }
1936         else if(pAd->Antenna.field.RxPath == 2)
1937         {
1938                 BBPR3 |= (0x8);
1939         }
1940         else if(pAd->Antenna.field.RxPath == 1)
1941         {
1942                 BBPR3 |= (0x0);
1943         }
1944         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1945
1946 #ifdef CONFIG_STA_SUPPORT
1947         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1948         {
1949                 // Handle the difference when 1T
1950                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1951                 if(pAd->Antenna.field.TxPath == 1)
1952                 {
1953                 BBPR1 &= (~0x18);
1954                 }
1955                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1956
1957                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1958         }
1959 #endif // CONFIG_STA_SUPPORT //
1960         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1961         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1962 }
1963
1964 /*
1965         ========================================================================
1966
1967         Routine Description:
1968                 Initialize NIC hardware
1969
1970         Arguments:
1971                 Adapter                                         Pointer to our adapter
1972
1973         Return Value:
1974                 None
1975
1976         IRQL = PASSIVE_LEVEL
1977
1978         Note:
1979
1980         ========================================================================
1981 */
1982 NDIS_STATUS     NICInitializeAdapter(
1983         IN      PRTMP_ADAPTER   pAd,
1984         IN   BOOLEAN    bHardReset)
1985 {
1986         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1987         WPDMA_GLO_CFG_STRUC     GloCfg;
1988 //      INT_MASK_CSR_STRUC              IntMask;
1989         ULONG   i =0, j=0;
1990         AC_TXOP_CSR0_STRUC      csr0;
1991
1992         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1993
1994         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1995 retry:
1996         i = 0;
1997         do
1998         {
1999                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
2000                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
2001                         break;
2002
2003                 RTMPusecDelay(1000);
2004                 i++;
2005         }while ( i<100);
2006         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
2007         GloCfg.word &= 0xff0;
2008         GloCfg.field.EnTXWriteBackDDONE =1;
2009         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2010
2011         // Record HW Beacon offset
2012         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
2013         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
2014         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
2015         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
2016         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
2017         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
2018         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
2019         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
2020
2021         //
2022         // write all shared Ring's base address into ASIC
2023         //
2024
2025         // asic simulation sequence put this ahead before loading firmware.
2026         // pbf hardware reset
2027
2028         // Initialze ASIC for TX & Rx operation
2029         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
2030         {
2031                 if (j++ == 0)
2032                 {
2033                         NICLoadFirmware(pAd);
2034                         goto retry;
2035                 }
2036                 return NDIS_STATUS_FAILURE;
2037         }
2038
2039
2040
2041
2042         // WMM parameter
2043         csr0.word = 0;
2044         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
2045         if (pAd->CommonCfg.PhyMode == PHY_11B)
2046         {
2047                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
2048                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
2049         }
2050         else
2051         {
2052                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
2053                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
2054         }
2055         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
2056
2057
2058
2059
2060         // reset action
2061         // Load firmware
2062         //  Status = NICLoadFirmware(pAd);
2063
2064         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
2065         return Status;
2066 }
2067
2068 /*
2069         ========================================================================
2070
2071         Routine Description:
2072                 Initialize ASIC
2073
2074         Arguments:
2075                 Adapter                                         Pointer to our adapter
2076
2077         Return Value:
2078                 None
2079
2080         IRQL = PASSIVE_LEVEL
2081
2082         Note:
2083
2084         ========================================================================
2085 */
2086 NDIS_STATUS     NICInitializeAsic(
2087         IN      PRTMP_ADAPTER   pAd,
2088         IN  BOOLEAN             bHardReset)
2089 {
2090         ULONG                   Index = 0;
2091         UCHAR                   R0 = 0xff;
2092         UINT32                  MacCsr12 = 0, Counter = 0;
2093 #ifdef RT2870
2094         UINT32                  MacCsr0 = 0;
2095         NTSTATUS                Status;
2096         UCHAR                   Value = 0xff;
2097 #endif // RT2870 //
2098 #ifdef RT30xx
2099         UINT32                  eFuseCtrl;
2100 #endif // RT30xx //
2101         USHORT                  KeyIdx;
2102         INT                             i,apidx;
2103
2104         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
2105
2106
2107 #ifdef RT2870
2108         //
2109         // Make sure MAC gets ready after NICLoadFirmware().
2110         //
2111         Index = 0;
2112
2113         //To avoid hang-on issue when interface up in kernel 2.4,
2114         //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
2115         do
2116         {
2117                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
2118
2119                 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2120                         break;
2121
2122                 RTMPusecDelay(10);
2123         } while (Index++ < 100);
2124
2125         pAd->MACVersion = MacCsr0;
2126         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2127         // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2128         RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2129         MacCsr12 &= (~0x2000);
2130         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2131
2132         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2133         RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2134         Status = RTUSBVenderReset(pAd);
2135
2136         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2137
2138         // Initialize MAC register to default value
2139         for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2140         {
2141 #ifdef RT3070
2142                 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd)))
2143                 {
2144                         MACRegTable[Index].Value = 0x00000400;
2145                 }
2146 #endif // RT3070 //
2147                 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2148         }
2149
2150
2151 #ifdef CONFIG_STA_SUPPORT
2152         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2153         {
2154                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2155                 {
2156                         RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2157                 }
2158         }
2159 #endif // CONFIG_STA_SUPPORT //
2160 #endif // RT2870 //
2161
2162 #ifdef RT30xx
2163         // Initialize RT3070 serial MAc registers which is different from RT2870 serial
2164         if (IS_RT3090(pAd))
2165         {
2166                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2167
2168                 // RT3071 version E has fixed this issue
2169                 if ((pAd->MACVersion & 0xffff) < 0x0211)
2170                 {
2171                         if (pAd->NicConfig2.field.DACTestBit == 1)
2172                         {
2173                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2174                         }
2175                         else
2176                         {
2177                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
2178                         }
2179                 }
2180                 else
2181                 {
2182                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
2183                 }
2184         }
2185         else if (IS_RT3070(pAd))
2186         {
2187                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2188                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2189         }
2190 #endif // RT30xx //
2191
2192         //
2193         // Before program BBP, we need to wait BBP/RF get wake up.
2194         //
2195         Index = 0;
2196         do
2197         {
2198                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2199
2200                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
2201                         break;
2202
2203                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
2204                 RTMPusecDelay(1000);
2205         } while (Index++ < 100);
2206
2207     // The commands to firmware should be after these commands, these commands will init firmware
2208         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2209         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2210         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2211         RTMPusecDelay(1000);
2212
2213         // Read BBP register, make sure BBP is up and running before write new data
2214         Index = 0;
2215         do
2216         {
2217                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2218                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2219         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2220         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2221
2222         if ((R0 == 0xff) || (R0 == 0x00))
2223                 return NDIS_STATUS_FAILURE;
2224
2225         // Initialize BBP register to default value
2226         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2227         {
2228                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2229         }
2230
2231         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2232         // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
2233         if (((pAd->MACVersion&0xffff) != 0x0101) && (!IS_RT30xx(pAd)))
2234                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2235
2236 // add by johnli, RF power sequence setup
2237 #ifdef RT30xx
2238         if (IS_RT30xx(pAd))
2239         {       //update for RT3070/71/72/90/91/92.
2240                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
2241                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
2242                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
2243         }
2244
2245         if (IS_RT3090(pAd))
2246         {
2247                 UCHAR           bbpreg=0;
2248
2249                 // enable DC filter
2250                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2251                 {
2252                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
2253                 }
2254
2255                 // improve power consumption
2256                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
2257                 if (pAd->Antenna.field.TxPath == 1)
2258                 {
2259                         // turn off tx DAC_1
2260                         bbpreg = (bbpreg | 0x20);
2261                 }
2262
2263                 if (pAd->Antenna.field.RxPath == 1)
2264                 {
2265                         // turn off tx ADC_1
2266                         bbpreg &= (~0x2);
2267                 }
2268                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
2269
2270                 // improve power consumption in RT3071 Ver.E
2271                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2272                 {
2273                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
2274                         bbpreg &= (~0x3);
2275                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
2276                 }
2277         }
2278 #endif // RT30xx //
2279 // end johnli
2280
2281         if (pAd->MACVersion == 0x28600100)
2282         {
2283                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2284                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2285     }
2286
2287         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2288         {
2289                 // enlarge MAX_LEN_CFG
2290                 UINT32 csr;
2291                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2292                 csr &= 0xFFF;
2293                 csr |= 0x2000;
2294                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2295         }
2296
2297 #ifdef RT2870
2298 {
2299         UCHAR   MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2300
2301         //Initialize WCID table
2302         Value = 0xff;
2303         for(Index =0 ;Index < 254;Index++)
2304         {
2305                 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2306         }
2307 }
2308 #endif // RT2870 //
2309
2310         // Add radio off control
2311 #ifdef CONFIG_STA_SUPPORT
2312         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2313         {
2314                 if (pAd->StaCfg.bRadio == FALSE)
2315                 {
2316 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2317                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2318                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2319                 }
2320         }
2321 #endif // CONFIG_STA_SUPPORT //
2322
2323         // Clear raw counters
2324         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2325         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2326         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2327         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2328         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2329         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2330
2331         // ASIC will keep garbage value after boot
2332         // Clear all seared key table when initial
2333         // This routine can be ignored in radio-ON/OFF operation.
2334         if (bHardReset)
2335         {
2336                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2337                 {
2338                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2339                 }
2340
2341         // Clear all pairwise key table when initial
2342         for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2343         {
2344                 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2345         }
2346         }
2347
2348         // assert HOST ready bit
2349 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
2350 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
2351
2352         // It isn't necessary to clear this space when not hard reset.
2353         if (bHardReset == TRUE)
2354         {
2355                 // clear all on-chip BEACON frame space
2356                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2357                 {
2358                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2359                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2360                 }
2361         }
2362 #ifdef RT2870
2363         AsicDisableSync(pAd);
2364         // Clear raw counters
2365         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2366         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2367         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2368         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2369         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2370         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2371         // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2372         RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2373         Counter&=0xffffff00;
2374         Counter|=0x000001e;
2375         RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2376 #endif // RT2870 //
2377 #ifdef RT30xx
2378         pAd->bUseEfuse=FALSE;
2379         RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
2380         pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;
2381         if(pAd->bUseEfuse)
2382         {
2383                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse\n"));
2384         }
2385         else
2386         {
2387                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
2388
2389         }
2390 #endif // RT30xx //
2391
2392 #ifdef CONFIG_STA_SUPPORT
2393         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2394         {
2395                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2396                 if ((pAd->MACVersion&0xffff) != 0x0101)
2397                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2398         }
2399 #endif // CONFIG_STA_SUPPORT //
2400
2401         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2402         return NDIS_STATUS_SUCCESS;
2403 }
2404
2405 /*
2406         ========================================================================
2407
2408         Routine Description:
2409                 Reset NIC Asics
2410
2411         Arguments:
2412                 Adapter                                         Pointer to our adapter
2413
2414         Return Value:
2415                 None
2416
2417         IRQL = PASSIVE_LEVEL
2418
2419         Note:
2420                 Reset NIC to initial state AS IS system boot up time.
2421
2422         ========================================================================
2423 */
2424 VOID    NICIssueReset(
2425         IN      PRTMP_ADAPTER   pAd)
2426 {
2427         UINT32  Value = 0;
2428         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2429
2430         // Abort Tx, prevent ASIC from writing to Host memory
2431         //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
2432
2433         // Disable Rx, register value supposed will remain after reset
2434         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2435         Value &= (0xfffffff3);
2436         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2437
2438         // Issue reset and clear from reset state
2439         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2440         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2441
2442         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2443 }
2444
2445 /*
2446         ========================================================================
2447
2448         Routine Description:
2449                 Check ASIC registers and find any reason the system might hang
2450
2451         Arguments:
2452                 Adapter                                         Pointer to our adapter
2453
2454         Return Value:
2455                 None
2456
2457         IRQL = DISPATCH_LEVEL
2458
2459         ========================================================================
2460 */
2461 BOOLEAN NICCheckForHang(
2462         IN      PRTMP_ADAPTER   pAd)
2463 {
2464         return (FALSE);
2465 }
2466
2467 VOID NICUpdateFifoStaCounters(
2468         IN PRTMP_ADAPTER pAd)
2469 {
2470         TX_STA_FIFO_STRUC       StaFifo;
2471         MAC_TABLE_ENTRY         *pEntry;
2472         UCHAR                           i = 0;
2473         UCHAR                   pid = 0, wcid = 0;
2474         CHAR                            reTry;
2475         UCHAR                           succMCS;
2476
2477                 do
2478                 {
2479                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2480
2481                         if (StaFifo.field.bValid == 0)
2482                                 break;
2483
2484                         wcid = (UCHAR)StaFifo.field.wcid;
2485
2486
2487                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2488                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2489                         {
2490                                 i++;
2491                                 continue;
2492                         }
2493
2494                         /* PID store Tx MCS Rate */
2495                         pid = (UCHAR)StaFifo.field.PidType;
2496
2497                         pEntry = &pAd->MacTab.Content[wcid];
2498
2499                         pEntry->DebugFIFOCount++;
2500
2501 #ifdef DOT11_N_SUPPORT
2502                         if (StaFifo.field.TxBF) // 3*3
2503                                 pEntry->TxBFCount++;
2504 #endif // DOT11_N_SUPPORT //
2505
2506 #ifdef UAPSD_AP_SUPPORT
2507                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2508 #endif // UAPSD_AP_SUPPORT //
2509
2510                         if (!StaFifo.field.TxSuccess)
2511                         {
2512                                 pEntry->FIFOCount++;
2513                                 pEntry->OneSecTxFailCount++;
2514
2515                                 if (pEntry->FIFOCount >= 1)
2516                                 {
2517                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2518 #ifdef DOT11_N_SUPPORT
2519                                         pEntry->NoBADataCountDown = 64;
2520 #endif // DOT11_N_SUPPORT //
2521
2522                                         if(pEntry->PsMode == PWR_ACTIVE)
2523                                         {
2524 #ifdef DOT11_N_SUPPORT
2525                                                 int tid;
2526                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2527                                                 {
2528                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2529                                                 }
2530 #endif // DOT11_N_SUPPORT //
2531
2532                                                 // Update the continuous transmission counter except PS mode
2533                                                 pEntry->ContinueTxFailCnt++;
2534                                         }
2535                                         else
2536                                         {
2537                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2538                                                 //     this tx error happened due to sta just go to sleep.
2539                                                 pEntry->FIFOCount = 0;
2540                                                 pEntry->ContinueTxFailCnt = 0;
2541                                         }
2542                                         //pEntry->FIFOCount = 0;
2543                                 }
2544                                 //pEntry->bSendBAR = TRUE;
2545                         }
2546                         else
2547                         {
2548 #ifdef DOT11_N_SUPPORT
2549                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2550                                 {
2551                                         pEntry->NoBADataCountDown--;
2552                                         if (pEntry->NoBADataCountDown==0)
2553                                         {
2554                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2555                                         }
2556                                 }
2557 #endif // DOT11_N_SUPPORT //
2558                                 pEntry->FIFOCount = 0;
2559                                 pEntry->OneSecTxNoRetryOkCount++;
2560                                 // update NoDataIdleCount when sucessful send packet to STA.
2561                                 pEntry->NoDataIdleCount = 0;
2562                                 pEntry->ContinueTxFailCnt = 0;
2563                         }
2564
2565                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2566
2567                         reTry = pid - succMCS;
2568
2569                         if (StaFifo.field.TxSuccess)
2570                         {
2571                                 pEntry->TXMCSExpected[pid]++;
2572                                 if (pid == succMCS)
2573                                 {
2574                                         pEntry->TXMCSSuccessful[pid]++;
2575                                 }
2576                                 else
2577                                 {
2578                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2579                                 }
2580                         }
2581                         else
2582                         {
2583                                 pEntry->TXMCSFailed[pid]++;
2584                         }
2585
2586                         if (reTry > 0)
2587                         {
2588                                 if ((pid >= 12) && succMCS <=7)
2589                                 {
2590                                         reTry -= 4;
2591                                 }
2592                                 pEntry->OneSecTxRetryOkCount += reTry;
2593                         }
2594
2595                         i++;
2596                         // ASIC store 16 stack
2597                 } while ( i < (2*TX_RING_SIZE) );
2598
2599 }
2600
2601 /*
2602         ========================================================================
2603
2604         Routine Description:
2605                 Read statistical counters from hardware registers and record them
2606                 in software variables for later on query
2607
2608         Arguments:
2609                 pAd                                     Pointer to our adapter
2610
2611         Return Value:
2612                 None
2613
2614         IRQL = DISPATCH_LEVEL
2615
2616         ========================================================================
2617 */
2618 VOID NICUpdateRawCounters(
2619         IN PRTMP_ADAPTER pAd)
2620 {
2621         UINT32  OldValue;//, Value2;
2622         //ULONG PageSum, OneSecTransmitCount;
2623         //ULONG TxErrorRatio, Retry, Fail;
2624         RX_STA_CNT0_STRUC        RxStaCnt0;
2625         RX_STA_CNT1_STRUC   RxStaCnt1;
2626         RX_STA_CNT2_STRUC   RxStaCnt2;
2627         TX_STA_CNT0_STRUC        TxStaCnt0;
2628         TX_STA_CNT1_STRUC        StaTx1;
2629         TX_STA_CNT2_STRUC        StaTx2;
2630         TX_AGG_CNT_STRUC        TxAggCnt;
2631         TX_AGG_CNT0_STRUC       TxAggCnt0;
2632         TX_AGG_CNT1_STRUC       TxAggCnt1;
2633         TX_AGG_CNT2_STRUC       TxAggCnt2;
2634         TX_AGG_CNT3_STRUC       TxAggCnt3;
2635         TX_AGG_CNT4_STRUC       TxAggCnt4;
2636         TX_AGG_CNT5_STRUC       TxAggCnt5;
2637         TX_AGG_CNT6_STRUC       TxAggCnt6;
2638         TX_AGG_CNT7_STRUC       TxAggCnt7;
2639
2640         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2641         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2642
2643         {
2644                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2645             // Update RX PLCP error counter
2646             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2647                 // Update False CCA counter
2648                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2649         }
2650
2651         // Update FCS counters
2652         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2653         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2654         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2655                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2656
2657         // Add FCS error count to private counters
2658         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2659         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2660         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2661         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2662                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2663
2664         // Update Duplicate Rcv check
2665         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2666         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2667         // Update RX Overflow counter
2668         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2669
2670         //pAd->RalinkCounters.RxCount = 0;
2671 #ifdef RT2870
2672         if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2673         {
2674                 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2675                 pAd->watchDogRxOverFlowCnt = 0;
2676         }
2677         else
2678         {
2679                 if (RxStaCnt2.field.RxFifoOverflowCount)
2680                         pAd->watchDogRxOverFlowCnt++;
2681                 else
2682                         pAd->watchDogRxOverFlowCnt = 0;
2683         }
2684 #endif // RT2870 //
2685
2686
2687         //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2688         //      (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2689         if (!pAd->bUpdateBcnCntDone)
2690         {
2691         // Update BEACON sent count
2692         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2693         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2694         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2695         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2696         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2697         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2698         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2699         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2700         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2701         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2702         }
2703
2704         //if (pAd->bStaFifoTest == TRUE)
2705         {
2706                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2707                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2708                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2709                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2710                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2711                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2712                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2713                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2714                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2715                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2716                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2717                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2718                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2719
2720                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2721                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2722                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2723                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2724
2725                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2726                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2727                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2728                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2729
2730                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2731                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2732                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2733                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2734
2735                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2736                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2737
2738                 // Calculate the transmitted A-MPDU count
2739                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2740                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2741
2742                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2743                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2744
2745                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2746                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2747
2748                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2749                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2750
2751                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2752                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2753
2754                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2755                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2756
2757                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2758                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2759
2760                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2761                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2762         }
2763
2764 #ifdef DBG_DIAGNOSE
2765         {
2766                 RtmpDiagStruct  *pDiag;
2767                 COUNTER_RALINK  *pRalinkCounters;
2768                 UCHAR                   ArrayCurIdx, i;
2769
2770                 pDiag = &pAd->DiagStruct;
2771                 pRalinkCounters = &pAd->RalinkCounters;
2772                 ArrayCurIdx = pDiag->ArrayCurIdx;
2773
2774                 if (pDiag->inited == 0)
2775                 {
2776                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2777                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2778                         pDiag->inited = 1;
2779                 }
2780                 else
2781                 {
2782                         // Tx
2783                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2784                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2785                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2786                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2787                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2788                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2789                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2790                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2791                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2792                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2793                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2794                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2795                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2796                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2797                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2798                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2799                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2800                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2801                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2802
2803                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2804
2805                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2806                         ArrayCurIdx = pDiag->ArrayCurIdx;
2807                         for (i =0; i < 9; i++)
2808                         {
2809                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2810                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2811                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2812                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2813                         }
2814                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2815                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2816                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2817                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2818 //                      for (i = 9; i < 16; i++)
2819                         for (i = 9; i < 24; i++) // 3*3
2820                         {
2821                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2822                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2823                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2824 }
2825
2826                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2827                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2828                 }
2829
2830         }
2831 #endif // DBG_DIAGNOSE //
2832
2833
2834 }
2835
2836
2837 /*
2838         ========================================================================
2839
2840         Routine Description:
2841                 Reset NIC from error
2842
2843         Arguments:
2844                 Adapter                                         Pointer to our adapter
2845
2846         Return Value:
2847                 None
2848
2849         IRQL = PASSIVE_LEVEL
2850
2851         Note:
2852                 Reset NIC from error state
2853
2854         ========================================================================
2855 */
2856 VOID    NICResetFromError(
2857         IN      PRTMP_ADAPTER   pAd)
2858 {
2859         // Reset BBP (according to alex, reset ASIC will force reset BBP
2860         // Therefore, skip the reset BBP
2861         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2862
2863         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2864         // Remove ASIC from reset state
2865         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2866
2867         NICInitializeAdapter(pAd, FALSE);
2868         NICInitAsicFromEEPROM(pAd);
2869
2870         // Switch to current channel, since during reset process, the connection should remains on.
2871         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2872         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2873 }
2874
2875 /*
2876         ========================================================================
2877
2878         Routine Description:
2879                 erase 8051 firmware image in MAC ASIC
2880
2881         Arguments:
2882                 Adapter                                         Pointer to our adapter
2883
2884         IRQL = PASSIVE_LEVEL
2885
2886         ========================================================================
2887 */
2888 VOID NICEraseFirmware(
2889         IN PRTMP_ADAPTER pAd)
2890 {
2891         ULONG i;
2892
2893         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2894                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2895
2896 }/* End of NICEraseFirmware */
2897
2898 /*
2899         ========================================================================
2900
2901         Routine Description:
2902                 Load 8051 firmware RT2561.BIN file into MAC ASIC
2903
2904         Arguments:
2905                 Adapter                                         Pointer to our adapter
2906
2907         Return Value:
2908                 NDIS_STATUS_SUCCESS         firmware image load ok
2909                 NDIS_STATUS_FAILURE         image not found
2910
2911         IRQL = PASSIVE_LEVEL
2912
2913         ========================================================================
2914 */
2915 NDIS_STATUS NICLoadFirmware(
2916         IN PRTMP_ADAPTER pAd)
2917 {
2918         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2919         PUCHAR                  pFirmwareImage;
2920         ULONG                   FileLength, Index;
2921         //ULONG                 firm;
2922         UINT32                  MacReg = 0;
2923         UINT32                  Version = (pAd->MACVersion >> 16);
2924
2925         pFirmwareImage = FirmwareImage;
2926         FileLength = sizeof(FirmwareImage);
2927
2928         // New 8k byte firmware size for RT3071/RT3072
2929         //printk("Usb Chip\n");
2930         if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
2931         //The firmware image consists of two parts. One is the origianl and the other is the new.
2932         //Use Second Part
2933         {
2934 #ifdef RT2870
2935                 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
2936                 {       // Use Firmware V2.
2937                         //printk("KH:Use New Version,part2\n");
2938                         pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
2939                         FileLength = FIRMWAREIMAGEV2_LENGTH;
2940                 }
2941                 else
2942                 {
2943                         //printk("KH:Use New Version,part1\n");
2944                         pFirmwareImage = FirmwareImage;
2945                         FileLength = FIRMWAREIMAGEV1_LENGTH;
2946                 }
2947 #endif // RT2870 //
2948         }
2949         else
2950         {
2951                 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
2952                 Status = NDIS_STATUS_FAILURE;
2953         }
2954
2955         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2956
2957         /* check if MCU is ready */
2958         Index = 0;
2959         do
2960         {
2961                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2962
2963                 if (MacReg & 0x80)
2964                         break;
2965
2966                 RTMPusecDelay(1000);
2967         } while (Index++ < 1000);
2968
2969     if (Index >= 1000)
2970         {
2971                 Status = NDIS_STATUS_FAILURE;
2972                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2973         } /* End of if */
2974
2975     DBGPRINT(RT_DEBUG_TRACE,
2976                          ("<=== %s (status=%d)\n", __func__, Status));
2977     return Status;
2978 } /* End of NICLoadFirmware */
2979
2980
2981 /*
2982         ========================================================================
2983
2984         Routine Description:
2985                 Load Tx rate switching parameters
2986
2987         Arguments:
2988                 Adapter                                         Pointer to our adapter
2989
2990         Return Value:
2991                 NDIS_STATUS_SUCCESS         firmware image load ok
2992                 NDIS_STATUS_FAILURE         image not found
2993
2994         IRQL = PASSIVE_LEVEL
2995
2996         Rate Table Format:
2997                 1. (B0: Valid Item number) (B1:Initial item from zero)
2998                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2999
3000         ========================================================================
3001 */
3002 NDIS_STATUS NICLoadRateSwitchingParams(
3003         IN PRTMP_ADAPTER pAd)
3004 {
3005         return NDIS_STATUS_SUCCESS;
3006 }
3007
3008 /*
3009         ========================================================================
3010
3011         Routine Description:
3012                 if  pSrc1 all zero with length Length, return 0.
3013                 If not all zero, return 1
3014
3015         Arguments:
3016                 pSrc1
3017
3018         Return Value:
3019                 1:                      not all zero
3020                 0:                      all zero
3021
3022         IRQL = DISPATCH_LEVEL
3023
3024         Note:
3025
3026         ========================================================================
3027 */
3028 ULONG   RTMPNotAllZero(
3029         IN      PVOID   pSrc1,
3030         IN      ULONG   Length)
3031 {
3032         PUCHAR  pMem1;
3033         ULONG   Index = 0;
3034
3035         pMem1 = (PUCHAR) pSrc1;
3036
3037         for (Index = 0; Index < Length; Index++)
3038         {
3039                 if (pMem1[Index] != 0x0)
3040                 {
3041                         break;
3042                 }
3043         }
3044
3045         if (Index == Length)
3046         {
3047                 return (0);
3048         }
3049         else
3050         {
3051                 return (1);
3052         }
3053 }
3054
3055 /*
3056         ========================================================================
3057
3058         Routine Description:
3059                 Compare two memory block
3060
3061         Arguments:
3062                 pSrc1           Pointer to first memory address
3063                 pSrc2           Pointer to second memory address
3064
3065         Return Value:
3066                 0:                      memory is equal
3067                 1:                      pSrc1 memory is larger
3068                 2:                      pSrc2 memory is larger
3069
3070         IRQL = DISPATCH_LEVEL
3071
3072         Note:
3073
3074         ========================================================================
3075 */
3076 ULONG   RTMPCompareMemory(
3077         IN      PVOID   pSrc1,
3078         IN      PVOID   pSrc2,
3079         IN      ULONG   Length)
3080 {
3081         PUCHAR  pMem1;
3082         PUCHAR  pMem2;
3083         ULONG   Index = 0;
3084
3085         pMem1 = (PUCHAR) pSrc1;
3086         pMem2 = (PUCHAR) pSrc2;
3087
3088         for (Index = 0; Index < Length; Index++)
3089         {
3090                 if (pMem1[Index] > pMem2[Index])
3091                         return (1);
3092                 else if (pMem1[Index] < pMem2[Index])
3093                         return (2);
3094         }
3095
3096         // Equal
3097         return (0);
3098 }
3099
3100 /*
3101         ========================================================================
3102
3103         Routine Description:
3104                 Zero out memory block
3105
3106         Arguments:
3107                 pSrc1           Pointer to memory address
3108                 Length          Size
3109
3110         Return Value:
3111                 None
3112
3113         IRQL = PASSIVE_LEVEL
3114         IRQL = DISPATCH_LEVEL
3115
3116         Note:
3117
3118         ========================================================================
3119 */
3120 VOID    RTMPZeroMemory(
3121         IN      PVOID   pSrc,
3122         IN      ULONG   Length)
3123 {
3124         PUCHAR  pMem;
3125         ULONG   Index = 0;
3126
3127         pMem = (PUCHAR) pSrc;
3128
3129         for (Index = 0; Index < Length; Index++)
3130         {
3131                 pMem[Index] = 0x00;
3132         }
3133 }
3134
3135 VOID    RTMPFillMemory(
3136         IN      PVOID   pSrc,
3137         IN      ULONG   Length,
3138         IN      UCHAR   Fill)
3139 {
3140         PUCHAR  pMem;
3141         ULONG   Index = 0;
3142
3143         pMem = (PUCHAR) pSrc;
3144
3145         for (Index = 0; Index < Length; Index++)
3146         {
3147                 pMem[Index] = Fill;
3148         }
3149 }
3150
3151 /*
3152         ========================================================================
3153
3154         Routine Description:
3155                 Copy data from memory block 1 to memory block 2
3156
3157         Arguments:
3158                 pDest           Pointer to destination memory address
3159                 pSrc            Pointer to source memory address
3160                 Length          Copy size
3161
3162         Return Value:
3163                 None
3164
3165         IRQL = PASSIVE_LEVEL
3166         IRQL = DISPATCH_LEVEL
3167
3168         Note:
3169
3170         ========================================================================
3171 */
3172 VOID    RTMPMoveMemory(
3173         OUT     PVOID   pDest,
3174         IN      PVOID   pSrc,
3175         IN      ULONG   Length)
3176 {
3177         PUCHAR  pMem1;
3178         PUCHAR  pMem2;
3179         UINT    Index;
3180
3181         ASSERT((Length==0) || (pDest && pSrc));
3182
3183         pMem1 = (PUCHAR) pDest;
3184         pMem2 = (PUCHAR) pSrc;
3185
3186         for (Index = 0; Index < Length; Index++)
3187         {
3188                 pMem1[Index] = pMem2[Index];
3189         }
3190 }
3191
3192 /*
3193         ========================================================================
3194
3195         Routine Description:
3196                 Initialize port configuration structure
3197
3198         Arguments:
3199                 Adapter                                         Pointer to our adapter
3200
3201         Return Value:
3202                 None
3203
3204         IRQL = PASSIVE_LEVEL
3205
3206         Note:
3207
3208         ========================================================================
3209 */
3210 VOID    UserCfgInit(
3211         IN      PRTMP_ADAPTER pAd)
3212 {
3213 //      EDCA_PARM DefaultEdcaParm;
3214     UINT key_index, bss_index;
3215
3216         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3217
3218         //
3219         //  part I. intialize common configuration
3220         //
3221 #ifdef RT2870
3222         pAd->BulkOutReq = 0;
3223
3224         pAd->BulkOutComplete = 0;
3225         pAd->BulkOutCompleteOther = 0;
3226         pAd->BulkOutCompleteCancel = 0;
3227         pAd->BulkInReq = 0;
3228         pAd->BulkInComplete = 0;
3229         pAd->BulkInCompleteFail = 0;
3230
3231         //pAd->QuickTimerP = 100;
3232         //pAd->TurnAggrBulkInCount = 0;
3233         pAd->bUsbTxBulkAggre = 0;
3234
3235         // init as unsed value to ensure driver will set to MCU once.
3236         pAd->LedIndicatorStregth = 0xFF;
3237
3238         pAd->CommonCfg.MaxPktOneTxBulk = 2;
3239         pAd->CommonCfg.TxBulkFactor = 1;
3240         pAd->CommonCfg.RxBulkFactor =1;
3241
3242         pAd->CommonCfg.TxPower = 100; //mW
3243
3244         NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3245 #endif // RT2870 //
3246
3247         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3248         {
3249                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3250                 {
3251                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3252                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3253         } /* End of for */
3254     } /* End of for */
3255
3256         pAd->EepromAccess = FALSE;
3257
3258         pAd->Antenna.word = 0;
3259         pAd->CommonCfg.BBPCurrentBW = BW_20;
3260
3261         pAd->LedCntl.word = 0;
3262
3263         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
3264         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
3265         pAd->RfIcType = RFIC_2820;
3266
3267         // Init timer for reset complete event
3268         pAd->CommonCfg.CentralChannel = 1;
3269         pAd->bForcePrintTX = FALSE;
3270         pAd->bForcePrintRX = FALSE;
3271         pAd->bStaFifoTest = FALSE;
3272         pAd->bProtectionTest = FALSE;
3273         pAd->bHCCATest = FALSE;
3274         pAd->bGenOneHCCA = FALSE;
3275         pAd->CommonCfg.Dsifs = 10;      // in units of usec
3276         pAd->CommonCfg.TxPower = 100; //mW
3277         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3278         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3279         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3280         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3281         pAd->CommonCfg.RtsThreshold = 2347;
3282         pAd->CommonCfg.FragmentThreshold = 2346;
3283         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
3284         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3285         pAd->CommonCfg.PhyMode = 0xff;     // unknown
3286         pAd->CommonCfg.BandState = UNKNOWN_BAND;
3287         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3288         pAd->CommonCfg.RadarDetect.CSCount = 0;
3289         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3290         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3291         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3292         pAd->CommonCfg.bAPSDCapable = FALSE;
3293         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3294         pAd->CommonCfg.TriggerTimerCount = 0;
3295         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3296         pAd->CommonCfg.bCountryFlag = FALSE;
3297         pAd->CommonCfg.TxStream = 0;
3298         pAd->CommonCfg.RxStream = 0;
3299
3300         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3301
3302 #ifdef DOT11_N_SUPPORT
3303         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3304         pAd->HTCEnable = FALSE;
3305         pAd->bBroadComHT = FALSE;
3306         pAd->CommonCfg.bRdg = FALSE;
3307
3308         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3309         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3310         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3311         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3312         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3313         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3314         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3315
3316         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3317         BATableInit(pAd, &pAd->BATable);
3318
3319         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3320         pAd->CommonCfg.bHTProtect = 1;
3321         pAd->CommonCfg.bMIMOPSEnable = TRUE;
3322         pAd->CommonCfg.bBADecline = FALSE;
3323         pAd->CommonCfg.bDisableReordering = FALSE;
3324
3325         pAd->CommonCfg.TxBASize = 7;
3326
3327         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3328 #endif // DOT11_N_SUPPORT //
3329
3330         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3331         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3332         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3333         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3334         pAd->CommonCfg.TxRate = RATE_6;
3335
3336         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3337         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3338         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3339
3340         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3341
3342         //
3343         // part II. intialize STA specific configuration
3344         //
3345 #ifdef CONFIG_STA_SUPPORT
3346         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3347         {
3348                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3349                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3350                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3351                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3352
3353                 pAd->StaCfg.Psm = PWR_ACTIVE;
3354
3355                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3356                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3357                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3358                 pAd->StaCfg.bMixCipher = FALSE;
3359                 pAd->StaCfg.DefaultKeyId = 0;
3360
3361                 // 802.1x port control
3362                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3363                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3364                 pAd->StaCfg.LastMicErrorTime = 0;
3365                 pAd->StaCfg.MicErrCnt        = 0;
3366                 pAd->StaCfg.bBlockAssoc      = FALSE;
3367                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3368
3369                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3370
3371                 pAd->StaCfg.RssiTrigger = 0;
3372                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3373                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3374                 pAd->StaCfg.AtimWin = 0;
3375                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3376                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3377                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3378                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3379                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3380
3381                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3382                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3383         }
3384 #endif // CONFIG_STA_SUPPORT //
3385
3386         // global variables mXXXX used in MAC protocol state machines
3387         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3388         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3389         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3390
3391         // PHY specification
3392         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3393         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3394
3395 #ifdef CONFIG_STA_SUPPORT
3396         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3397         {
3398                 // user desired power mode
3399                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3400                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3401                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3402
3403                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3404                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3405
3406                 // Patch for Ndtest
3407                 pAd->StaCfg.ScanCnt = 0;
3408
3409                 // CCX 2.0 control flag init
3410                 pAd->StaCfg.CCXEnable = FALSE;
3411                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3412                 pAd->StaCfg.CCXQosECWMin        = 4;
3413                 pAd->StaCfg.CCXQosECWMax        = 10;
3414
3415                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3416                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3417                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3418                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3419                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3420
3421                 // Nitro mode control
3422                 pAd->StaCfg.bAutoReconnect = TRUE;
3423
3424                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3425                 // This patch is for driver wake up from standby mode, system will do scan right away.
3426                 pAd->StaCfg.LastScanTime = 0;
3427                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3428                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3429                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3430 #ifdef WPA_SUPPLICANT_SUPPORT
3431                 pAd->StaCfg.IEEE8021X = FALSE;
3432                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3433                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3434 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3435                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3436 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3437 #endif // WPA_SUPPLICANT_SUPPORT //
3438
3439         }
3440 #endif // CONFIG_STA_SUPPORT //
3441
3442         // Default for extra information is not valid
3443         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3444
3445         // Default Config change flag
3446         pAd->bConfigChanged = FALSE;
3447
3448         //
3449         // part III. AP configurations
3450         //
3451
3452
3453         //
3454         // part IV. others
3455         //
3456         // dynamic BBP R66:sensibity tuning to overcome background noise
3457         pAd->BbpTuning.bEnable                = TRUE;
3458         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3459         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3460         pAd->BbpTuning.R66Delta               = 4;
3461         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3462
3463         //
3464         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3465         // if not initial this value, the default value will be 0.
3466         //
3467         pAd->BbpTuning.R66CurrentValue = 0x38;
3468
3469         pAd->Bbp94 = BBPR94_DEFAULT;
3470         pAd->BbpForCCK = FALSE;
3471
3472         // Default is FALSE for test bit 1
3473         //pAd->bTest1 = FALSE;
3474
3475         // initialize MAC table and allocate spin lock
3476         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3477         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3478         NdisAllocateSpinLock(&pAd->MacTabLock);
3479
3480         //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
3481         //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
3482
3483         pAd->CommonCfg.bWiFiTest = FALSE;
3484
3485
3486         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3487 }
3488
3489 // IRQL = PASSIVE_LEVEL
3490 UCHAR BtoH(char ch)
3491 {
3492         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3493         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3494         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3495         return(255);
3496 }
3497
3498 //
3499 //  FUNCTION: AtoH(char *, UCHAR *, int)
3500 //
3501 //  PURPOSE:  Converts ascii string to network order hex
3502 //
3503 //  PARAMETERS:
3504 //    src    - pointer to input ascii string
3505 //    dest   - pointer to output hex
3506 //    destlen - size of dest
3507 //
3508 //  COMMENTS:
3509 //
3510 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3511 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3512 //
3513 // IRQL = PASSIVE_LEVEL
3514
3515 void AtoH(char * src, UCHAR * dest, int destlen)
3516 {
3517         char * srcptr;
3518         PUCHAR destTemp;
3519
3520         srcptr = src;
3521         destTemp = (PUCHAR) dest;
3522
3523         while(destlen--)
3524         {
3525                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3526                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3527                 destTemp++;
3528         }
3529 }
3530
3531 VOID    RTMPPatchMacBbpBug(
3532         IN      PRTMP_ADAPTER   pAd)
3533 {
3534         ULONG   Index;
3535
3536         // Initialize BBP register to default value
3537         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3538         {
3539                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3540         }
3541
3542         // Initialize RF register to default value
3543         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3544         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3545
3546         // Re-init BBP register from EEPROM value
3547         NICInitAsicFromEEPROM(pAd);
3548 }
3549
3550 /*
3551         ========================================================================
3552
3553         Routine Description:
3554                 Init timer objects
3555
3556         Arguments:
3557                 pAd                     Pointer to our adapter
3558                 pTimer                          Timer structure
3559                 pTimerFunc                      Function to execute when timer expired
3560                 Repeat                          Ture for period timer
3561
3562         Return Value:
3563                 None
3564
3565         Note:
3566
3567         ========================================================================
3568 */
3569 VOID    RTMPInitTimer(
3570         IN      PRTMP_ADAPTER                   pAd,
3571         IN      PRALINK_TIMER_STRUCT    pTimer,
3572         IN      PVOID                                   pTimerFunc,
3573         IN      PVOID                                   pData,
3574         IN      BOOLEAN                                 Repeat)
3575 {
3576         //
3577         // Set Valid to TRUE for later used.
3578         // It will crash if we cancel a timer or set a timer
3579         // that we haven't initialize before.
3580         //
3581         pTimer->Valid      = TRUE;
3582
3583         pTimer->PeriodicType = Repeat;
3584         pTimer->State      = FALSE;
3585         pTimer->cookie = (ULONG) pData;
3586
3587 #ifdef RT2870
3588         pTimer->pAd = pAd;
3589 #endif // RT2870 //
3590
3591         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3592 }
3593
3594 /*
3595         ========================================================================
3596
3597         Routine Description:
3598                 Init timer objects
3599
3600         Arguments:
3601                 pTimer                          Timer structure
3602                 Value                           Timer value in milliseconds
3603
3604         Return Value:
3605                 None
3606
3607         Note:
3608                 To use this routine, must call RTMPInitTimer before.
3609
3610         ========================================================================
3611 */
3612 VOID    RTMPSetTimer(
3613         IN      PRALINK_TIMER_STRUCT    pTimer,
3614         IN      ULONG                                   Value)
3615 {
3616         if (pTimer->Valid)
3617         {
3618                 pTimer->TimerValue = Value;
3619                 pTimer->State      = FALSE;
3620                 if (pTimer->PeriodicType == TRUE)
3621                 {
3622                         pTimer->Repeat = TRUE;
3623                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3624                 }
3625                 else
3626                 {
3627                         pTimer->Repeat = FALSE;
3628                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3629                 }
3630         }
3631         else
3632         {
3633                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3634         }
3635 }
3636
3637
3638 /*
3639         ========================================================================
3640
3641         Routine Description:
3642                 Init timer objects
3643
3644         Arguments:
3645                 pTimer                          Timer structure
3646                 Value                           Timer value in milliseconds
3647
3648         Return Value:
3649                 None
3650
3651         Note:
3652                 To use this routine, must call RTMPInitTimer before.
3653
3654         ========================================================================
3655 */
3656 VOID    RTMPModTimer(
3657         IN      PRALINK_TIMER_STRUCT    pTimer,
3658         IN      ULONG                                   Value)
3659 {
3660         BOOLEAN Cancel;
3661
3662         if (pTimer->Valid)
3663         {
3664                 pTimer->TimerValue = Value;
3665                 pTimer->State      = FALSE;
3666                 if (pTimer->PeriodicType == TRUE)
3667                 {
3668                         RTMPCancelTimer(pTimer, &Cancel);
3669                         RTMPSetTimer(pTimer, Value);
3670                 }
3671                 else
3672                 {
3673                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3674                 }
3675         }
3676         else
3677         {
3678                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3679         }
3680 }
3681
3682 /*
3683         ========================================================================
3684
3685         Routine Description:
3686                 Cancel timer objects
3687
3688         Arguments:
3689                 Adapter                                         Pointer to our adapter
3690
3691         Return Value:
3692                 None
3693
3694         IRQL = PASSIVE_LEVEL
3695         IRQL = DISPATCH_LEVEL
3696
3697         Note:
3698                 1.) To use this routine, must call RTMPInitTimer before.
3699                 2.) Reset NIC to initial state AS IS system boot up time.
3700
3701         ========================================================================
3702 */
3703 VOID    RTMPCancelTimer(
3704         IN      PRALINK_TIMER_STRUCT    pTimer,
3705         OUT     BOOLEAN                                 *pCancelled)
3706 {
3707         if (pTimer->Valid)
3708         {
3709                 if (pTimer->State == FALSE)
3710                         pTimer->Repeat = FALSE;
3711                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3712
3713                 if (*pCancelled == TRUE)
3714                         pTimer->State = TRUE;
3715
3716 #ifdef RT2870
3717                 // We need to go-through the TimerQ to findout this timer handler and remove it if
3718                 //              it's still waiting for execution.
3719
3720                 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3721 #endif // RT2870 //
3722         }
3723         else
3724         {
3725                 //
3726                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3727                 // And don't set the "Valid" to False. So that we can use this timer again.
3728                 //
3729                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3730         }
3731 }
3732
3733 /*
3734         ========================================================================
3735
3736         Routine Description:
3737                 Set LED Status
3738
3739         Arguments:
3740                 pAd                                             Pointer to our adapter
3741                 Status                                  LED Status
3742
3743         Return Value:
3744                 None
3745
3746         IRQL = PASSIVE_LEVEL
3747         IRQL = DISPATCH_LEVEL
3748
3749         Note:
3750
3751         ========================================================================
3752 */
3753 VOID RTMPSetLED(
3754         IN PRTMP_ADAPTER        pAd,
3755         IN UCHAR                        Status)
3756 {
3757         //ULONG                 data;
3758         UCHAR                   HighByte = 0;
3759         UCHAR                   LowByte;
3760
3761         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3762         switch (Status)
3763         {
3764                 case LED_LINK_DOWN:
3765                         HighByte = 0x20;
3766                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3767                         pAd->LedIndicatorStregth = 0;
3768                         break;
3769                 case LED_LINK_UP:
3770                         if (pAd->CommonCfg.Channel > 14)
3771                                 HighByte = 0xa0;
3772                         else
3773                                 HighByte = 0x60;
3774                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3775                         break;
3776                 case LED_RADIO_ON:
3777                         HighByte = 0x20;
3778                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3779                         break;
3780                 case LED_HALT:
3781                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3782                 case LED_RADIO_OFF:
3783                         HighByte = 0;
3784                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3785                         break;
3786         case LED_WPS:
3787                         HighByte = 0x10;
3788                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3789                         break;
3790                 case LED_ON_SITE_SURVEY:
3791                         HighByte = 0x08;
3792                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3793                         break;
3794                 case LED_POWER_UP:
3795                         HighByte = 0x04;
3796                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3797                         break;
3798                 default:
3799                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3800                         break;
3801         }
3802
3803     //
3804         // Keep LED status for LED SiteSurvey mode.
3805         // After SiteSurvey, we will set the LED mode to previous status.
3806         //
3807         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3808                 pAd->LedStatus = Status;
3809
3810         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3811 }
3812
3813 /*
3814         ========================================================================
3815
3816         Routine Description:
3817                 Set LED Signal Stregth
3818
3819         Arguments:
3820                 pAd                                             Pointer to our adapter
3821                 Dbm                                             Signal Stregth
3822
3823         Return Value:
3824                 None
3825
3826         IRQL = PASSIVE_LEVEL
3827
3828         Note:
3829                 Can be run on any IRQL level.
3830
3831                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3832                 <= -90  No Signal
3833                 <= -81  Very Low
3834                 <= -71  Low
3835                 <= -67  Good
3836                 <= -57  Very Good
3837                  > -57  Excellent
3838         ========================================================================
3839 */
3840 VOID RTMPSetSignalLED(
3841         IN PRTMP_ADAPTER        pAd,
3842         IN NDIS_802_11_RSSI Dbm)
3843 {
3844         UCHAR           nLed = 0;
3845
3846         //
3847         // if not Signal Stregth, then do nothing.
3848         //
3849         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3850         {
3851                 return;
3852         }
3853
3854         if (Dbm <= -90)
3855                 nLed = 0;
3856         else if (Dbm <= -81)
3857                 nLed = 1;
3858         else if (Dbm <= -71)
3859                 nLed = 3;
3860         else if (Dbm <= -67)
3861                 nLed = 7;
3862         else if (Dbm <= -57)
3863                 nLed = 15;
3864         else
3865                 nLed = 31;
3866
3867         //
3868         // Update Signal Stregth to firmware if changed.
3869         //
3870         if (pAd->LedIndicatorStregth != nLed)
3871         {
3872                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3873                 pAd->LedIndicatorStregth = nLed;
3874         }
3875 }
3876
3877 /*
3878         ========================================================================
3879
3880         Routine Description:
3881                 Enable RX
3882
3883         Arguments:
3884                 pAd                                             Pointer to our adapter
3885
3886         Return Value:
3887                 None
3888
3889         IRQL <= DISPATCH_LEVEL
3890
3891         Note:
3892                 Before Enable RX, make sure you have enabled Interrupt.
3893         ========================================================================
3894 */
3895 VOID RTMPEnableRxTx(
3896         IN PRTMP_ADAPTER        pAd)
3897 {
3898 //      WPDMA_GLO_CFG_STRUC     GloCfg;
3899 //      ULONG   i = 0;
3900
3901         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3902
3903         // Enable Rx DMA.
3904         RT28XXDMAEnable(pAd);
3905
3906         // enable RX of MAC block
3907         if (pAd->OpMode == OPMODE_AP)
3908         {
3909                 UINT32 rx_filter_flag = APNORMAL;
3910
3911
3912                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3913         }
3914         else
3915         {
3916                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
3917         }
3918
3919         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3920         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3921 }
3922
3923