2 * Compaq Hot Plug Controller Driver
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2001 IBM Corp.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 * Send feedback to <greg@kroah.com>
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
28 * Torben Mathiasen <torben.mathiasen@hp.com>
31 #include <linux/module.h>
32 #include <linux/moduleparam.h>
33 #include <linux/kernel.h>
34 #include <linux/types.h>
35 #include <linux/proc_fs.h>
36 #include <linux/slab.h>
37 #include <linux/workqueue.h>
38 #include <linux/pci.h>
39 #include <linux/pci_hotplug.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
43 #include <asm/uaccess.h>
46 #include "cpqphp_nvram.h"
47 #include <asm/pci_x86.h>
50 /* Global variables */
52 int cpqhp_legacy_mode;
53 struct controller *cpqhp_ctrl_list; /* = NULL */
54 struct pci_func *cpqhp_slot_list[256];
57 static void __iomem *smbios_table;
58 static void __iomem *smbios_start;
59 static void __iomem *cpqhp_rom_start;
60 static int power_mode;
62 static int initialized;
64 #define DRIVER_VERSION "0.9.8"
65 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
66 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
68 MODULE_AUTHOR(DRIVER_AUTHOR);
69 MODULE_DESCRIPTION(DRIVER_DESC);
70 MODULE_LICENSE("GPL");
72 module_param(power_mode, bool, 0644);
73 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
75 module_param(debug, bool, 0644);
76 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
78 #define CPQHPC_MODULE_MINOR 208
80 static inline int is_slot64bit(struct slot *slot)
82 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
85 static inline int is_slot66mhz(struct slot *slot)
87 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
91 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
92 * @begin: begin pointer for region to be scanned.
93 * @end: end pointer for region to be scanned.
95 * Returns pointer to the head of the SMBIOS tables (or %NULL).
97 static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
101 u8 temp1, temp2, temp3, temp4;
104 endp = (end - sizeof(u32) + 1);
106 for (fp = begin; fp <= endp; fp += 16) {
123 dbg("Discovered SMBIOS Entry point at %p\n", fp);
129 * init_SERR - Initializes the per slot SERR generation.
130 * @ctrl: controller to use
132 * For unexpected switch opens
134 static int init_SERR(struct controller * ctrl)
143 tempdword = ctrl->first_slot;
145 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
146 /* Loop through slots */
147 while (number_of_slots) {
148 physical_slot = tempdword;
149 writeb(0, ctrl->hpc_reg + SLOT_SERR);
157 /* nice debugging output */
158 static int pci_print_IRQ_route (void)
160 struct irq_routing_table *routing_table;
164 u8 tbus, tdevice, tslot;
166 routing_table = pcibios_get_irq_routing_table();
167 if (routing_table == NULL) {
168 err("No BIOS Routing Table??? Not good\n");
172 len = (routing_table->size - sizeof(struct irq_routing_table)) /
173 sizeof(struct irq_info);
174 /* Make sure I got at least one entry */
176 kfree(routing_table);
180 dbg("bus dev func slot\n");
182 for (loop = 0; loop < len; ++loop) {
183 tbus = routing_table->slots[loop].bus;
184 tdevice = routing_table->slots[loop].devfn;
185 tslot = routing_table->slots[loop].slot;
186 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
189 kfree(routing_table);
195 * get_subsequent_smbios_entry: get the next entry from bios table.
196 * @smbios_start: where to start in the SMBIOS table
197 * @smbios_table: location of the SMBIOS table
198 * @curr: %NULL or pointer to previously returned structure
200 * Gets the first entry if previous == NULL;
201 * otherwise, returns the next entry.
202 * Uses global SMBIOS Table pointer.
204 * Returns a pointer to an SMBIOS structure or NULL if none found.
206 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
207 void __iomem *smbios_table,
211 u8 previous_byte = 1;
212 void __iomem *p_temp;
215 if (!smbios_table || !curr)
218 /* set p_max to the end of the table */
219 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
222 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
224 while ((p_temp < p_max) && !bail) {
225 /* Look for the double NULL terminator
226 * The first condition is the previous byte
227 * and the second is the curr
229 if (!previous_byte && !(readb(p_temp)))
232 previous_byte = readb(p_temp);
244 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
245 * @smbios_start: where to start in the SMBIOS table
246 * @smbios_table: location of the SMBIOS table
247 * @type: SMBIOS structure type to be returned
248 * @previous: %NULL or pointer to previously returned structure
250 * Gets the first entry of the specified type if previous == %NULL;
251 * Otherwise, returns the next entry of the given type.
252 * Uses global SMBIOS Table pointer.
253 * Uses get_subsequent_smbios_entry.
255 * Returns a pointer to an SMBIOS structure or %NULL if none found.
257 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
258 void __iomem *smbios_table,
260 void __iomem *previous)
266 previous = smbios_start;
268 previous = get_subsequent_smbios_entry(smbios_start,
269 smbios_table, previous);
272 if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
273 previous = get_subsequent_smbios_entry(smbios_start,
274 smbios_table, previous);
281 static void release_slot(struct hotplug_slot *hotplug_slot)
283 struct slot *slot = hotplug_slot->private;
285 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
287 kfree(slot->hotplug_slot->info);
288 kfree(slot->hotplug_slot);
292 static int ctrl_slot_cleanup (struct controller * ctrl)
294 struct slot *old_slot, *next_slot;
296 old_slot = ctrl->slot;
300 /* memory will be freed by the release_slot callback */
301 next_slot = old_slot->next;
302 pci_hp_deregister (old_slot->hotplug_slot);
303 old_slot = next_slot;
306 cpqhp_remove_debugfs_files(ctrl);
308 /* Free IRQ associated with hot plug device */
309 free_irq(ctrl->interrupt, ctrl);
310 /* Unmap the memory */
311 iounmap(ctrl->hpc_reg);
312 /* Finally reclaim PCI mem */
313 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
314 pci_resource_len(ctrl->pci_dev, 0));
321 * get_slot_mapping - determine logical slot mapping for PCI device
323 * Won't work for more than one PCI-PCI bridge in a slot.
325 * @bus_num - bus number of PCI device
326 * @dev_num - device number of PCI device
327 * @slot - Pointer to u8 where slot number will be returned
329 * Output: SUCCESS or FAILURE
332 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
334 struct irq_routing_table *PCIIRQRoutingInfoLength;
339 u8 tbus, tdevice, tslot, bridgeSlot;
341 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
345 PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
346 if (!PCIIRQRoutingInfoLength)
349 len = (PCIIRQRoutingInfoLength->size -
350 sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
351 /* Make sure I got at least one entry */
353 kfree(PCIIRQRoutingInfoLength);
357 for (loop = 0; loop < len; ++loop) {
358 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
359 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
360 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
362 if ((tbus == bus_num) && (tdevice == dev_num)) {
364 kfree(PCIIRQRoutingInfoLength);
367 /* Did not get a match on the target PCI device. Check
368 * if the current IRQ table entry is a PCI-to-PCI
369 * bridge device. If so, and it's secondary bus
370 * matches the bus number for the target device, I need
371 * to save the bridge's slot number. If I can not find
372 * an entry for the target device, I will have to
373 * assume it's on the other side of the bridge, and
374 * assign it the bridge's slot.
377 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
378 PCI_CLASS_REVISION, &work);
380 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
381 pci_bus_read_config_dword(bus,
382 PCI_DEVFN(tdevice, 0),
383 PCI_PRIMARY_BUS, &work);
384 // See if bridge's secondary bus matches target bus.
385 if (((work >> 8) & 0x000000FF) == (long) bus_num)
392 /* If we got here, we didn't find an entry in the IRQ mapping table for
393 * the target PCI device. If we did determine that the target device
394 * is on the other side of a PCI-to-PCI bridge, return the slot number
397 if (bridgeSlot != 0xFF) {
399 kfree(PCIIRQRoutingInfoLength);
402 kfree(PCIIRQRoutingInfoLength);
403 /* Couldn't find an entry in the routing table for this PCI device */
409 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
410 * @ctrl: struct controller to use
411 * @func: PCI device/function info
412 * @status: LED control flag: 1 = LED on, 0 = LED off
415 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
423 hp_slot = func->device - ctrl->slot_device_offset;
425 /* Wait for exclusive access to hardware */
426 mutex_lock(&ctrl->crit_sect);
429 amber_LED_on (ctrl, hp_slot);
430 else if (status == 0)
431 amber_LED_off (ctrl, hp_slot);
433 /* Done with exclusive hardware access */
434 mutex_unlock(&ctrl->crit_sect);
440 /* Wait for SOBS to be unset */
441 wait_for_ctrl_irq (ctrl);
443 /* Done with exclusive hardware access */
444 mutex_unlock(&ctrl->crit_sect);
451 * set_attention_status - Turns the Amber LED for a slot on or off
452 * @hotplug_slot: slot to change LED on
453 * @status: LED control flag
455 static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
457 struct pci_func *slot_func;
458 struct slot *slot = hotplug_slot->private;
459 struct controller *ctrl = slot->ctrl;
465 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
467 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
471 function = devfn & 0x7;
472 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
474 slot_func = cpqhp_slot_find(bus, device, function);
478 return cpqhp_set_attention_status(ctrl, slot_func, status);
482 static int process_SI(struct hotplug_slot *hotplug_slot)
484 struct pci_func *slot_func;
485 struct slot *slot = hotplug_slot->private;
486 struct controller *ctrl = slot->ctrl;
492 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
494 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
498 function = devfn & 0x7;
499 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
501 slot_func = cpqhp_slot_find(bus, device, function);
505 slot_func->bus = bus;
506 slot_func->device = device;
507 slot_func->function = function;
508 slot_func->configured = 0;
509 dbg("board_added(%p, %p)\n", slot_func, ctrl);
510 return cpqhp_process_SI(ctrl, slot_func);
514 static int process_SS(struct hotplug_slot *hotplug_slot)
516 struct pci_func *slot_func;
517 struct slot *slot = hotplug_slot->private;
518 struct controller *ctrl = slot->ctrl;
524 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
526 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
530 function = devfn & 0x7;
531 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
533 slot_func = cpqhp_slot_find(bus, device, function);
537 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
538 return cpqhp_process_SS(ctrl, slot_func);
542 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
544 struct slot *slot = hotplug_slot->private;
545 struct controller *ctrl = slot->ctrl;
547 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
549 return cpqhp_hardware_test(ctrl, value);
553 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
555 struct slot *slot = hotplug_slot->private;
556 struct controller *ctrl = slot->ctrl;
558 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
560 *value = get_slot_enabled(ctrl, slot);
564 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
566 struct slot *slot = hotplug_slot->private;
567 struct controller *ctrl = slot->ctrl;
569 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
571 *value = cpq_get_attention_status(ctrl, slot);
575 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
577 struct slot *slot = hotplug_slot->private;
578 struct controller *ctrl = slot->ctrl;
580 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
582 *value = cpq_get_latch_status(ctrl, slot);
587 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
589 struct slot *slot = hotplug_slot->private;
590 struct controller *ctrl = slot->ctrl;
592 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
594 *value = get_presence_status(ctrl, slot);
599 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
601 struct slot *slot = hotplug_slot->private;
602 struct controller *ctrl = slot->ctrl;
604 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
606 *value = ctrl->speed_capability;
611 static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
613 struct slot *slot = hotplug_slot->private;
614 struct controller *ctrl = slot->ctrl;
616 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
618 *value = ctrl->speed;
623 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
624 .owner = THIS_MODULE,
625 .set_attention_status = set_attention_status,
626 .enable_slot = process_SI,
627 .disable_slot = process_SS,
628 .hardware_test = hardware_test,
629 .get_power_status = get_power_status,
630 .get_attention_status = get_attention_status,
631 .get_latch_status = get_latch_status,
632 .get_adapter_status = get_adapter_status,
633 .get_max_bus_speed = get_max_bus_speed,
634 .get_cur_bus_speed = get_cur_bus_speed,
637 #define SLOT_NAME_SIZE 10
639 static int ctrl_slot_setup(struct controller *ctrl,
640 void __iomem *smbios_start,
641 void __iomem *smbios_table)
644 struct hotplug_slot *hotplug_slot;
645 struct hotplug_slot_info *hotplug_slot_info;
651 char name[SLOT_NAME_SIZE];
652 void __iomem *slot_entry= NULL;
653 int result = -ENOMEM;
655 dbg("%s\n", __func__);
657 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
659 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
660 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
661 slot_number = ctrl->first_slot;
663 while (number_of_slots) {
664 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
668 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
670 if (!slot->hotplug_slot)
672 hotplug_slot = slot->hotplug_slot;
674 hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
676 if (!hotplug_slot->info)
678 hotplug_slot_info = hotplug_slot->info;
681 slot->bus = ctrl->bus;
682 slot->device = slot_device;
683 slot->number = slot_number;
684 dbg("slot->number = %u\n", slot->number);
686 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
689 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
691 slot_entry = get_SMBIOS_entry(smbios_start,
692 smbios_table, 9, slot_entry);
695 slot->p_sm_slot = slot_entry;
697 init_timer(&slot->task_event);
698 slot->task_event.expires = jiffies + 5 * HZ;
699 slot->task_event.function = cpqhp_pushbutton_thread;
701 /*FIXME: these capabilities aren't used but if they are
702 * they need to be correctly implemented
704 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
705 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
707 if (is_slot64bit(slot))
708 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
709 if (is_slot66mhz(slot))
710 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
711 if (ctrl->speed == PCI_SPEED_66MHz)
712 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
715 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
718 slot->capabilities |=
719 ((((~tempdword) >> 23) |
720 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
721 /* Check the switch state */
722 slot->capabilities |=
723 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
724 /* Check the slot enable */
725 slot->capabilities |=
726 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
728 /* register this slot with the hotplug pci core */
729 hotplug_slot->release = &release_slot;
730 hotplug_slot->private = slot;
731 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
732 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
734 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
735 hotplug_slot_info->attention_status =
736 cpq_get_attention_status(ctrl, slot);
737 hotplug_slot_info->latch_status =
738 cpq_get_latch_status(ctrl, slot);
739 hotplug_slot_info->adapter_status =
740 get_presence_status(ctrl, slot);
742 dbg("registering bus %d, dev %d, number %d, "
743 "ctrl->slot_device_offset %d, slot %d\n",
744 slot->bus, slot->device,
745 slot->number, ctrl->slot_device_offset,
747 result = pci_hp_register(hotplug_slot,
752 err("pci_hp_register failed with error %d\n", result);
756 slot->next = ctrl->slot;
766 kfree(hotplug_slot_info);
775 static int one_time_init(void)
785 retval = pci_print_IRQ_route();
789 dbg("Initialize + Start the notification mechanism \n");
791 retval = cpqhp_event_start_thread();
795 dbg("Initialize slot lists\n");
796 for (loop = 0; loop < 256; loop++)
797 cpqhp_slot_list[loop] = NULL;
799 /* FIXME: We also need to hook the NMI handler eventually.
800 * this also needs to be worked with Christoph
801 * register_NMI_handler();
803 /* Map rom address */
804 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
805 if (!cpqhp_rom_start) {
806 err ("Could not ioremap memory region for ROM\n");
811 /* Now, map the int15 entry point if we are on compaq specific
814 compaq_nvram_init(cpqhp_rom_start);
816 /* Map smbios table entry point structure */
817 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
818 cpqhp_rom_start + ROM_PHY_LEN);
820 err ("Could not find the SMBIOS pointer in memory\n");
822 goto error_rom_start;
825 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
826 readw(smbios_table + ST_LENGTH));
828 err ("Could not ioremap memory region taken from SMBIOS values\n");
830 goto error_smbios_start;
838 iounmap(smbios_start);
840 iounmap(cpqhp_rom_start);
845 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
854 u16 subsystem_deviceid;
856 struct controller *ctrl;
857 struct pci_func *func;
860 err = pci_enable_device(pdev);
862 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
863 pci_name(pdev), err);
867 /* Need to read VID early b/c it's used to differentiate CPQ and INTC
870 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
871 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
872 err(msg_HPC_non_compaq_or_intel);
874 goto err_disable_device;
876 dbg("Vendor ID: %x\n", vendor_id);
878 dbg("revision: %d\n", pdev->revision);
879 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
880 err(msg_HPC_rev_error);
882 goto err_disable_device;
885 /* Check for the proper subsytem ID's
886 * Intel uses a different SSID programming model than Compaq.
887 * For Intel, each SSID bit identifies a PHP capability.
888 * Also Intel HPC's may have RID=0.
890 if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
891 /* TODO: This code can be made to support non-Compaq or Intel
894 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
896 err("%s : pci_read_config_word failed\n", __func__);
897 goto err_disable_device;
899 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
900 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
901 err(msg_HPC_non_compaq_or_intel);
903 goto err_disable_device;
906 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
908 err("%s : out of memory\n", __func__);
910 goto err_disable_device;
913 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
915 err("%s : pci_read_config_word failed\n", __func__);
919 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
921 /* Set Vendor ID, so it can be accessed later from other
924 ctrl->vendor_id = vendor_id;
926 switch (subsystem_vid) {
927 case PCI_VENDOR_ID_COMPAQ:
928 if (pdev->revision >= 0x13) { /* CIOBX */
930 ctrl->slot_switch_type = 1;
931 ctrl->push_button = 1;
932 ctrl->pci_config_space = 1;
933 ctrl->defeature_PHP = 1;
934 ctrl->pcix_support = 1;
935 ctrl->pcix_speed_capability = 1;
936 pci_read_config_byte(pdev, 0x41, &bus_cap);
937 if (bus_cap & 0x80) {
938 dbg("bus max supports 133MHz PCI-X\n");
939 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
942 if (bus_cap & 0x40) {
943 dbg("bus max supports 100MHz PCI-X\n");
944 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
948 dbg("bus max supports 66MHz PCI-X\n");
949 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
953 dbg("bus max supports 66MHz PCI\n");
954 ctrl->speed_capability = PCI_SPEED_66MHz;
961 switch (subsystem_deviceid) {
963 /* Original 6500/7000 implementation */
964 ctrl->slot_switch_type = 1;
965 ctrl->speed_capability = PCI_SPEED_33MHz;
966 ctrl->push_button = 0;
967 ctrl->pci_config_space = 1;
968 ctrl->defeature_PHP = 1;
969 ctrl->pcix_support = 0;
970 ctrl->pcix_speed_capability = 0;
972 case PCI_SUB_HPC_ID2:
973 /* First Pushbutton implementation */
975 ctrl->slot_switch_type = 1;
976 ctrl->speed_capability = PCI_SPEED_33MHz;
977 ctrl->push_button = 1;
978 ctrl->pci_config_space = 1;
979 ctrl->defeature_PHP = 1;
980 ctrl->pcix_support = 0;
981 ctrl->pcix_speed_capability = 0;
983 case PCI_SUB_HPC_ID_INTC:
984 /* Third party (6500/7000) */
985 ctrl->slot_switch_type = 1;
986 ctrl->speed_capability = PCI_SPEED_33MHz;
987 ctrl->push_button = 0;
988 ctrl->pci_config_space = 1;
989 ctrl->defeature_PHP = 1;
990 ctrl->pcix_support = 0;
991 ctrl->pcix_speed_capability = 0;
993 case PCI_SUB_HPC_ID3:
994 /* First 66 Mhz implementation */
996 ctrl->slot_switch_type = 1;
997 ctrl->speed_capability = PCI_SPEED_66MHz;
998 ctrl->push_button = 1;
999 ctrl->pci_config_space = 1;
1000 ctrl->defeature_PHP = 1;
1001 ctrl->pcix_support = 0;
1002 ctrl->pcix_speed_capability = 0;
1004 case PCI_SUB_HPC_ID4:
1005 /* First PCI-X implementation, 100MHz */
1006 ctrl->push_flag = 1;
1007 ctrl->slot_switch_type = 1;
1008 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
1009 ctrl->push_button = 1;
1010 ctrl->pci_config_space = 1;
1011 ctrl->defeature_PHP = 1;
1012 ctrl->pcix_support = 1;
1013 ctrl->pcix_speed_capability = 0;
1016 err(msg_HPC_not_supported);
1022 case PCI_VENDOR_ID_INTEL:
1023 /* Check for speed capability (0=33, 1=66) */
1024 if (subsystem_deviceid & 0x0001) {
1025 ctrl->speed_capability = PCI_SPEED_66MHz;
1027 ctrl->speed_capability = PCI_SPEED_33MHz;
1030 /* Check for push button */
1031 if (subsystem_deviceid & 0x0002) {
1032 /* no push button */
1033 ctrl->push_button = 0;
1035 /* push button supported */
1036 ctrl->push_button = 1;
1039 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
1040 if (subsystem_deviceid & 0x0004) {
1042 ctrl->slot_switch_type = 0;
1045 ctrl->slot_switch_type = 1;
1048 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
1049 if (subsystem_deviceid & 0x0008) {
1050 ctrl->defeature_PHP = 1; /* PHP supported */
1052 ctrl->defeature_PHP = 0; /* PHP not supported */
1055 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
1056 if (subsystem_deviceid & 0x0010) {
1057 ctrl->alternate_base_address = 1; /* supported */
1059 ctrl->alternate_base_address = 0; /* not supported */
1062 /* PCI Config Space Index (0=not supported, 1=supported) */
1063 if (subsystem_deviceid & 0x0020) {
1064 ctrl->pci_config_space = 1; /* supported */
1066 ctrl->pci_config_space = 0; /* not supported */
1070 if (subsystem_deviceid & 0x0080) {
1072 ctrl->pcix_support = 1;
1073 /* Frequency of operation in PCI-X mode */
1074 if (subsystem_deviceid & 0x0040) {
1075 /* 133MHz PCI-X if bit 7 is 1 */
1076 ctrl->pcix_speed_capability = 1;
1078 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1079 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1080 ctrl->pcix_speed_capability = 0;
1083 /* Conventional PCI */
1084 ctrl->pcix_support = 0;
1085 ctrl->pcix_speed_capability = 0;
1090 err(msg_HPC_not_supported);
1096 err(msg_HPC_not_supported);
1100 /* Tell the user that we found one. */
1101 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1104 dbg("Hotplug controller capabilities:\n");
1105 dbg(" speed_capability %d\n", ctrl->speed_capability);
1106 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1107 "switch present" : "no switch");
1108 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1109 "PHP supported" : "PHP not supported");
1110 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1111 "supported" : "not supported");
1112 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1113 "supported" : "not supported");
1114 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1115 "supported" : "not supported");
1116 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1117 "supported" : "not supported");
1119 ctrl->pci_dev = pdev;
1120 pci_set_drvdata(pdev, ctrl);
1122 /* make our own copy of the pci bus structure,
1123 * as we like tweaking it a lot */
1124 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
1125 if (!ctrl->pci_bus) {
1126 err("out of memory\n");
1130 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
1132 ctrl->bus = pdev->bus->number;
1133 ctrl->rev = pdev->revision;
1134 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1135 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1137 mutex_init(&ctrl->crit_sect);
1138 init_waitqueue_head(&ctrl->queue);
1140 /* initialize our threads if they haven't already been started up */
1141 rc = one_time_init();
1146 dbg("pdev = %p\n", pdev);
1147 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1148 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1150 if (!request_mem_region(pci_resource_start(pdev, 0),
1151 pci_resource_len(pdev, 0), MY_NAME)) {
1152 err("cannot reserve MMIO region\n");
1157 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1158 pci_resource_len(pdev, 0));
1159 if (!ctrl->hpc_reg) {
1160 err("cannot remap MMIO region %llx @ %llx\n",
1161 (unsigned long long)pci_resource_len(pdev, 0),
1162 (unsigned long long)pci_resource_start(pdev, 0));
1164 goto err_free_mem_region;
1167 // Check for 66Mhz operation
1168 ctrl->speed = get_controller_speed(ctrl);
1171 /********************************************************
1173 * Save configuration headers for this and
1174 * subordinate PCI buses
1176 ********************************************************/
1178 /* find the physical slot number of the first hot plug slot */
1180 /* Get slot won't work for devices behind bridges, but
1181 * in this case it will always be called for the "base"
1182 * bus/dev/func of a slot.
1183 * CS: this is leveraging the PCIIRQ routing code from the kernel
1184 * (pci-pc.c: get_irq_routing_table) */
1185 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1186 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1187 &(ctrl->first_slot));
1188 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1189 ctrl->first_slot, rc);
1191 err(msg_initialization_err, rc);
1195 /* Store PCI Config Space for all devices on this bus */
1196 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1198 err("%s: unable to save PCI configuration data, error %d\n",
1204 * Get IO, memory, and IRQ resources for new devices
1206 /* The next line is required for cpqhp_find_available_resources */
1207 ctrl->interrupt = pdev->irq;
1208 if (ctrl->interrupt < 0x10) {
1209 cpqhp_legacy_mode = 1;
1210 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1213 ctrl->cfgspc_irq = 0;
1214 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1216 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1217 ctrl->add_support = !rc;
1219 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1220 err("unable to locate PCI configuration resources for hot plug add.\n");
1225 * Finish setting up the hot plug ctrl device
1227 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1228 dbg("NumSlots %d \n", ctrl->slot_device_offset);
1230 ctrl->next_event = 0;
1232 /* Setup the slot information structures */
1233 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1235 err(msg_initialization_err, 6);
1236 err("%s: unable to save PCI configuration data, error %d\n",
1241 /* Mask all general input interrupts */
1242 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1244 /* set up the interrupt */
1245 dbg("HPC interrupt = %d \n", ctrl->interrupt);
1246 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1247 IRQF_SHARED, MY_NAME, ctrl)) {
1248 err("Can't get irq %d for the hotplug pci controller\n",
1254 /* Enable Shift Out interrupt and clear it, also enable SERR on power
1257 temp_word = readw(ctrl->hpc_reg + MISC);
1258 temp_word |= 0x4006;
1259 writew(temp_word, ctrl->hpc_reg + MISC);
1261 /* Changed 05/05/97 to clear all interrupts at start */
1262 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1264 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1266 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1268 if (!cpqhp_ctrl_list) {
1269 cpqhp_ctrl_list = ctrl;
1272 ctrl->next = cpqhp_ctrl_list;
1273 cpqhp_ctrl_list = ctrl;
1276 /* turn off empty slots here unless command line option "ON" set
1277 * Wait for exclusive access to hardware
1279 mutex_lock(&ctrl->crit_sect);
1281 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1283 /* find first device number for the ctrl */
1284 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1286 while (num_of_slots) {
1287 dbg("num_of_slots: %d\n", num_of_slots);
1288 func = cpqhp_slot_find(ctrl->bus, device, 0);
1292 hp_slot = func->device - ctrl->slot_device_offset;
1293 dbg("hp_slot: %d\n", hp_slot);
1295 /* We have to save the presence info for these slots */
1296 temp_word = ctrl->ctrl_int_comp >> 16;
1297 func->presence_save = (temp_word >> hp_slot) & 0x01;
1298 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1300 if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
1301 func->switch_save = 0;
1303 func->switch_save = 0x10;
1306 if (!func->is_a_board) {
1307 green_LED_off(ctrl, hp_slot);
1308 slot_disable(ctrl, hp_slot);
1317 /* Wait for SOBS to be unset */
1318 wait_for_ctrl_irq(ctrl);
1321 rc = init_SERR(ctrl);
1323 err("init_SERR failed\n");
1324 mutex_unlock(&ctrl->crit_sect);
1328 /* Done with exclusive hardware access */
1329 mutex_unlock(&ctrl->crit_sect);
1331 cpqhp_create_debugfs_files(ctrl);
1336 free_irq(ctrl->interrupt, ctrl);
1338 iounmap(ctrl->hpc_reg);
1339 err_free_mem_region:
1340 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1342 kfree(ctrl->pci_bus);
1346 pci_disable_device(pdev);
1350 static void __exit unload_cpqphpd(void)
1352 struct pci_func *next;
1353 struct pci_func *TempSlot;
1356 struct controller *ctrl;
1357 struct controller *tctrl;
1358 struct pci_resource *res;
1359 struct pci_resource *tres;
1361 rc = compaq_nvram_store(cpqhp_rom_start);
1363 ctrl = cpqhp_ctrl_list;
1366 if (ctrl->hpc_reg) {
1368 rc = read_slot_enable (ctrl);
1370 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1371 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1373 misc = readw(ctrl->hpc_reg + MISC);
1375 writew(misc, ctrl->hpc_reg + MISC);
1378 ctrl_slot_cleanup(ctrl);
1380 res = ctrl->io_head;
1387 res = ctrl->mem_head;
1394 res = ctrl->p_mem_head;
1401 res = ctrl->bus_head;
1408 kfree (ctrl->pci_bus);
1415 for (loop = 0; loop < 256; loop++) {
1416 next = cpqhp_slot_list[loop];
1417 while (next != NULL) {
1418 res = next->io_head;
1425 res = next->mem_head;
1432 res = next->p_mem_head;
1439 res = next->bus_head;
1452 /* Stop the notification mechanism */
1454 cpqhp_event_stop_thread();
1456 /* unmap the rom address */
1457 if (cpqhp_rom_start)
1458 iounmap(cpqhp_rom_start);
1460 iounmap(smbios_start);
1463 static struct pci_device_id hpcd_pci_tbl[] = {
1465 /* handle any PCI Hotplug controller */
1466 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1469 /* no matter who makes it */
1470 .vendor = PCI_ANY_ID,
1471 .device = PCI_ANY_ID,
1472 .subvendor = PCI_ANY_ID,
1473 .subdevice = PCI_ANY_ID,
1475 }, { /* end: all zeroes */ }
1478 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1480 static struct pci_driver cpqhpc_driver = {
1481 .name = "compaq_pci_hotplug",
1482 .id_table = hpcd_pci_tbl,
1483 .probe = cpqhpc_probe,
1484 /* remove: cpqhpc_remove_one, */
1487 static int __init cpqhpc_init(void)
1491 cpqhp_debug = debug;
1493 info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
1494 cpqhp_initialize_debugfs();
1495 result = pci_register_driver(&cpqhpc_driver);
1496 dbg("pci_register_driver = %d\n", result);
1500 static void __exit cpqhpc_cleanup(void)
1502 dbg("unload_cpqphpd()\n");
1505 dbg("pci_unregister_driver\n");
1506 pci_unregister_driver(&cpqhpc_driver);
1507 cpqhp_shutdown_debugfs();
1510 module_init(cpqhpc_init);
1511 module_exit(cpqhpc_cleanup);