2 * i6300esb: Watchdog timer driver for Intel 6300ESB chipset
4 * (c) Copyright 2004 Google Inc.
5 * (c) Copyright 2005 David Härdeman <david@2gen.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 * based on i810-tco.c which is in turn based on softdog.c
14 * The timer is implemented in the following I/O controller hubs:
15 * (See the intel documentation on http://developer.intel.com.)
16 * 6300ESB chip : document number 300641-004
19 * Initial version 0.01
22 * 20050210 David Härdeman <david@2gen.com>
23 * Ported driver to kernel 2.6
27 * Includes, defines, variables, module parameters, ...
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
35 #include <linux/miscdevice.h>
36 #include <linux/watchdog.h>
37 #include <linux/platform_device.h>
38 #include <linux/init.h>
39 #include <linux/pci.h>
40 #include <linux/ioport.h>
41 #include <linux/uaccess.h>
44 /* Module and version information */
45 #define ESB_VERSION "0.04"
46 #define ESB_MODULE_NAME "i6300ESB timer"
47 #define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
48 #define PFX ESB_MODULE_NAME ": "
50 /* PCI configuration registers */
51 #define ESB_CONFIG_REG 0x60 /* Config register */
52 #define ESB_LOCK_REG 0x68 /* WDT lock register */
54 /* Memory mapped registers */
55 #define ESB_TIMER1_REG BASEADDR + 0x00 /* Timer1 value after each reset */
56 #define ESB_TIMER2_REG BASEADDR + 0x04 /* Timer2 value after each reset */
57 #define ESB_GINTSR_REG BASEADDR + 0x08 /* General Interrupt Status Register */
58 #define ESB_RELOAD_REG BASEADDR + 0x0c /* Reload register */
60 /* Lock register bits */
61 #define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */
62 #define ESB_WDT_ENABLE (0x01 << 1) /* Enable WDT */
63 #define ESB_WDT_LOCK (0x01 << 0) /* Lock (nowayout) */
65 /* Config register bits */
66 #define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */
67 #define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */
68 #define ESB_WDT_INTTYPE (0x11 << 0) /* Interrupt type on timer1 timeout */
70 /* Reload register bits */
71 #define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */
74 #define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
75 #define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
77 /* internal variables */
78 static void __iomem *BASEADDR;
79 static DEFINE_SPINLOCK(esb_lock); /* Guards the hardware */
80 static unsigned long timer_alive;
81 static struct pci_dev *esb_pci;
82 static unsigned short triggered; /* The status of the watchdog upon boot */
83 static char esb_expect_close;
84 static struct platform_device *esb_platform_device;
87 /* module parameters */
88 /* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
89 #define WATCHDOG_HEARTBEAT 30
90 static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
92 module_param(heartbeat, int, 0);
93 MODULE_PARM_DESC(heartbeat,
94 "Watchdog heartbeat in seconds. (1<heartbeat<2046, default="
95 __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
97 static int nowayout = WATCHDOG_NOWAYOUT;
98 module_param(nowayout, int, 0);
99 MODULE_PARM_DESC(nowayout,
100 "Watchdog cannot be stopped once started (default="
101 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
104 * Some i6300ESB specific functions
108 * Prepare for reloading the timer by unlocking the proper registers.
109 * This is performed by first writing 0x80 followed by 0x86 to the
110 * reload register. After this the appropriate registers can be written
111 * to once before they need to be unlocked again.
113 static inline void esb_unlock_registers(void)
115 writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
116 writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
119 static void esb_timer_start(void)
123 /* Enable or Enable + Lock? */
124 val = 0x02 | (nowayout ? 0x01 : 0x00);
125 pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
128 static int esb_timer_stop(void)
132 spin_lock(&esb_lock);
133 /* First, reset timers as suggested by the docs */
134 esb_unlock_registers();
135 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
136 /* Then disable the WDT */
137 pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
138 pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
139 spin_unlock(&esb_lock);
141 /* Returns 0 if the timer was disabled, non-zero otherwise */
145 static void esb_timer_keepalive(void)
147 spin_lock(&esb_lock);
148 esb_unlock_registers();
149 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
150 /* FIXME: Do we need to flush anything here? */
151 spin_unlock(&esb_lock);
154 static int esb_timer_set_heartbeat(int time)
158 if (time < 0x1 || time > (2 * 0x03ff))
161 spin_lock(&esb_lock);
163 /* We shift by 9, so if we are passed a value of 1 sec,
164 * val will be 1 << 9 = 512, then write that to two
165 * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
170 esb_unlock_registers();
171 writel(val, ESB_TIMER1_REG);
174 esb_unlock_registers();
175 writel(val, ESB_TIMER2_REG);
178 esb_unlock_registers();
179 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
181 /* FIXME: Do we need to flush everything out? */
185 spin_unlock(&esb_lock);
189 static int esb_timer_read(void)
193 /* This isn't documented, and doesn't take into
194 * acount which stage is running, but it looks
195 * like a 20 bit count down, so we might as well report it.
197 pci_read_config_dword(esb_pci, 0x64, &count);
202 * /dev/watchdog handling
205 static int esb_open(struct inode *inode, struct file *file)
207 /* /dev/watchdog can only be opened once */
208 if (test_and_set_bit(0, &timer_alive))
211 /* Reload and activate timer */
212 esb_timer_keepalive();
215 return nonseekable_open(inode, file);
218 static int esb_release(struct inode *inode, struct file *file)
220 /* Shut off the timer. */
221 if (esb_expect_close == 42)
225 "Unexpected close, not stopping watchdog!\n");
226 esb_timer_keepalive();
228 clear_bit(0, &timer_alive);
229 esb_expect_close = 0;
233 static ssize_t esb_write(struct file *file, const char __user *data,
234 size_t len, loff_t *ppos)
236 /* See if we got the magic character 'V' and reload the timer */
241 /* note: just in case someone wrote the magic character
242 * five months ago... */
243 esb_expect_close = 0;
245 /* scan to see whether or not we got the
247 for (i = 0; i != len; i++) {
249 if (get_user(c, data + i))
252 esb_expect_close = 42;
256 /* someone wrote to us, we should reload the timer */
257 esb_timer_keepalive();
262 static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
264 int new_options, retval = -EINVAL;
266 void __user *argp = (void __user *)arg;
267 int __user *p = argp;
268 static struct watchdog_info ident = {
269 .options = WDIOF_SETTIMEOUT |
270 WDIOF_KEEPALIVEPING |
272 .firmware_version = 0,
273 .identity = ESB_MODULE_NAME,
277 case WDIOC_GETSUPPORT:
278 return copy_to_user(argp, &ident,
279 sizeof(ident)) ? -EFAULT : 0;
281 case WDIOC_GETSTATUS:
282 return put_user(esb_timer_read(), p);
284 case WDIOC_GETBOOTSTATUS:
285 return put_user(triggered, p);
287 case WDIOC_SETOPTIONS:
289 if (get_user(new_options, p))
292 if (new_options & WDIOS_DISABLECARD) {
297 if (new_options & WDIOS_ENABLECARD) {
298 esb_timer_keepalive();
304 case WDIOC_KEEPALIVE:
305 esb_timer_keepalive();
308 case WDIOC_SETTIMEOUT:
310 if (get_user(new_heartbeat, p))
312 if (esb_timer_set_heartbeat(new_heartbeat))
314 esb_timer_keepalive();
317 case WDIOC_GETTIMEOUT:
318 return put_user(heartbeat, p);
328 static const struct file_operations esb_fops = {
329 .owner = THIS_MODULE,
332 .unlocked_ioctl = esb_ioctl,
334 .release = esb_release,
337 static struct miscdevice esb_miscdev = {
338 .minor = WATCHDOG_MINOR,
344 * Data for PCI driver interface
346 * This data only exists for exporting the supported
347 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
348 * register a pci_driver, because someone else might one day
349 * want to register another driver on the same PCI id.
351 static struct pci_device_id esb_pci_tbl[] = {
352 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
353 { 0, }, /* End of list */
355 MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
358 * Init & exit routines
361 static unsigned char __devinit esb_getdevice(void)
366 * Find the PCI device
369 esb_pci = pci_get_device(PCI_VENDOR_ID_INTEL,
370 PCI_DEVICE_ID_INTEL_ESB_9, NULL);
373 if (pci_enable_device(esb_pci)) {
374 printk(KERN_ERR PFX "failed to enable device\n");
378 if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) {
379 printk(KERN_ERR PFX "failed to request region\n");
383 BASEADDR = pci_ioremap_bar(esb_pci, 0);
384 if (BASEADDR == NULL) {
385 /* Something's wrong here, BASEADDR has to be set */
386 printk(KERN_ERR PFX "failed to get BASEADDR\n");
391 * The watchdog has two timers, it can be setup so that the
392 * expiry of timer1 results in an interrupt and the expiry of
393 * timer2 results in a reboot. We set it to not generate
394 * any interrupts as there is not much we can do with it
397 * We also enable reboots and set the timer frequency to
398 * the PCI clock divided by 2^15 (approx 1KHz).
400 pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
402 /* Check that the WDT isn't already locked */
403 pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
404 if (val1 & ESB_WDT_LOCK)
405 printk(KERN_WARNING PFX "nowayout already set\n");
407 /* Set the timer to watchdog mode and disable it for now */
408 pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
410 /* Check if the watchdog was previously triggered */
411 esb_unlock_registers();
412 val2 = readw(ESB_RELOAD_REG);
413 triggered = (val2 & (0x01 << 9) >> 9);
415 /* Reset trigger flag and timers */
416 esb_unlock_registers();
417 writew((0x11 << 8), ESB_RELOAD_REG);
423 pci_release_region(esb_pci, 0);
425 pci_disable_device(esb_pci);
427 pci_dev_put(esb_pci);
432 static int __devinit esb_probe(struct platform_device *dev)
436 /* Check whether or not the hardware watchdog is there */
437 if (!esb_getdevice() || esb_pci == NULL)
440 /* Check that the heartbeat value is within it's range;
441 if not reset to the default */
442 if (esb_timer_set_heartbeat(heartbeat)) {
443 esb_timer_set_heartbeat(WATCHDOG_HEARTBEAT);
445 "heartbeat value must be 1<heartbeat<2046, using %d\n",
449 ret = misc_register(&esb_miscdev);
452 "cannot register miscdev on minor=%d (err=%d)\n",
453 WATCHDOG_MINOR, ret);
458 "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
459 BASEADDR, heartbeat, nowayout);
465 pci_release_region(esb_pci, 0);
467 pci_disable_device(esb_pci);
469 pci_dev_put(esb_pci);
473 static int __devexit esb_remove(struct platform_device *dev)
475 /* Stop the timer before we leave */
480 misc_deregister(&esb_miscdev);
482 pci_release_region(esb_pci, 0);
483 pci_disable_device(esb_pci);
484 pci_dev_put(esb_pci);
488 static void esb_shutdown(struct platform_device *dev)
493 static struct platform_driver esb_platform_driver = {
495 .remove = __devexit_p(esb_remove),
496 .shutdown = esb_shutdown,
498 .owner = THIS_MODULE,
499 .name = ESB_MODULE_NAME,
503 static int __init watchdog_init(void)
507 printk(KERN_INFO PFX "Intel 6300ESB WatchDog Timer Driver v%s\n",
510 err = platform_driver_register(&esb_platform_driver);
514 esb_platform_device = platform_device_register_simple(ESB_MODULE_NAME,
516 if (IS_ERR(esb_platform_device)) {
517 err = PTR_ERR(esb_platform_device);
518 goto unreg_platform_driver;
523 unreg_platform_driver:
524 platform_driver_unregister(&esb_platform_driver);
528 static void __exit watchdog_cleanup(void)
530 platform_device_unregister(esb_platform_device);
531 platform_driver_unregister(&esb_platform_driver);
532 printk(KERN_INFO PFX "Watchdog Module Unloaded.\n");
535 module_init(watchdog_init);
536 module_exit(watchdog_cleanup);
538 MODULE_AUTHOR("Ross Biro and David Härdeman");
539 MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
540 MODULE_LICENSE("GPL");
541 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);