2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
41 #include <asm/uaccess.h>
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
112 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
113 { "largepages", VM_STAT(lpages) },
117 unsigned long segment_base(u16 selector)
119 struct descriptor_table gdt;
120 struct desc_struct *d;
121 unsigned long table_base;
127 asm("sgdt %0" : "=m"(gdt));
128 table_base = gdt.base;
130 if (selector & 4) { /* from ldt */
133 asm("sldt %0" : "=g"(ldt_selector));
134 table_base = segment_base(ldt_selector);
136 d = (struct desc_struct *)(table_base + (selector & ~7));
137 v = d->base0 | ((unsigned long)d->base1 << 16) |
138 ((unsigned long)d->base2 << 24);
140 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
141 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
145 EXPORT_SYMBOL_GPL(segment_base);
147 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
149 if (irqchip_in_kernel(vcpu->kvm))
150 return vcpu->arch.apic_base;
152 return vcpu->arch.apic_base;
154 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
156 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
158 /* TODO: reserve bits check */
159 if (irqchip_in_kernel(vcpu->kvm))
160 kvm_lapic_set_base(vcpu, data);
162 vcpu->arch.apic_base = data;
164 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
166 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
168 WARN_ON(vcpu->arch.exception.pending);
169 vcpu->arch.exception.pending = true;
170 vcpu->arch.exception.has_error_code = false;
171 vcpu->arch.exception.nr = nr;
173 EXPORT_SYMBOL_GPL(kvm_queue_exception);
175 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
178 ++vcpu->stat.pf_guest;
180 if (vcpu->arch.exception.pending) {
181 if (vcpu->arch.exception.nr == PF_VECTOR) {
182 printk(KERN_DEBUG "kvm: inject_page_fault:"
183 " double fault 0x%lx\n", addr);
184 vcpu->arch.exception.nr = DF_VECTOR;
185 vcpu->arch.exception.error_code = 0;
186 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
187 /* triple fault -> shutdown */
188 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
192 vcpu->arch.cr2 = addr;
193 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
196 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
198 vcpu->arch.nmi_pending = 1;
200 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
202 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
204 WARN_ON(vcpu->arch.exception.pending);
205 vcpu->arch.exception.pending = true;
206 vcpu->arch.exception.has_error_code = true;
207 vcpu->arch.exception.nr = nr;
208 vcpu->arch.exception.error_code = error_code;
210 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
212 static void __queue_exception(struct kvm_vcpu *vcpu)
214 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
215 vcpu->arch.exception.has_error_code,
216 vcpu->arch.exception.error_code);
220 * Load the pae pdptrs. Return true is they are all valid.
222 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
224 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
225 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
228 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
230 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
231 offset * sizeof(u64), sizeof(pdpte));
236 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
237 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
244 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
249 EXPORT_SYMBOL_GPL(load_pdptrs);
251 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
253 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
257 if (is_long_mode(vcpu) || !is_pae(vcpu))
260 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
263 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
269 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
271 if (cr0 & CR0_RESERVED_BITS) {
272 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
273 cr0, vcpu->arch.cr0);
274 kvm_inject_gp(vcpu, 0);
278 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
279 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
280 kvm_inject_gp(vcpu, 0);
284 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
285 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
286 "and a clear PE flag\n");
287 kvm_inject_gp(vcpu, 0);
291 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
293 if ((vcpu->arch.shadow_efer & EFER_LME)) {
297 printk(KERN_DEBUG "set_cr0: #GP, start paging "
298 "in long mode while PAE is disabled\n");
299 kvm_inject_gp(vcpu, 0);
302 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
304 printk(KERN_DEBUG "set_cr0: #GP, start paging "
305 "in long mode while CS.L == 1\n");
306 kvm_inject_gp(vcpu, 0);
312 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
313 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
315 kvm_inject_gp(vcpu, 0);
321 kvm_x86_ops->set_cr0(vcpu, cr0);
322 vcpu->arch.cr0 = cr0;
324 kvm_mmu_sync_global(vcpu);
325 kvm_mmu_reset_context(vcpu);
328 EXPORT_SYMBOL_GPL(kvm_set_cr0);
330 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
332 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
333 KVMTRACE_1D(LMSW, vcpu,
334 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
337 EXPORT_SYMBOL_GPL(kvm_lmsw);
339 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
341 unsigned long old_cr4 = vcpu->arch.cr4;
342 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
344 if (cr4 & CR4_RESERVED_BITS) {
345 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
346 kvm_inject_gp(vcpu, 0);
350 if (is_long_mode(vcpu)) {
351 if (!(cr4 & X86_CR4_PAE)) {
352 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
354 kvm_inject_gp(vcpu, 0);
357 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
358 && ((cr4 ^ old_cr4) & pdptr_bits)
359 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
360 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
361 kvm_inject_gp(vcpu, 0);
365 if (cr4 & X86_CR4_VMXE) {
366 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
367 kvm_inject_gp(vcpu, 0);
370 kvm_x86_ops->set_cr4(vcpu, cr4);
371 vcpu->arch.cr4 = cr4;
372 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
373 kvm_mmu_sync_global(vcpu);
374 kvm_mmu_reset_context(vcpu);
376 EXPORT_SYMBOL_GPL(kvm_set_cr4);
378 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
380 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
381 kvm_mmu_sync_roots(vcpu);
382 kvm_mmu_flush_tlb(vcpu);
386 if (is_long_mode(vcpu)) {
387 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
388 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
389 kvm_inject_gp(vcpu, 0);
394 if (cr3 & CR3_PAE_RESERVED_BITS) {
396 "set_cr3: #GP, reserved bits\n");
397 kvm_inject_gp(vcpu, 0);
400 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
401 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
403 kvm_inject_gp(vcpu, 0);
408 * We don't check reserved bits in nonpae mode, because
409 * this isn't enforced, and VMware depends on this.
414 * Does the new cr3 value map to physical memory? (Note, we
415 * catch an invalid cr3 even in real-mode, because it would
416 * cause trouble later on when we turn on paging anyway.)
418 * A real CPU would silently accept an invalid cr3 and would
419 * attempt to use it - with largely undefined (and often hard
420 * to debug) behavior on the guest side.
422 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
423 kvm_inject_gp(vcpu, 0);
425 vcpu->arch.cr3 = cr3;
426 vcpu->arch.mmu.new_cr3(vcpu);
429 EXPORT_SYMBOL_GPL(kvm_set_cr3);
431 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
433 if (cr8 & CR8_RESERVED_BITS) {
434 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
435 kvm_inject_gp(vcpu, 0);
438 if (irqchip_in_kernel(vcpu->kvm))
439 kvm_lapic_set_tpr(vcpu, cr8);
441 vcpu->arch.cr8 = cr8;
443 EXPORT_SYMBOL_GPL(kvm_set_cr8);
445 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
447 if (irqchip_in_kernel(vcpu->kvm))
448 return kvm_lapic_get_cr8(vcpu);
450 return vcpu->arch.cr8;
452 EXPORT_SYMBOL_GPL(kvm_get_cr8);
454 static inline u32 bit(int bitno)
456 return 1 << (bitno & 31);
460 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
461 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
463 * This list is modified at module load time to reflect the
464 * capabilities of the host cpu.
466 static u32 msrs_to_save[] = {
467 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
470 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
472 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
473 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
476 static unsigned num_msrs_to_save;
478 static u32 emulated_msrs[] = {
479 MSR_IA32_MISC_ENABLE,
482 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
484 if (efer & efer_reserved_bits) {
485 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
487 kvm_inject_gp(vcpu, 0);
492 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
493 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
494 kvm_inject_gp(vcpu, 0);
498 if (efer & EFER_FFXSR) {
499 struct kvm_cpuid_entry2 *feat;
501 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
502 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
503 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
504 kvm_inject_gp(vcpu, 0);
509 if (efer & EFER_SVME) {
510 struct kvm_cpuid_entry2 *feat;
512 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
513 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
514 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
515 kvm_inject_gp(vcpu, 0);
520 kvm_x86_ops->set_efer(vcpu, efer);
523 efer |= vcpu->arch.shadow_efer & EFER_LMA;
525 vcpu->arch.shadow_efer = efer;
527 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
528 kvm_mmu_reset_context(vcpu);
531 void kvm_enable_efer_bits(u64 mask)
533 efer_reserved_bits &= ~mask;
535 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
539 * Writes msr value into into the appropriate "register".
540 * Returns 0 on success, non-0 otherwise.
541 * Assumes vcpu_load() was already called.
543 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
545 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
549 * Adapt set_msr() to msr_io()'s calling convention
551 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
553 return kvm_set_msr(vcpu, index, *data);
556 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
559 struct pvclock_wall_clock wc;
560 struct timespec now, sys, boot;
567 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
570 * The guest calculates current wall clock time by adding
571 * system time (updated by kvm_write_guest_time below) to the
572 * wall clock specified here. guest system time equals host
573 * system time for us, thus we must fill in host boot time here.
575 now = current_kernel_time();
577 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
579 wc.sec = boot.tv_sec;
580 wc.nsec = boot.tv_nsec;
581 wc.version = version;
583 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
586 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
589 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
591 uint32_t quotient, remainder;
593 /* Don't try to replace with do_div(), this one calculates
594 * "(dividend << 32) / divisor" */
596 : "=a" (quotient), "=d" (remainder)
597 : "0" (0), "1" (dividend), "r" (divisor) );
601 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
603 uint64_t nsecs = 1000000000LL;
608 tps64 = tsc_khz * 1000LL;
609 while (tps64 > nsecs*2) {
614 tps32 = (uint32_t)tps64;
615 while (tps32 <= (uint32_t)nsecs) {
620 hv_clock->tsc_shift = shift;
621 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
623 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
624 __func__, tsc_khz, hv_clock->tsc_shift,
625 hv_clock->tsc_to_system_mul);
628 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
630 static void kvm_write_guest_time(struct kvm_vcpu *v)
634 struct kvm_vcpu_arch *vcpu = &v->arch;
637 if ((!vcpu->time_page))
641 if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
642 kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
643 vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
647 /* Keep irq disabled to prevent changes to the clock */
648 local_irq_save(flags);
649 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
650 &vcpu->hv_clock.tsc_timestamp);
652 local_irq_restore(flags);
654 /* With all the info we got, fill in the values */
656 vcpu->hv_clock.system_time = ts.tv_nsec +
657 (NSEC_PER_SEC * (u64)ts.tv_sec);
659 * The interface expects us to write an even number signaling that the
660 * update is finished. Since the guest won't see the intermediate
661 * state, we just increase by 2 at the end.
663 vcpu->hv_clock.version += 2;
665 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
667 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
668 sizeof(vcpu->hv_clock));
670 kunmap_atomic(shared_kaddr, KM_USER0);
672 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
675 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
677 struct kvm_vcpu_arch *vcpu = &v->arch;
679 if (!vcpu->time_page)
681 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
685 static bool msr_mtrr_valid(unsigned msr)
688 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
689 case MSR_MTRRfix64K_00000:
690 case MSR_MTRRfix16K_80000:
691 case MSR_MTRRfix16K_A0000:
692 case MSR_MTRRfix4K_C0000:
693 case MSR_MTRRfix4K_C8000:
694 case MSR_MTRRfix4K_D0000:
695 case MSR_MTRRfix4K_D8000:
696 case MSR_MTRRfix4K_E0000:
697 case MSR_MTRRfix4K_E8000:
698 case MSR_MTRRfix4K_F0000:
699 case MSR_MTRRfix4K_F8000:
700 case MSR_MTRRdefType:
701 case MSR_IA32_CR_PAT:
709 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
711 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
713 if (!msr_mtrr_valid(msr))
716 if (msr == MSR_MTRRdefType) {
717 vcpu->arch.mtrr_state.def_type = data;
718 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
719 } else if (msr == MSR_MTRRfix64K_00000)
721 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
722 p[1 + msr - MSR_MTRRfix16K_80000] = data;
723 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
724 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
725 else if (msr == MSR_IA32_CR_PAT)
726 vcpu->arch.pat = data;
727 else { /* Variable MTRRs */
728 int idx, is_mtrr_mask;
731 idx = (msr - 0x200) / 2;
732 is_mtrr_mask = msr - 0x200 - 2 * idx;
735 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
738 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
742 kvm_mmu_reset_context(vcpu);
746 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
750 set_efer(vcpu, data);
752 case MSR_IA32_MC0_STATUS:
753 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
756 case MSR_IA32_MCG_STATUS:
757 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
760 case MSR_IA32_MCG_CTL:
761 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
764 case MSR_IA32_DEBUGCTLMSR:
766 /* We support the non-activated case already */
768 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
769 /* Values other than LBR and BTF are vendor-specific,
770 thus reserved and should throw a #GP */
773 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
776 case MSR_IA32_UCODE_REV:
777 case MSR_IA32_UCODE_WRITE:
778 case MSR_VM_HSAVE_PA:
780 case 0x200 ... 0x2ff:
781 return set_msr_mtrr(vcpu, msr, data);
782 case MSR_IA32_APICBASE:
783 kvm_set_apic_base(vcpu, data);
785 case MSR_IA32_MISC_ENABLE:
786 vcpu->arch.ia32_misc_enable_msr = data;
788 case MSR_KVM_WALL_CLOCK:
789 vcpu->kvm->arch.wall_clock = data;
790 kvm_write_wall_clock(vcpu->kvm, data);
792 case MSR_KVM_SYSTEM_TIME: {
793 if (vcpu->arch.time_page) {
794 kvm_release_page_dirty(vcpu->arch.time_page);
795 vcpu->arch.time_page = NULL;
798 vcpu->arch.time = data;
800 /* we verify if the enable bit is set... */
804 /* ...but clean it before doing the actual write */
805 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
807 vcpu->arch.time_page =
808 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
810 if (is_error_page(vcpu->arch.time_page)) {
811 kvm_release_page_clean(vcpu->arch.time_page);
812 vcpu->arch.time_page = NULL;
815 kvm_request_guest_time_update(vcpu);
819 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
824 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
828 * Reads an msr value (of 'msr_index') into 'pdata'.
829 * Returns 0 on success, non-0 otherwise.
830 * Assumes vcpu_load() was already called.
832 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
834 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
837 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
839 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
841 if (!msr_mtrr_valid(msr))
844 if (msr == MSR_MTRRdefType)
845 *pdata = vcpu->arch.mtrr_state.def_type +
846 (vcpu->arch.mtrr_state.enabled << 10);
847 else if (msr == MSR_MTRRfix64K_00000)
849 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
850 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
851 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
852 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
853 else if (msr == MSR_IA32_CR_PAT)
854 *pdata = vcpu->arch.pat;
855 else { /* Variable MTRRs */
856 int idx, is_mtrr_mask;
859 idx = (msr - 0x200) / 2;
860 is_mtrr_mask = msr - 0x200 - 2 * idx;
863 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
866 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
873 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
878 case 0xc0010010: /* SYSCFG */
879 case 0xc0010015: /* HWCR */
880 case MSR_IA32_PLATFORM_ID:
881 case MSR_IA32_P5_MC_ADDR:
882 case MSR_IA32_P5_MC_TYPE:
883 case MSR_IA32_MC0_CTL:
884 case MSR_IA32_MCG_STATUS:
885 case MSR_IA32_MCG_CAP:
886 case MSR_IA32_MCG_CTL:
887 case MSR_IA32_MC0_MISC:
888 case MSR_IA32_MC0_MISC+4:
889 case MSR_IA32_MC0_MISC+8:
890 case MSR_IA32_MC0_MISC+12:
891 case MSR_IA32_MC0_MISC+16:
892 case MSR_IA32_MC0_MISC+20:
893 case MSR_IA32_UCODE_REV:
894 case MSR_IA32_EBL_CR_POWERON:
895 case MSR_IA32_DEBUGCTLMSR:
896 case MSR_IA32_LASTBRANCHFROMIP:
897 case MSR_IA32_LASTBRANCHTOIP:
898 case MSR_IA32_LASTINTFROMIP:
899 case MSR_IA32_LASTINTTOIP:
900 case MSR_VM_HSAVE_PA:
901 case MSR_P6_EVNTSEL0:
902 case MSR_P6_EVNTSEL1:
906 data = 0x500 | KVM_NR_VAR_MTRR;
908 case 0x200 ... 0x2ff:
909 return get_msr_mtrr(vcpu, msr, pdata);
910 case 0xcd: /* fsb frequency */
913 case MSR_IA32_APICBASE:
914 data = kvm_get_apic_base(vcpu);
916 case MSR_IA32_MISC_ENABLE:
917 data = vcpu->arch.ia32_misc_enable_msr;
919 case MSR_IA32_PERF_STATUS:
920 /* TSC increment by tick */
923 data |= (((uint64_t)4ULL) << 40);
926 data = vcpu->arch.shadow_efer;
928 case MSR_KVM_WALL_CLOCK:
929 data = vcpu->kvm->arch.wall_clock;
931 case MSR_KVM_SYSTEM_TIME:
932 data = vcpu->arch.time;
935 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
941 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
944 * Read or write a bunch of msrs. All parameters are kernel addresses.
946 * @return number of msrs set successfully.
948 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
949 struct kvm_msr_entry *entries,
950 int (*do_msr)(struct kvm_vcpu *vcpu,
951 unsigned index, u64 *data))
957 down_read(&vcpu->kvm->slots_lock);
958 for (i = 0; i < msrs->nmsrs; ++i)
959 if (do_msr(vcpu, entries[i].index, &entries[i].data))
961 up_read(&vcpu->kvm->slots_lock);
969 * Read or write a bunch of msrs. Parameters are user addresses.
971 * @return number of msrs set successfully.
973 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
974 int (*do_msr)(struct kvm_vcpu *vcpu,
975 unsigned index, u64 *data),
978 struct kvm_msrs msrs;
979 struct kvm_msr_entry *entries;
984 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
988 if (msrs.nmsrs >= MAX_IO_MSRS)
992 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
993 entries = vmalloc(size);
998 if (copy_from_user(entries, user_msrs->entries, size))
1001 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1006 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1017 int kvm_dev_ioctl_check_extension(long ext)
1022 case KVM_CAP_IRQCHIP:
1024 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1025 case KVM_CAP_SET_TSS_ADDR:
1026 case KVM_CAP_EXT_CPUID:
1027 case KVM_CAP_CLOCKSOURCE:
1029 case KVM_CAP_NOP_IO_DELAY:
1030 case KVM_CAP_MP_STATE:
1031 case KVM_CAP_SYNC_MMU:
1032 case KVM_CAP_REINJECT_CONTROL:
1033 case KVM_CAP_IRQ_INJECT_STATUS:
1034 case KVM_CAP_ASSIGN_DEV_IRQ:
1037 case KVM_CAP_COALESCED_MMIO:
1038 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1041 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1043 case KVM_CAP_NR_VCPUS:
1046 case KVM_CAP_NR_MEMSLOTS:
1047 r = KVM_MEMORY_SLOTS;
1049 case KVM_CAP_PV_MMU:
1063 long kvm_arch_dev_ioctl(struct file *filp,
1064 unsigned int ioctl, unsigned long arg)
1066 void __user *argp = (void __user *)arg;
1070 case KVM_GET_MSR_INDEX_LIST: {
1071 struct kvm_msr_list __user *user_msr_list = argp;
1072 struct kvm_msr_list msr_list;
1076 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1079 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1080 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1083 if (n < num_msrs_to_save)
1086 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1087 num_msrs_to_save * sizeof(u32)))
1089 if (copy_to_user(user_msr_list->indices
1090 + num_msrs_to_save * sizeof(u32),
1092 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1097 case KVM_GET_SUPPORTED_CPUID: {
1098 struct kvm_cpuid2 __user *cpuid_arg = argp;
1099 struct kvm_cpuid2 cpuid;
1102 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1104 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1105 cpuid_arg->entries);
1110 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1122 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1124 kvm_x86_ops->vcpu_load(vcpu, cpu);
1125 kvm_request_guest_time_update(vcpu);
1128 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1130 kvm_x86_ops->vcpu_put(vcpu);
1131 kvm_put_guest_fpu(vcpu);
1134 static int is_efer_nx(void)
1136 unsigned long long efer = 0;
1138 rdmsrl_safe(MSR_EFER, &efer);
1139 return efer & EFER_NX;
1142 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1145 struct kvm_cpuid_entry2 *e, *entry;
1148 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1149 e = &vcpu->arch.cpuid_entries[i];
1150 if (e->function == 0x80000001) {
1155 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1156 entry->edx &= ~(1 << 20);
1157 printk(KERN_INFO "kvm: guest NX capability removed\n");
1161 /* when an old userspace process fills a new kernel module */
1162 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1163 struct kvm_cpuid *cpuid,
1164 struct kvm_cpuid_entry __user *entries)
1167 struct kvm_cpuid_entry *cpuid_entries;
1170 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1173 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1177 if (copy_from_user(cpuid_entries, entries,
1178 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1180 for (i = 0; i < cpuid->nent; i++) {
1181 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1182 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1183 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1184 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1185 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1186 vcpu->arch.cpuid_entries[i].index = 0;
1187 vcpu->arch.cpuid_entries[i].flags = 0;
1188 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1189 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1190 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1192 vcpu->arch.cpuid_nent = cpuid->nent;
1193 cpuid_fix_nx_cap(vcpu);
1197 vfree(cpuid_entries);
1202 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1203 struct kvm_cpuid2 *cpuid,
1204 struct kvm_cpuid_entry2 __user *entries)
1209 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1212 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1213 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1215 vcpu->arch.cpuid_nent = cpuid->nent;
1222 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1223 struct kvm_cpuid2 *cpuid,
1224 struct kvm_cpuid_entry2 __user *entries)
1229 if (cpuid->nent < vcpu->arch.cpuid_nent)
1232 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1233 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1238 cpuid->nent = vcpu->arch.cpuid_nent;
1242 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1245 entry->function = function;
1246 entry->index = index;
1247 cpuid_count(entry->function, entry->index,
1248 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1252 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1253 u32 index, int *nent, int maxnent)
1255 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1256 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1257 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1258 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1259 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1260 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1261 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1262 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1263 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1264 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1265 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1266 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1267 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1268 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1269 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1270 bit(X86_FEATURE_PGE) |
1271 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1272 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1273 bit(X86_FEATURE_SYSCALL) |
1274 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1275 #ifdef CONFIG_X86_64
1276 bit(X86_FEATURE_LM) |
1278 bit(X86_FEATURE_FXSR_OPT) |
1279 bit(X86_FEATURE_MMXEXT) |
1280 bit(X86_FEATURE_3DNOWEXT) |
1281 bit(X86_FEATURE_3DNOW);
1282 const u32 kvm_supported_word3_x86_features =
1283 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1284 const u32 kvm_supported_word6_x86_features =
1285 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1286 bit(X86_FEATURE_SVM);
1288 /* all calls to cpuid_count() should be made on the same cpu */
1290 do_cpuid_1_ent(entry, function, index);
1295 entry->eax = min(entry->eax, (u32)0xb);
1298 entry->edx &= kvm_supported_word0_x86_features;
1299 entry->ecx &= kvm_supported_word3_x86_features;
1301 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1302 * may return different values. This forces us to get_cpu() before
1303 * issuing the first command, and also to emulate this annoying behavior
1304 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1306 int t, times = entry->eax & 0xff;
1308 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1309 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1310 for (t = 1; t < times && *nent < maxnent; ++t) {
1311 do_cpuid_1_ent(&entry[t], function, 0);
1312 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1317 /* function 4 and 0xb have additional index. */
1321 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1322 /* read more entries until cache_type is zero */
1323 for (i = 1; *nent < maxnent; ++i) {
1324 cache_type = entry[i - 1].eax & 0x1f;
1327 do_cpuid_1_ent(&entry[i], function, i);
1329 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1337 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1338 /* read more entries until level_type is zero */
1339 for (i = 1; *nent < maxnent; ++i) {
1340 level_type = entry[i - 1].ecx & 0xff00;
1343 do_cpuid_1_ent(&entry[i], function, i);
1345 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1351 entry->eax = min(entry->eax, 0x8000001a);
1354 entry->edx &= kvm_supported_word1_x86_features;
1355 entry->ecx &= kvm_supported_word6_x86_features;
1361 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1362 struct kvm_cpuid_entry2 __user *entries)
1364 struct kvm_cpuid_entry2 *cpuid_entries;
1365 int limit, nent = 0, r = -E2BIG;
1368 if (cpuid->nent < 1)
1371 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1375 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1376 limit = cpuid_entries[0].eax;
1377 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1378 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1379 &nent, cpuid->nent);
1381 if (nent >= cpuid->nent)
1384 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1385 limit = cpuid_entries[nent - 1].eax;
1386 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1387 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1388 &nent, cpuid->nent);
1390 if (copy_to_user(entries, cpuid_entries,
1391 nent * sizeof(struct kvm_cpuid_entry2)))
1397 vfree(cpuid_entries);
1402 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1403 struct kvm_lapic_state *s)
1406 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1412 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1413 struct kvm_lapic_state *s)
1416 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1417 kvm_apic_post_state_restore(vcpu);
1423 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1424 struct kvm_interrupt *irq)
1426 if (irq->irq < 0 || irq->irq >= 256)
1428 if (irqchip_in_kernel(vcpu->kvm))
1432 set_bit(irq->irq, vcpu->arch.irq_pending);
1433 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1440 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1443 kvm_inject_nmi(vcpu);
1449 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1450 struct kvm_tpr_access_ctl *tac)
1454 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1458 long kvm_arch_vcpu_ioctl(struct file *filp,
1459 unsigned int ioctl, unsigned long arg)
1461 struct kvm_vcpu *vcpu = filp->private_data;
1462 void __user *argp = (void __user *)arg;
1464 struct kvm_lapic_state *lapic = NULL;
1467 case KVM_GET_LAPIC: {
1468 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1473 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1477 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1482 case KVM_SET_LAPIC: {
1483 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1488 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1490 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1496 case KVM_INTERRUPT: {
1497 struct kvm_interrupt irq;
1500 if (copy_from_user(&irq, argp, sizeof irq))
1502 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1509 r = kvm_vcpu_ioctl_nmi(vcpu);
1515 case KVM_SET_CPUID: {
1516 struct kvm_cpuid __user *cpuid_arg = argp;
1517 struct kvm_cpuid cpuid;
1520 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1522 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1527 case KVM_SET_CPUID2: {
1528 struct kvm_cpuid2 __user *cpuid_arg = argp;
1529 struct kvm_cpuid2 cpuid;
1532 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1534 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1535 cpuid_arg->entries);
1540 case KVM_GET_CPUID2: {
1541 struct kvm_cpuid2 __user *cpuid_arg = argp;
1542 struct kvm_cpuid2 cpuid;
1545 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1547 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1548 cpuid_arg->entries);
1552 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1558 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1561 r = msr_io(vcpu, argp, do_set_msr, 0);
1563 case KVM_TPR_ACCESS_REPORTING: {
1564 struct kvm_tpr_access_ctl tac;
1567 if (copy_from_user(&tac, argp, sizeof tac))
1569 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1573 if (copy_to_user(argp, &tac, sizeof tac))
1578 case KVM_SET_VAPIC_ADDR: {
1579 struct kvm_vapic_addr va;
1582 if (!irqchip_in_kernel(vcpu->kvm))
1585 if (copy_from_user(&va, argp, sizeof va))
1588 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1599 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1603 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1605 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1609 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1610 u32 kvm_nr_mmu_pages)
1612 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1615 down_write(&kvm->slots_lock);
1617 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1618 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1620 up_write(&kvm->slots_lock);
1624 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1626 return kvm->arch.n_alloc_mmu_pages;
1629 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1632 struct kvm_mem_alias *alias;
1634 for (i = 0; i < kvm->arch.naliases; ++i) {
1635 alias = &kvm->arch.aliases[i];
1636 if (gfn >= alias->base_gfn
1637 && gfn < alias->base_gfn + alias->npages)
1638 return alias->target_gfn + gfn - alias->base_gfn;
1644 * Set a new alias region. Aliases map a portion of physical memory into
1645 * another portion. This is useful for memory windows, for example the PC
1648 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1649 struct kvm_memory_alias *alias)
1652 struct kvm_mem_alias *p;
1655 /* General sanity checks */
1656 if (alias->memory_size & (PAGE_SIZE - 1))
1658 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1660 if (alias->slot >= KVM_ALIAS_SLOTS)
1662 if (alias->guest_phys_addr + alias->memory_size
1663 < alias->guest_phys_addr)
1665 if (alias->target_phys_addr + alias->memory_size
1666 < alias->target_phys_addr)
1669 down_write(&kvm->slots_lock);
1670 spin_lock(&kvm->mmu_lock);
1672 p = &kvm->arch.aliases[alias->slot];
1673 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1674 p->npages = alias->memory_size >> PAGE_SHIFT;
1675 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1677 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1678 if (kvm->arch.aliases[n - 1].npages)
1680 kvm->arch.naliases = n;
1682 spin_unlock(&kvm->mmu_lock);
1683 kvm_mmu_zap_all(kvm);
1685 up_write(&kvm->slots_lock);
1693 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1698 switch (chip->chip_id) {
1699 case KVM_IRQCHIP_PIC_MASTER:
1700 memcpy(&chip->chip.pic,
1701 &pic_irqchip(kvm)->pics[0],
1702 sizeof(struct kvm_pic_state));
1704 case KVM_IRQCHIP_PIC_SLAVE:
1705 memcpy(&chip->chip.pic,
1706 &pic_irqchip(kvm)->pics[1],
1707 sizeof(struct kvm_pic_state));
1709 case KVM_IRQCHIP_IOAPIC:
1710 memcpy(&chip->chip.ioapic,
1711 ioapic_irqchip(kvm),
1712 sizeof(struct kvm_ioapic_state));
1721 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1726 switch (chip->chip_id) {
1727 case KVM_IRQCHIP_PIC_MASTER:
1728 memcpy(&pic_irqchip(kvm)->pics[0],
1730 sizeof(struct kvm_pic_state));
1732 case KVM_IRQCHIP_PIC_SLAVE:
1733 memcpy(&pic_irqchip(kvm)->pics[1],
1735 sizeof(struct kvm_pic_state));
1737 case KVM_IRQCHIP_IOAPIC:
1738 memcpy(ioapic_irqchip(kvm),
1740 sizeof(struct kvm_ioapic_state));
1746 kvm_pic_update_irq(pic_irqchip(kvm));
1750 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1754 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1758 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1762 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1763 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1767 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1768 struct kvm_reinject_control *control)
1770 if (!kvm->arch.vpit)
1772 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1777 * Get (and clear) the dirty memory log for a memory slot.
1779 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1780 struct kvm_dirty_log *log)
1784 struct kvm_memory_slot *memslot;
1787 down_write(&kvm->slots_lock);
1789 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1793 /* If nothing is dirty, don't bother messing with page tables. */
1795 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1796 kvm_flush_remote_tlbs(kvm);
1797 memslot = &kvm->memslots[log->slot];
1798 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1799 memset(memslot->dirty_bitmap, 0, n);
1803 up_write(&kvm->slots_lock);
1807 long kvm_arch_vm_ioctl(struct file *filp,
1808 unsigned int ioctl, unsigned long arg)
1810 struct kvm *kvm = filp->private_data;
1811 void __user *argp = (void __user *)arg;
1814 * This union makes it completely explicit to gcc-3.x
1815 * that these two variables' stack usage should be
1816 * combined, not added together.
1819 struct kvm_pit_state ps;
1820 struct kvm_memory_alias alias;
1824 case KVM_SET_TSS_ADDR:
1825 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1829 case KVM_SET_MEMORY_REGION: {
1830 struct kvm_memory_region kvm_mem;
1831 struct kvm_userspace_memory_region kvm_userspace_mem;
1834 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1836 kvm_userspace_mem.slot = kvm_mem.slot;
1837 kvm_userspace_mem.flags = kvm_mem.flags;
1838 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1839 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1840 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1845 case KVM_SET_NR_MMU_PAGES:
1846 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1850 case KVM_GET_NR_MMU_PAGES:
1851 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1853 case KVM_SET_MEMORY_ALIAS:
1855 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1857 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1861 case KVM_CREATE_IRQCHIP:
1863 kvm->arch.vpic = kvm_create_pic(kvm);
1864 if (kvm->arch.vpic) {
1865 r = kvm_ioapic_init(kvm);
1867 kfree(kvm->arch.vpic);
1868 kvm->arch.vpic = NULL;
1873 r = kvm_setup_default_irq_routing(kvm);
1875 kfree(kvm->arch.vpic);
1876 kfree(kvm->arch.vioapic);
1880 case KVM_CREATE_PIT:
1881 mutex_lock(&kvm->lock);
1884 goto create_pit_unlock;
1886 kvm->arch.vpit = kvm_create_pit(kvm);
1890 mutex_unlock(&kvm->lock);
1892 case KVM_IRQ_LINE_STATUS:
1893 case KVM_IRQ_LINE: {
1894 struct kvm_irq_level irq_event;
1897 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1899 if (irqchip_in_kernel(kvm)) {
1901 mutex_lock(&kvm->lock);
1902 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1903 irq_event.irq, irq_event.level);
1904 mutex_unlock(&kvm->lock);
1905 if (ioctl == KVM_IRQ_LINE_STATUS) {
1906 irq_event.status = status;
1907 if (copy_to_user(argp, &irq_event,
1915 case KVM_GET_IRQCHIP: {
1916 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1917 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1923 if (copy_from_user(chip, argp, sizeof *chip))
1924 goto get_irqchip_out;
1926 if (!irqchip_in_kernel(kvm))
1927 goto get_irqchip_out;
1928 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1930 goto get_irqchip_out;
1932 if (copy_to_user(argp, chip, sizeof *chip))
1933 goto get_irqchip_out;
1941 case KVM_SET_IRQCHIP: {
1942 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1943 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1949 if (copy_from_user(chip, argp, sizeof *chip))
1950 goto set_irqchip_out;
1952 if (!irqchip_in_kernel(kvm))
1953 goto set_irqchip_out;
1954 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1956 goto set_irqchip_out;
1966 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1969 if (!kvm->arch.vpit)
1971 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1975 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1982 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1985 if (!kvm->arch.vpit)
1987 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1993 case KVM_REINJECT_CONTROL: {
1994 struct kvm_reinject_control control;
1996 if (copy_from_user(&control, argp, sizeof(control)))
1998 r = kvm_vm_ioctl_reinject(kvm, &control);
2011 static void kvm_init_msr_list(void)
2016 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2017 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2020 msrs_to_save[j] = msrs_to_save[i];
2023 num_msrs_to_save = j;
2027 * Only apic need an MMIO device hook, so shortcut now..
2029 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2030 gpa_t addr, int len,
2033 struct kvm_io_device *dev;
2035 if (vcpu->arch.apic) {
2036 dev = &vcpu->arch.apic->dev;
2037 if (dev->in_range(dev, addr, len, is_write))
2044 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2045 gpa_t addr, int len,
2048 struct kvm_io_device *dev;
2050 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2052 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2057 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2058 struct kvm_vcpu *vcpu)
2061 int r = X86EMUL_CONTINUE;
2064 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2065 unsigned offset = addr & (PAGE_SIZE-1);
2066 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2069 if (gpa == UNMAPPED_GVA) {
2070 r = X86EMUL_PROPAGATE_FAULT;
2073 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2075 r = X86EMUL_UNHANDLEABLE;
2087 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2088 struct kvm_vcpu *vcpu)
2091 int r = X86EMUL_CONTINUE;
2094 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2095 unsigned offset = addr & (PAGE_SIZE-1);
2096 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2099 if (gpa == UNMAPPED_GVA) {
2100 r = X86EMUL_PROPAGATE_FAULT;
2103 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2105 r = X86EMUL_UNHANDLEABLE;
2118 static int emulator_read_emulated(unsigned long addr,
2121 struct kvm_vcpu *vcpu)
2123 struct kvm_io_device *mmio_dev;
2126 if (vcpu->mmio_read_completed) {
2127 memcpy(val, vcpu->mmio_data, bytes);
2128 vcpu->mmio_read_completed = 0;
2129 return X86EMUL_CONTINUE;
2132 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2134 /* For APIC access vmexit */
2135 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2138 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2139 == X86EMUL_CONTINUE)
2140 return X86EMUL_CONTINUE;
2141 if (gpa == UNMAPPED_GVA)
2142 return X86EMUL_PROPAGATE_FAULT;
2146 * Is this MMIO handled locally?
2148 mutex_lock(&vcpu->kvm->lock);
2149 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2151 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2152 mutex_unlock(&vcpu->kvm->lock);
2153 return X86EMUL_CONTINUE;
2155 mutex_unlock(&vcpu->kvm->lock);
2157 vcpu->mmio_needed = 1;
2158 vcpu->mmio_phys_addr = gpa;
2159 vcpu->mmio_size = bytes;
2160 vcpu->mmio_is_write = 0;
2162 return X86EMUL_UNHANDLEABLE;
2165 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2166 const void *val, int bytes)
2170 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2173 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2177 static int emulator_write_emulated_onepage(unsigned long addr,
2180 struct kvm_vcpu *vcpu)
2182 struct kvm_io_device *mmio_dev;
2185 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2187 if (gpa == UNMAPPED_GVA) {
2188 kvm_inject_page_fault(vcpu, addr, 2);
2189 return X86EMUL_PROPAGATE_FAULT;
2192 /* For APIC access vmexit */
2193 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2196 if (emulator_write_phys(vcpu, gpa, val, bytes))
2197 return X86EMUL_CONTINUE;
2201 * Is this MMIO handled locally?
2203 mutex_lock(&vcpu->kvm->lock);
2204 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2206 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2207 mutex_unlock(&vcpu->kvm->lock);
2208 return X86EMUL_CONTINUE;
2210 mutex_unlock(&vcpu->kvm->lock);
2212 vcpu->mmio_needed = 1;
2213 vcpu->mmio_phys_addr = gpa;
2214 vcpu->mmio_size = bytes;
2215 vcpu->mmio_is_write = 1;
2216 memcpy(vcpu->mmio_data, val, bytes);
2218 return X86EMUL_CONTINUE;
2221 int emulator_write_emulated(unsigned long addr,
2224 struct kvm_vcpu *vcpu)
2226 /* Crossing a page boundary? */
2227 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2230 now = -addr & ~PAGE_MASK;
2231 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2232 if (rc != X86EMUL_CONTINUE)
2238 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2240 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2242 static int emulator_cmpxchg_emulated(unsigned long addr,
2246 struct kvm_vcpu *vcpu)
2248 static int reported;
2252 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2254 #ifndef CONFIG_X86_64
2255 /* guests cmpxchg8b have to be emulated atomically */
2262 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2264 if (gpa == UNMAPPED_GVA ||
2265 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2268 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2273 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2275 kaddr = kmap_atomic(page, KM_USER0);
2276 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2277 kunmap_atomic(kaddr, KM_USER0);
2278 kvm_release_page_dirty(page);
2283 return emulator_write_emulated(addr, new, bytes, vcpu);
2286 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2288 return kvm_x86_ops->get_segment_base(vcpu, seg);
2291 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2293 kvm_mmu_invlpg(vcpu, address);
2294 return X86EMUL_CONTINUE;
2297 int emulate_clts(struct kvm_vcpu *vcpu)
2299 KVMTRACE_0D(CLTS, vcpu, handler);
2300 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2301 return X86EMUL_CONTINUE;
2304 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2306 struct kvm_vcpu *vcpu = ctxt->vcpu;
2310 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2311 return X86EMUL_CONTINUE;
2313 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2314 return X86EMUL_UNHANDLEABLE;
2318 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2320 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2323 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2325 /* FIXME: better handling */
2326 return X86EMUL_UNHANDLEABLE;
2328 return X86EMUL_CONTINUE;
2331 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2334 unsigned long rip = kvm_rip_read(vcpu);
2335 unsigned long rip_linear;
2337 if (!printk_ratelimit())
2340 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2342 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2344 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2345 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2347 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2349 static struct x86_emulate_ops emulate_ops = {
2350 .read_std = kvm_read_guest_virt,
2351 .read_emulated = emulator_read_emulated,
2352 .write_emulated = emulator_write_emulated,
2353 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2356 static void cache_all_regs(struct kvm_vcpu *vcpu)
2358 kvm_register_read(vcpu, VCPU_REGS_RAX);
2359 kvm_register_read(vcpu, VCPU_REGS_RSP);
2360 kvm_register_read(vcpu, VCPU_REGS_RIP);
2361 vcpu->arch.regs_dirty = ~0;
2364 int emulate_instruction(struct kvm_vcpu *vcpu,
2365 struct kvm_run *run,
2371 struct decode_cache *c;
2373 kvm_clear_exception_queue(vcpu);
2374 vcpu->arch.mmio_fault_cr2 = cr2;
2376 * TODO: fix x86_emulate.c to use guest_read/write_register
2377 * instead of direct ->regs accesses, can save hundred cycles
2378 * on Intel for instructions that don't read/change RSP, for
2381 cache_all_regs(vcpu);
2383 vcpu->mmio_is_write = 0;
2384 vcpu->arch.pio.string = 0;
2386 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2388 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2390 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2391 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2392 vcpu->arch.emulate_ctxt.mode =
2393 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2394 ? X86EMUL_MODE_REAL : cs_l
2395 ? X86EMUL_MODE_PROT64 : cs_db
2396 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2398 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2400 /* Reject the instructions other than VMCALL/VMMCALL when
2401 * try to emulate invalid opcode */
2402 c = &vcpu->arch.emulate_ctxt.decode;
2403 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2404 (!(c->twobyte && c->b == 0x01 &&
2405 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2406 c->modrm_mod == 3 && c->modrm_rm == 1)))
2407 return EMULATE_FAIL;
2409 ++vcpu->stat.insn_emulation;
2411 ++vcpu->stat.insn_emulation_fail;
2412 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2413 return EMULATE_DONE;
2414 return EMULATE_FAIL;
2418 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2420 if (vcpu->arch.pio.string)
2421 return EMULATE_DO_MMIO;
2423 if ((r || vcpu->mmio_is_write) && run) {
2424 run->exit_reason = KVM_EXIT_MMIO;
2425 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2426 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2427 run->mmio.len = vcpu->mmio_size;
2428 run->mmio.is_write = vcpu->mmio_is_write;
2432 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2433 return EMULATE_DONE;
2434 if (!vcpu->mmio_needed) {
2435 kvm_report_emulation_failure(vcpu, "mmio");
2436 return EMULATE_FAIL;
2438 return EMULATE_DO_MMIO;
2441 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2443 if (vcpu->mmio_is_write) {
2444 vcpu->mmio_needed = 0;
2445 return EMULATE_DO_MMIO;
2448 return EMULATE_DONE;
2450 EXPORT_SYMBOL_GPL(emulate_instruction);
2452 static int pio_copy_data(struct kvm_vcpu *vcpu)
2454 void *p = vcpu->arch.pio_data;
2455 gva_t q = vcpu->arch.pio.guest_gva;
2459 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2460 if (vcpu->arch.pio.in)
2461 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2463 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2467 int complete_pio(struct kvm_vcpu *vcpu)
2469 struct kvm_pio_request *io = &vcpu->arch.pio;
2476 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2477 memcpy(&val, vcpu->arch.pio_data, io->size);
2478 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2482 r = pio_copy_data(vcpu);
2489 delta *= io->cur_count;
2491 * The size of the register should really depend on
2492 * current address size.
2494 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2496 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2502 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2504 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2506 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2508 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2512 io->count -= io->cur_count;
2518 static void kernel_pio(struct kvm_io_device *pio_dev,
2519 struct kvm_vcpu *vcpu,
2522 /* TODO: String I/O for in kernel device */
2524 mutex_lock(&vcpu->kvm->lock);
2525 if (vcpu->arch.pio.in)
2526 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2527 vcpu->arch.pio.size,
2530 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2531 vcpu->arch.pio.size,
2533 mutex_unlock(&vcpu->kvm->lock);
2536 static void pio_string_write(struct kvm_io_device *pio_dev,
2537 struct kvm_vcpu *vcpu)
2539 struct kvm_pio_request *io = &vcpu->arch.pio;
2540 void *pd = vcpu->arch.pio_data;
2543 mutex_lock(&vcpu->kvm->lock);
2544 for (i = 0; i < io->cur_count; i++) {
2545 kvm_iodevice_write(pio_dev, io->port,
2550 mutex_unlock(&vcpu->kvm->lock);
2553 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2554 gpa_t addr, int len,
2557 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2560 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2561 int size, unsigned port)
2563 struct kvm_io_device *pio_dev;
2566 vcpu->run->exit_reason = KVM_EXIT_IO;
2567 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2568 vcpu->run->io.size = vcpu->arch.pio.size = size;
2569 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2570 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2571 vcpu->run->io.port = vcpu->arch.pio.port = port;
2572 vcpu->arch.pio.in = in;
2573 vcpu->arch.pio.string = 0;
2574 vcpu->arch.pio.down = 0;
2575 vcpu->arch.pio.rep = 0;
2577 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2578 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2581 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2584 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2585 memcpy(vcpu->arch.pio_data, &val, 4);
2587 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2589 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2595 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2597 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2598 int size, unsigned long count, int down,
2599 gva_t address, int rep, unsigned port)
2601 unsigned now, in_page;
2603 struct kvm_io_device *pio_dev;
2605 vcpu->run->exit_reason = KVM_EXIT_IO;
2606 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2607 vcpu->run->io.size = vcpu->arch.pio.size = size;
2608 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2609 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2610 vcpu->run->io.port = vcpu->arch.pio.port = port;
2611 vcpu->arch.pio.in = in;
2612 vcpu->arch.pio.string = 1;
2613 vcpu->arch.pio.down = down;
2614 vcpu->arch.pio.rep = rep;
2616 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2617 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2620 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2624 kvm_x86_ops->skip_emulated_instruction(vcpu);
2629 in_page = PAGE_SIZE - offset_in_page(address);
2631 in_page = offset_in_page(address) + size;
2632 now = min(count, (unsigned long)in_page / size);
2637 * String I/O in reverse. Yuck. Kill the guest, fix later.
2639 pr_unimpl(vcpu, "guest string pio down\n");
2640 kvm_inject_gp(vcpu, 0);
2643 vcpu->run->io.count = now;
2644 vcpu->arch.pio.cur_count = now;
2646 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2647 kvm_x86_ops->skip_emulated_instruction(vcpu);
2649 vcpu->arch.pio.guest_gva = address;
2651 pio_dev = vcpu_find_pio_dev(vcpu, port,
2652 vcpu->arch.pio.cur_count,
2653 !vcpu->arch.pio.in);
2654 if (!vcpu->arch.pio.in) {
2655 /* string PIO write */
2656 ret = pio_copy_data(vcpu);
2657 if (ret == X86EMUL_PROPAGATE_FAULT) {
2658 kvm_inject_gp(vcpu, 0);
2661 if (ret == 0 && pio_dev) {
2662 pio_string_write(pio_dev, vcpu);
2664 if (vcpu->arch.pio.count == 0)
2668 pr_unimpl(vcpu, "no string pio read support yet, "
2669 "port %x size %d count %ld\n",
2674 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2676 static void bounce_off(void *info)
2681 static unsigned int ref_freq;
2682 static unsigned long tsc_khz_ref;
2684 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2687 struct cpufreq_freqs *freq = data;
2689 struct kvm_vcpu *vcpu;
2690 int i, send_ipi = 0;
2693 ref_freq = freq->old;
2695 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2697 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2699 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2701 spin_lock(&kvm_lock);
2702 list_for_each_entry(kvm, &vm_list, vm_list) {
2703 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2704 vcpu = kvm->vcpus[i];
2707 if (vcpu->cpu != freq->cpu)
2709 if (!kvm_request_guest_time_update(vcpu))
2711 if (vcpu->cpu != smp_processor_id())
2715 spin_unlock(&kvm_lock);
2717 if (freq->old < freq->new && send_ipi) {
2719 * We upscale the frequency. Must make the guest
2720 * doesn't see old kvmclock values while running with
2721 * the new frequency, otherwise we risk the guest sees
2722 * time go backwards.
2724 * In case we update the frequency for another cpu
2725 * (which might be in guest context) send an interrupt
2726 * to kick the cpu out of guest context. Next time
2727 * guest context is entered kvmclock will be updated,
2728 * so the guest will not see stale values.
2730 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2735 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2736 .notifier_call = kvmclock_cpufreq_notifier
2739 int kvm_arch_init(void *opaque)
2742 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2745 printk(KERN_ERR "kvm: already loaded the other module\n");
2750 if (!ops->cpu_has_kvm_support()) {
2751 printk(KERN_ERR "kvm: no hardware support\n");
2755 if (ops->disabled_by_bios()) {
2756 printk(KERN_ERR "kvm: disabled by bios\n");
2761 r = kvm_mmu_module_init();
2765 kvm_init_msr_list();
2768 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2769 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2770 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2771 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2773 for_each_possible_cpu(cpu)
2774 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2775 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2776 tsc_khz_ref = tsc_khz;
2777 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2778 CPUFREQ_TRANSITION_NOTIFIER);
2787 void kvm_arch_exit(void)
2789 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2790 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2791 CPUFREQ_TRANSITION_NOTIFIER);
2793 kvm_mmu_module_exit();
2796 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2798 ++vcpu->stat.halt_exits;
2799 KVMTRACE_0D(HLT, vcpu, handler);
2800 if (irqchip_in_kernel(vcpu->kvm)) {
2801 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2804 vcpu->run->exit_reason = KVM_EXIT_HLT;
2808 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2810 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2813 if (is_long_mode(vcpu))
2816 return a0 | ((gpa_t)a1 << 32);
2819 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2821 unsigned long nr, a0, a1, a2, a3, ret;
2824 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2825 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2826 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2827 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2828 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2830 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2832 if (!is_long_mode(vcpu)) {
2841 case KVM_HC_VAPIC_POLL_IRQ:
2845 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2851 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2852 ++vcpu->stat.hypercalls;
2855 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2857 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2859 char instruction[3];
2861 unsigned long rip = kvm_rip_read(vcpu);
2865 * Blow out the MMU to ensure that no other VCPU has an active mapping
2866 * to ensure that the updated hypercall appears atomically across all
2869 kvm_mmu_zap_all(vcpu->kvm);
2871 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2872 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2873 != X86EMUL_CONTINUE)
2879 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2881 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2884 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2886 struct descriptor_table dt = { limit, base };
2888 kvm_x86_ops->set_gdt(vcpu, &dt);
2891 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2893 struct descriptor_table dt = { limit, base };
2895 kvm_x86_ops->set_idt(vcpu, &dt);
2898 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2899 unsigned long *rflags)
2901 kvm_lmsw(vcpu, msw);
2902 *rflags = kvm_x86_ops->get_rflags(vcpu);
2905 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2907 unsigned long value;
2909 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2912 value = vcpu->arch.cr0;
2915 value = vcpu->arch.cr2;
2918 value = vcpu->arch.cr3;
2921 value = vcpu->arch.cr4;
2924 value = kvm_get_cr8(vcpu);
2927 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2930 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2931 (u32)((u64)value >> 32), handler);
2936 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2937 unsigned long *rflags)
2939 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2940 (u32)((u64)val >> 32), handler);
2944 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2945 *rflags = kvm_x86_ops->get_rflags(vcpu);
2948 vcpu->arch.cr2 = val;
2951 kvm_set_cr3(vcpu, val);
2954 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2957 kvm_set_cr8(vcpu, val & 0xfUL);
2960 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2964 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2966 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2967 int j, nent = vcpu->arch.cpuid_nent;
2969 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2970 /* when no next entry is found, the current entry[i] is reselected */
2971 for (j = i + 1; ; j = (j + 1) % nent) {
2972 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2973 if (ej->function == e->function) {
2974 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2978 return 0; /* silence gcc, even though control never reaches here */
2981 /* find an entry with matching function, matching index (if needed), and that
2982 * should be read next (if it's stateful) */
2983 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2984 u32 function, u32 index)
2986 if (e->function != function)
2988 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2990 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2991 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2996 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
2997 u32 function, u32 index)
3000 struct kvm_cpuid_entry2 *best = NULL;
3002 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3003 struct kvm_cpuid_entry2 *e;
3005 e = &vcpu->arch.cpuid_entries[i];
3006 if (is_matching_cpuid_entry(e, function, index)) {
3007 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3008 move_to_next_stateful_cpuid_entry(vcpu, i);
3013 * Both basic or both extended?
3015 if (((e->function ^ function) & 0x80000000) == 0)
3016 if (!best || e->function > best->function)
3022 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3024 struct kvm_cpuid_entry2 *best;
3026 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3028 return best->eax & 0xff;
3032 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3034 u32 function, index;
3035 struct kvm_cpuid_entry2 *best;
3037 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3038 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3039 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3040 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3041 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3042 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3043 best = kvm_find_cpuid_entry(vcpu, function, index);
3045 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3046 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3047 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3048 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3050 kvm_x86_ops->skip_emulated_instruction(vcpu);
3051 KVMTRACE_5D(CPUID, vcpu, function,
3052 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3053 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3054 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3055 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3057 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3060 * Check if userspace requested an interrupt window, and that the
3061 * interrupt window is open.
3063 * No need to exit to userspace if we already have an interrupt queued.
3065 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3066 struct kvm_run *kvm_run)
3068 return (!vcpu->arch.irq_summary &&
3069 kvm_run->request_interrupt_window &&
3070 vcpu->arch.interrupt_window_open &&
3071 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3074 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3075 struct kvm_run *kvm_run)
3077 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3078 kvm_run->cr8 = kvm_get_cr8(vcpu);
3079 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3080 if (irqchip_in_kernel(vcpu->kvm))
3081 kvm_run->ready_for_interrupt_injection = 1;
3083 kvm_run->ready_for_interrupt_injection =
3084 (vcpu->arch.interrupt_window_open &&
3085 vcpu->arch.irq_summary == 0);
3088 static void vapic_enter(struct kvm_vcpu *vcpu)
3090 struct kvm_lapic *apic = vcpu->arch.apic;
3093 if (!apic || !apic->vapic_addr)
3096 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3098 vcpu->arch.apic->vapic_page = page;
3101 static void vapic_exit(struct kvm_vcpu *vcpu)
3103 struct kvm_lapic *apic = vcpu->arch.apic;
3105 if (!apic || !apic->vapic_addr)
3108 down_read(&vcpu->kvm->slots_lock);
3109 kvm_release_page_dirty(apic->vapic_page);
3110 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3111 up_read(&vcpu->kvm->slots_lock);
3114 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3119 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3120 kvm_mmu_unload(vcpu);
3122 r = kvm_mmu_reload(vcpu);
3126 if (vcpu->requests) {
3127 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3128 __kvm_migrate_timers(vcpu);
3129 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3130 kvm_write_guest_time(vcpu);
3131 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3132 kvm_mmu_sync_roots(vcpu);
3133 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3134 kvm_x86_ops->tlb_flush(vcpu);
3135 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3137 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3141 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3142 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3150 kvm_x86_ops->prepare_guest_switch(vcpu);
3151 kvm_load_guest_fpu(vcpu);
3153 local_irq_disable();
3155 if (vcpu->requests || need_resched() || signal_pending(current)) {
3162 vcpu->guest_mode = 1;
3164 * Make sure that guest_mode assignment won't happen after
3165 * testing the pending IRQ vector bitmap.
3169 if (vcpu->arch.exception.pending)
3170 __queue_exception(vcpu);
3171 else if (irqchip_in_kernel(vcpu->kvm))
3172 kvm_x86_ops->inject_pending_irq(vcpu);
3174 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3176 kvm_lapic_sync_to_vapic(vcpu);
3178 up_read(&vcpu->kvm->slots_lock);
3182 get_debugreg(vcpu->arch.host_dr6, 6);
3183 get_debugreg(vcpu->arch.host_dr7, 7);
3184 if (unlikely(vcpu->arch.switch_db_regs)) {
3185 get_debugreg(vcpu->arch.host_db[0], 0);
3186 get_debugreg(vcpu->arch.host_db[1], 1);
3187 get_debugreg(vcpu->arch.host_db[2], 2);
3188 get_debugreg(vcpu->arch.host_db[3], 3);
3191 set_debugreg(vcpu->arch.eff_db[0], 0);
3192 set_debugreg(vcpu->arch.eff_db[1], 1);
3193 set_debugreg(vcpu->arch.eff_db[2], 2);
3194 set_debugreg(vcpu->arch.eff_db[3], 3);
3197 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3198 kvm_x86_ops->run(vcpu, kvm_run);
3200 if (unlikely(vcpu->arch.switch_db_regs)) {
3202 set_debugreg(vcpu->arch.host_db[0], 0);
3203 set_debugreg(vcpu->arch.host_db[1], 1);
3204 set_debugreg(vcpu->arch.host_db[2], 2);
3205 set_debugreg(vcpu->arch.host_db[3], 3);
3207 set_debugreg(vcpu->arch.host_dr6, 6);
3208 set_debugreg(vcpu->arch.host_dr7, 7);
3210 vcpu->guest_mode = 0;
3216 * We must have an instruction between local_irq_enable() and
3217 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3218 * the interrupt shadow. The stat.exits increment will do nicely.
3219 * But we need to prevent reordering, hence this barrier():
3227 down_read(&vcpu->kvm->slots_lock);
3230 * Profile KVM exit RIPs:
3232 if (unlikely(prof_on == KVM_PROFILING)) {
3233 unsigned long rip = kvm_rip_read(vcpu);
3234 profile_hit(KVM_PROFILING, (void *)rip);
3237 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3238 vcpu->arch.exception.pending = false;
3240 kvm_lapic_sync_from_vapic(vcpu);
3242 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3248 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3252 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3253 pr_debug("vcpu %d received sipi with vector # %x\n",
3254 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3255 kvm_lapic_reset(vcpu);
3256 r = kvm_arch_vcpu_reset(vcpu);
3259 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3262 down_read(&vcpu->kvm->slots_lock);
3267 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3268 r = vcpu_enter_guest(vcpu, kvm_run);
3270 up_read(&vcpu->kvm->slots_lock);
3271 kvm_vcpu_block(vcpu);
3272 down_read(&vcpu->kvm->slots_lock);
3273 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3275 switch(vcpu->arch.mp_state) {
3276 case KVM_MP_STATE_HALTED:
3277 vcpu->arch.mp_state =
3278 KVM_MP_STATE_RUNNABLE;
3279 case KVM_MP_STATE_RUNNABLE:
3281 case KVM_MP_STATE_SIPI_RECEIVED:
3292 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3293 if (kvm_cpu_has_pending_timer(vcpu))
3294 kvm_inject_pending_timer_irqs(vcpu);
3296 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3298 kvm_run->exit_reason = KVM_EXIT_INTR;
3299 ++vcpu->stat.request_irq_exits;
3301 if (signal_pending(current)) {
3303 kvm_run->exit_reason = KVM_EXIT_INTR;
3304 ++vcpu->stat.signal_exits;
3306 if (need_resched()) {
3307 up_read(&vcpu->kvm->slots_lock);
3309 down_read(&vcpu->kvm->slots_lock);
3313 up_read(&vcpu->kvm->slots_lock);
3314 post_kvm_run_save(vcpu, kvm_run);
3321 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3328 if (vcpu->sigset_active)
3329 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3331 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3332 kvm_vcpu_block(vcpu);
3333 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3338 /* re-sync apic's tpr */
3339 if (!irqchip_in_kernel(vcpu->kvm))
3340 kvm_set_cr8(vcpu, kvm_run->cr8);
3342 if (vcpu->arch.pio.cur_count) {
3343 r = complete_pio(vcpu);
3347 #if CONFIG_HAS_IOMEM
3348 if (vcpu->mmio_needed) {
3349 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3350 vcpu->mmio_read_completed = 1;
3351 vcpu->mmio_needed = 0;
3353 down_read(&vcpu->kvm->slots_lock);
3354 r = emulate_instruction(vcpu, kvm_run,
3355 vcpu->arch.mmio_fault_cr2, 0,
3356 EMULTYPE_NO_DECODE);
3357 up_read(&vcpu->kvm->slots_lock);
3358 if (r == EMULATE_DO_MMIO) {
3360 * Read-modify-write. Back to userspace.
3367 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3368 kvm_register_write(vcpu, VCPU_REGS_RAX,
3369 kvm_run->hypercall.ret);
3371 r = __vcpu_run(vcpu, kvm_run);
3374 if (vcpu->sigset_active)
3375 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3381 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3385 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3386 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3387 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3388 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3389 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3390 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3391 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3392 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3393 #ifdef CONFIG_X86_64
3394 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3395 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3396 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3397 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3398 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3399 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3400 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3401 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3404 regs->rip = kvm_rip_read(vcpu);
3405 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3408 * Don't leak debug flags in case they were set for guest debugging
3410 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3411 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3418 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3422 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3423 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3424 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3425 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3426 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3427 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3428 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3429 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3430 #ifdef CONFIG_X86_64
3431 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3432 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3433 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3434 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3435 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3436 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3437 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3438 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3442 kvm_rip_write(vcpu, regs->rip);
3443 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3446 vcpu->arch.exception.pending = false;
3453 void kvm_get_segment(struct kvm_vcpu *vcpu,
3454 struct kvm_segment *var, int seg)
3456 kvm_x86_ops->get_segment(vcpu, var, seg);
3459 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3461 struct kvm_segment cs;
3463 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3467 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3469 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3470 struct kvm_sregs *sregs)
3472 struct descriptor_table dt;
3477 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3478 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3479 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3480 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3481 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3482 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3484 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3485 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3487 kvm_x86_ops->get_idt(vcpu, &dt);
3488 sregs->idt.limit = dt.limit;
3489 sregs->idt.base = dt.base;
3490 kvm_x86_ops->get_gdt(vcpu, &dt);
3491 sregs->gdt.limit = dt.limit;
3492 sregs->gdt.base = dt.base;
3494 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3495 sregs->cr0 = vcpu->arch.cr0;
3496 sregs->cr2 = vcpu->arch.cr2;
3497 sregs->cr3 = vcpu->arch.cr3;
3498 sregs->cr4 = vcpu->arch.cr4;
3499 sregs->cr8 = kvm_get_cr8(vcpu);
3500 sregs->efer = vcpu->arch.shadow_efer;
3501 sregs->apic_base = kvm_get_apic_base(vcpu);
3503 if (irqchip_in_kernel(vcpu->kvm)) {
3504 memset(sregs->interrupt_bitmap, 0,
3505 sizeof sregs->interrupt_bitmap);
3506 pending_vec = kvm_x86_ops->get_irq(vcpu);
3507 if (pending_vec >= 0)
3508 set_bit(pending_vec,
3509 (unsigned long *)sregs->interrupt_bitmap);
3511 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3512 sizeof sregs->interrupt_bitmap);
3519 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3520 struct kvm_mp_state *mp_state)
3523 mp_state->mp_state = vcpu->arch.mp_state;
3528 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3529 struct kvm_mp_state *mp_state)
3532 vcpu->arch.mp_state = mp_state->mp_state;
3537 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3538 struct kvm_segment *var, int seg)
3540 kvm_x86_ops->set_segment(vcpu, var, seg);
3543 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3544 struct kvm_segment *kvm_desct)
3546 kvm_desct->base = seg_desc->base0;
3547 kvm_desct->base |= seg_desc->base1 << 16;
3548 kvm_desct->base |= seg_desc->base2 << 24;
3549 kvm_desct->limit = seg_desc->limit0;
3550 kvm_desct->limit |= seg_desc->limit << 16;
3552 kvm_desct->limit <<= 12;
3553 kvm_desct->limit |= 0xfff;
3555 kvm_desct->selector = selector;
3556 kvm_desct->type = seg_desc->type;
3557 kvm_desct->present = seg_desc->p;
3558 kvm_desct->dpl = seg_desc->dpl;
3559 kvm_desct->db = seg_desc->d;
3560 kvm_desct->s = seg_desc->s;
3561 kvm_desct->l = seg_desc->l;
3562 kvm_desct->g = seg_desc->g;
3563 kvm_desct->avl = seg_desc->avl;
3565 kvm_desct->unusable = 1;
3567 kvm_desct->unusable = 0;
3568 kvm_desct->padding = 0;
3571 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3573 struct descriptor_table *dtable)
3575 if (selector & 1 << 2) {
3576 struct kvm_segment kvm_seg;
3578 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3580 if (kvm_seg.unusable)
3583 dtable->limit = kvm_seg.limit;
3584 dtable->base = kvm_seg.base;
3587 kvm_x86_ops->get_gdt(vcpu, dtable);
3590 /* allowed just for 8 bytes segments */
3591 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3592 struct desc_struct *seg_desc)
3595 struct descriptor_table dtable;
3596 u16 index = selector >> 3;
3598 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3600 if (dtable.limit < index * 8 + 7) {
3601 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3604 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3606 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3609 /* allowed just for 8 bytes segments */
3610 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3611 struct desc_struct *seg_desc)
3614 struct descriptor_table dtable;
3615 u16 index = selector >> 3;
3617 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3619 if (dtable.limit < index * 8 + 7)
3621 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3623 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3626 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3627 struct desc_struct *seg_desc)
3631 base_addr = seg_desc->base0;
3632 base_addr |= (seg_desc->base1 << 16);
3633 base_addr |= (seg_desc->base2 << 24);
3635 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3638 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3640 struct kvm_segment kvm_seg;
3642 kvm_get_segment(vcpu, &kvm_seg, seg);
3643 return kvm_seg.selector;
3646 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3648 struct kvm_segment *kvm_seg)
3650 struct desc_struct seg_desc;
3652 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3654 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3658 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3660 struct kvm_segment segvar = {
3661 .base = selector << 4,
3663 .selector = selector,
3674 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3678 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3679 int type_bits, int seg)
3681 struct kvm_segment kvm_seg;
3683 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3684 return kvm_load_realmode_segment(vcpu, selector, seg);
3685 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3687 kvm_seg.type |= type_bits;
3689 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3690 seg != VCPU_SREG_LDTR)
3692 kvm_seg.unusable = 1;
3694 kvm_set_segment(vcpu, &kvm_seg, seg);
3698 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3699 struct tss_segment_32 *tss)
3701 tss->cr3 = vcpu->arch.cr3;
3702 tss->eip = kvm_rip_read(vcpu);
3703 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3704 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3705 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3706 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3707 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3708 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3709 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3710 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3711 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3712 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3713 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3714 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3715 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3716 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3717 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3718 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3719 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3722 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3723 struct tss_segment_32 *tss)
3725 kvm_set_cr3(vcpu, tss->cr3);
3727 kvm_rip_write(vcpu, tss->eip);
3728 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3730 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3731 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3732 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3733 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3734 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3735 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3736 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3737 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3739 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3742 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3745 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3748 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3751 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3754 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3757 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3762 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3763 struct tss_segment_16 *tss)
3765 tss->ip = kvm_rip_read(vcpu);
3766 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3767 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3768 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3769 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3770 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3771 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3772 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3773 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3774 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3776 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3777 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3778 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3779 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3780 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3781 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3784 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3785 struct tss_segment_16 *tss)
3787 kvm_rip_write(vcpu, tss->ip);
3788 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3789 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3790 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3791 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3792 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3793 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3794 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3795 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3796 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3798 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3801 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3804 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3807 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3810 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3815 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3817 struct desc_struct *nseg_desc)
3819 struct tss_segment_16 tss_segment_16;
3822 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3823 sizeof tss_segment_16))
3826 save_state_to_tss16(vcpu, &tss_segment_16);
3828 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3829 sizeof tss_segment_16))
3832 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3833 &tss_segment_16, sizeof tss_segment_16))
3836 if (load_state_from_tss16(vcpu, &tss_segment_16))
3844 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3846 struct desc_struct *nseg_desc)
3848 struct tss_segment_32 tss_segment_32;
3851 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3852 sizeof tss_segment_32))
3855 save_state_to_tss32(vcpu, &tss_segment_32);
3857 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3858 sizeof tss_segment_32))
3861 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3862 &tss_segment_32, sizeof tss_segment_32))
3865 if (load_state_from_tss32(vcpu, &tss_segment_32))
3873 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3875 struct kvm_segment tr_seg;
3876 struct desc_struct cseg_desc;
3877 struct desc_struct nseg_desc;
3879 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3880 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3882 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3884 /* FIXME: Handle errors. Failure to read either TSS or their
3885 * descriptors should generate a pagefault.
3887 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3890 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3893 if (reason != TASK_SWITCH_IRET) {
3896 cpl = kvm_x86_ops->get_cpl(vcpu);
3897 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3898 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3903 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3904 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3908 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3909 cseg_desc.type &= ~(1 << 1); //clear the B flag
3910 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3913 if (reason == TASK_SWITCH_IRET) {
3914 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3915 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3918 kvm_x86_ops->skip_emulated_instruction(vcpu);
3920 if (nseg_desc.type & 8)
3921 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3924 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3927 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3928 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3929 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3932 if (reason != TASK_SWITCH_IRET) {
3933 nseg_desc.type |= (1 << 1);
3934 save_guest_segment_descriptor(vcpu, tss_selector,
3938 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3939 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3941 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3945 EXPORT_SYMBOL_GPL(kvm_task_switch);
3947 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3948 struct kvm_sregs *sregs)
3950 int mmu_reset_needed = 0;
3951 int i, pending_vec, max_bits;
3952 struct descriptor_table dt;
3956 dt.limit = sregs->idt.limit;
3957 dt.base = sregs->idt.base;
3958 kvm_x86_ops->set_idt(vcpu, &dt);
3959 dt.limit = sregs->gdt.limit;
3960 dt.base = sregs->gdt.base;
3961 kvm_x86_ops->set_gdt(vcpu, &dt);
3963 vcpu->arch.cr2 = sregs->cr2;
3964 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3965 vcpu->arch.cr3 = sregs->cr3;
3967 kvm_set_cr8(vcpu, sregs->cr8);
3969 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3970 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3971 kvm_set_apic_base(vcpu, sregs->apic_base);
3973 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3975 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3976 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3977 vcpu->arch.cr0 = sregs->cr0;
3979 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3980 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3981 if (!is_long_mode(vcpu) && is_pae(vcpu))
3982 load_pdptrs(vcpu, vcpu->arch.cr3);
3984 if (mmu_reset_needed)
3985 kvm_mmu_reset_context(vcpu);
3987 if (!irqchip_in_kernel(vcpu->kvm)) {
3988 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3989 sizeof vcpu->arch.irq_pending);
3990 vcpu->arch.irq_summary = 0;
3991 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3992 if (vcpu->arch.irq_pending[i])
3993 __set_bit(i, &vcpu->arch.irq_summary);
3995 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3996 pending_vec = find_first_bit(
3997 (const unsigned long *)sregs->interrupt_bitmap,
3999 /* Only pending external irq is handled here */
4000 if (pending_vec < max_bits) {
4001 kvm_x86_ops->set_irq(vcpu, pending_vec);
4002 pr_debug("Set back pending irq %d\n",
4005 kvm_pic_clear_isr_ack(vcpu->kvm);
4008 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4009 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4010 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4011 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4012 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4013 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4015 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4016 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4018 /* Older userspace won't unhalt the vcpu on reset. */
4019 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4020 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4021 !(vcpu->arch.cr0 & X86_CR0_PE))
4022 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4029 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4030 struct kvm_guest_debug *dbg)
4036 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4037 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4038 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4039 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4040 vcpu->arch.switch_db_regs =
4041 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4043 for (i = 0; i < KVM_NR_DB_REGS; i++)
4044 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4045 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4048 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4050 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4051 kvm_queue_exception(vcpu, DB_VECTOR);
4052 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4053 kvm_queue_exception(vcpu, BP_VECTOR);
4061 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4062 * we have asm/x86/processor.h
4073 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4074 #ifdef CONFIG_X86_64
4075 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4077 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4082 * Translate a guest virtual address to a guest physical address.
4084 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4085 struct kvm_translation *tr)
4087 unsigned long vaddr = tr->linear_address;
4091 down_read(&vcpu->kvm->slots_lock);
4092 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4093 up_read(&vcpu->kvm->slots_lock);
4094 tr->physical_address = gpa;
4095 tr->valid = gpa != UNMAPPED_GVA;
4103 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4105 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4109 memcpy(fpu->fpr, fxsave->st_space, 128);
4110 fpu->fcw = fxsave->cwd;
4111 fpu->fsw = fxsave->swd;
4112 fpu->ftwx = fxsave->twd;
4113 fpu->last_opcode = fxsave->fop;
4114 fpu->last_ip = fxsave->rip;
4115 fpu->last_dp = fxsave->rdp;
4116 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4123 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4125 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4129 memcpy(fxsave->st_space, fpu->fpr, 128);
4130 fxsave->cwd = fpu->fcw;
4131 fxsave->swd = fpu->fsw;
4132 fxsave->twd = fpu->ftwx;
4133 fxsave->fop = fpu->last_opcode;
4134 fxsave->rip = fpu->last_ip;
4135 fxsave->rdp = fpu->last_dp;
4136 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4143 void fx_init(struct kvm_vcpu *vcpu)
4145 unsigned after_mxcsr_mask;
4148 * Touch the fpu the first time in non atomic context as if
4149 * this is the first fpu instruction the exception handler
4150 * will fire before the instruction returns and it'll have to
4151 * allocate ram with GFP_KERNEL.
4154 kvm_fx_save(&vcpu->arch.host_fx_image);
4156 /* Initialize guest FPU by resetting ours and saving into guest's */
4158 kvm_fx_save(&vcpu->arch.host_fx_image);
4160 kvm_fx_save(&vcpu->arch.guest_fx_image);
4161 kvm_fx_restore(&vcpu->arch.host_fx_image);
4164 vcpu->arch.cr0 |= X86_CR0_ET;
4165 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4166 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4167 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4168 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4170 EXPORT_SYMBOL_GPL(fx_init);
4172 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4174 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4177 vcpu->guest_fpu_loaded = 1;
4178 kvm_fx_save(&vcpu->arch.host_fx_image);
4179 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4181 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4183 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4185 if (!vcpu->guest_fpu_loaded)
4188 vcpu->guest_fpu_loaded = 0;
4189 kvm_fx_save(&vcpu->arch.guest_fx_image);
4190 kvm_fx_restore(&vcpu->arch.host_fx_image);
4191 ++vcpu->stat.fpu_reload;
4193 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4195 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4197 if (vcpu->arch.time_page) {
4198 kvm_release_page_dirty(vcpu->arch.time_page);
4199 vcpu->arch.time_page = NULL;
4202 kvm_x86_ops->vcpu_free(vcpu);
4205 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4208 return kvm_x86_ops->vcpu_create(kvm, id);
4211 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4215 /* We do fxsave: this must be aligned. */
4216 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4218 vcpu->arch.mtrr_state.have_fixed = 1;
4220 r = kvm_arch_vcpu_reset(vcpu);
4222 r = kvm_mmu_setup(vcpu);
4229 kvm_x86_ops->vcpu_free(vcpu);
4233 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4236 kvm_mmu_unload(vcpu);
4239 kvm_x86_ops->vcpu_free(vcpu);
4242 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4244 vcpu->arch.nmi_pending = false;
4245 vcpu->arch.nmi_injected = false;
4247 vcpu->arch.switch_db_regs = 0;
4248 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4249 vcpu->arch.dr6 = DR6_FIXED_1;
4250 vcpu->arch.dr7 = DR7_FIXED_1;
4252 return kvm_x86_ops->vcpu_reset(vcpu);
4255 void kvm_arch_hardware_enable(void *garbage)
4257 kvm_x86_ops->hardware_enable(garbage);
4260 void kvm_arch_hardware_disable(void *garbage)
4262 kvm_x86_ops->hardware_disable(garbage);
4265 int kvm_arch_hardware_setup(void)
4267 return kvm_x86_ops->hardware_setup();
4270 void kvm_arch_hardware_unsetup(void)
4272 kvm_x86_ops->hardware_unsetup();
4275 void kvm_arch_check_processor_compat(void *rtn)
4277 kvm_x86_ops->check_processor_compatibility(rtn);
4280 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4286 BUG_ON(vcpu->kvm == NULL);
4289 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4290 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4291 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4293 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4295 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4300 vcpu->arch.pio_data = page_address(page);
4302 r = kvm_mmu_create(vcpu);
4304 goto fail_free_pio_data;
4306 if (irqchip_in_kernel(kvm)) {
4307 r = kvm_create_lapic(vcpu);
4309 goto fail_mmu_destroy;
4315 kvm_mmu_destroy(vcpu);
4317 free_page((unsigned long)vcpu->arch.pio_data);
4322 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4324 kvm_free_lapic(vcpu);
4325 down_read(&vcpu->kvm->slots_lock);
4326 kvm_mmu_destroy(vcpu);
4327 up_read(&vcpu->kvm->slots_lock);
4328 free_page((unsigned long)vcpu->arch.pio_data);
4331 struct kvm *kvm_arch_create_vm(void)
4333 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4336 return ERR_PTR(-ENOMEM);
4338 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4339 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4340 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4342 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4343 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4345 rdtscll(kvm->arch.vm_init_tsc);
4350 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4353 kvm_mmu_unload(vcpu);
4357 static void kvm_free_vcpus(struct kvm *kvm)
4362 * Unpin any mmu pages first.
4364 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4366 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4367 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4368 if (kvm->vcpus[i]) {
4369 kvm_arch_vcpu_free(kvm->vcpus[i]);
4370 kvm->vcpus[i] = NULL;
4376 void kvm_arch_sync_events(struct kvm *kvm)
4378 kvm_free_all_assigned_devices(kvm);
4381 void kvm_arch_destroy_vm(struct kvm *kvm)
4383 kvm_iommu_unmap_guest(kvm);
4385 kfree(kvm->arch.vpic);
4386 kfree(kvm->arch.vioapic);
4387 kvm_free_vcpus(kvm);
4388 kvm_free_physmem(kvm);
4389 if (kvm->arch.apic_access_page)
4390 put_page(kvm->arch.apic_access_page);
4391 if (kvm->arch.ept_identity_pagetable)
4392 put_page(kvm->arch.ept_identity_pagetable);
4396 int kvm_arch_set_memory_region(struct kvm *kvm,
4397 struct kvm_userspace_memory_region *mem,
4398 struct kvm_memory_slot old,
4401 int npages = mem->memory_size >> PAGE_SHIFT;
4402 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4404 /*To keep backward compatibility with older userspace,
4405 *x86 needs to hanlde !user_alloc case.
4408 if (npages && !old.rmap) {
4409 unsigned long userspace_addr;
4411 down_write(¤t->mm->mmap_sem);
4412 userspace_addr = do_mmap(NULL, 0,
4414 PROT_READ | PROT_WRITE,
4415 MAP_PRIVATE | MAP_ANONYMOUS,
4417 up_write(¤t->mm->mmap_sem);
4419 if (IS_ERR((void *)userspace_addr))
4420 return PTR_ERR((void *)userspace_addr);
4422 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4423 spin_lock(&kvm->mmu_lock);
4424 memslot->userspace_addr = userspace_addr;
4425 spin_unlock(&kvm->mmu_lock);
4427 if (!old.user_alloc && old.rmap) {
4430 down_write(¤t->mm->mmap_sem);
4431 ret = do_munmap(current->mm, old.userspace_addr,
4432 old.npages * PAGE_SIZE);
4433 up_write(¤t->mm->mmap_sem);
4436 "kvm_vm_ioctl_set_memory_region: "
4437 "failed to munmap memory\n");
4442 if (!kvm->arch.n_requested_mmu_pages) {
4443 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4444 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4447 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4448 kvm_flush_remote_tlbs(kvm);
4453 void kvm_arch_flush_shadow(struct kvm *kvm)
4455 kvm_mmu_zap_all(kvm);
4458 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4460 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4461 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4462 || vcpu->arch.nmi_pending;
4465 static void vcpu_kick_intr(void *info)
4468 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4469 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4473 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4475 int ipi_pcpu = vcpu->cpu;
4476 int cpu = get_cpu();
4478 if (waitqueue_active(&vcpu->wq)) {
4479 wake_up_interruptible(&vcpu->wq);
4480 ++vcpu->stat.halt_wakeup;
4483 * We may be called synchronously with irqs disabled in guest mode,
4484 * So need not to call smp_call_function_single() in that case.
4486 if (vcpu->guest_mode && vcpu->cpu != cpu)
4487 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4491 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4493 return kvm_x86_ops->interrupt_allowed(vcpu);