2 * This file is subject to the terms and conditions of the GNU General
3 * Public License. See the file "COPYING" in the main directory of this
4 * archive for more details.
6 * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
7 * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
9 #include <linux/config.h>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/sched.h>
14 #include <linux/module.h>
15 #include <linux/cpumask.h>
18 #include <asm/pgtable.h>
20 #include <asm/sn/types.h>
21 #include <asm/sn/sn0/addrs.h>
22 #include <asm/sn/sn0/hubni.h>
23 #include <asm/sn/sn0/hubio.h>
24 #include <asm/sn/klconfig.h>
25 #include <asm/sn/ioc3.h>
26 #include <asm/mipsregs.h>
27 #include <asm/sn/gda.h>
28 #include <asm/sn/hub.h>
29 #include <asm/sn/intr.h>
30 #include <asm/current.h>
32 #include <asm/processor.h>
33 #include <asm/mmu_context.h>
34 #include <asm/thread_info.h>
35 #include <asm/sn/launch.h>
36 #include <asm/sn/sn_private.h>
37 #include <asm/sn/sn0/ip27.h>
38 #include <asm/sn/mapped_kernel.h>
40 #define CPU_NONE (cpuid_t)-1
42 static DECLARE_BITMAP(hub_init_mask, MAX_COMPACT_NODES);
43 nasid_t master_nasid = INVALID_NASID;
45 cnodeid_t nasid_to_compact_node[MAX_NASIDS];
46 nasid_t compact_to_nasid_node[MAX_COMPACT_NODES];
47 cnodeid_t cpuid_to_compact_node[MAXCPUS];
49 EXPORT_SYMBOL(nasid_to_compact_node);
51 extern void pcibr_setup(cnodeid_t);
53 extern void xtalk_probe_node(cnodeid_t nid);
55 static void __init per_hub_init(cnodeid_t cnode)
57 struct hub_data *hub = hub_data(cnode);
58 nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
60 cpu_set(smp_processor_id(), hub->h_cpus);
62 if (test_and_set_bit(cnode, hub_init_mask))
66 * Set CRB timeout at 5ms, (< PI timeout of 10ms)
68 REMOTE_HUB_S(nasid, IIO_ICTP, 0x800);
69 REMOTE_HUB_S(nasid, IIO_ICTO, 0xff);
72 xtalk_probe_node(cnode);
74 #ifdef CONFIG_REPLICATE_EXHANDLERS
76 * If this is not a headless node initialization,
77 * copy over the caliased exception handlers.
79 if (get_compact_nodeid() == cnode) {
80 extern char except_vec2_generic, except_vec3_generic;
81 extern void build_tlb_refill_handler(void);
83 memcpy((void *)(CKSEG0 + 0x100), &except_vec2_generic, 0x80);
84 memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x80);
85 build_tlb_refill_handler();
86 memcpy((void *)(CKSEG0 + 0x100), (void *) CKSEG0, 0x80);
87 memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x100);
93 void __init per_cpu_init(void)
95 int cpu = smp_processor_id();
96 int slice = LOCAL_HUB_L(PI_CPU_NUM);
97 cnodeid_t cnode = get_compact_nodeid();
98 struct hub_data *hub = hub_data(cnode);
99 struct slice_data *si = hub->slice + slice;
102 if (test_and_set_bit(slice, &hub->slice_map))
105 clear_c0_status(ST0_IM);
107 for (i = 0; i < LEVELS_PER_SLICE; i++)
108 si->level_to_irq[i] = -1;
111 * Some interrupts are reserved by hardware or by software convention.
112 * Mark these as reserved right away so they won't be used accidently
115 for (i = 0; i <= BASE_PCI_IRQ; i++) {
116 __set_bit(i, si->irq_alloc_mask);
117 LOCAL_HUB_S(PI_INT_PEND_MOD, i);
120 __set_bit(IP_PEND0_6_63, si->irq_alloc_mask);
121 LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63);
123 for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) {
124 __set_bit(i, si->irq_alloc_mask + 1);
125 LOCAL_HUB_S(PI_INT_PEND_MOD, i);
128 LOCAL_HUB_L(PI_INT_PEND0);
131 * We use this so we can find the local hub's data as fast as only
134 cpu_data[cpu].data = si;
139 /* Install our NMI handler if symmon hasn't installed one. */
140 install_cpu_nmi_handler(cputoslice(cpu));
142 set_c0_status(SRB_DEV0 | SRB_DEV1);
148 * get_nasid() returns the physical node id number of the caller.
153 return (nasid_t)((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_NODEID_MASK)
154 >> NSRI_NODEID_SHFT);
158 * Map the physical node id to a virtual node id (virtual node ids are contiguous).
160 cnodeid_t get_compact_nodeid(void)
162 return NASID_TO_COMPACT_NODEID(get_nasid());
165 /* Extracted from the IOC3 meta driver. FIXME. */
166 static inline void ioc3_sio_init(void)
173 ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base;
175 ioc3->sscr_a = 0; /* PIO mode for uarta. */
176 ioc3->sscr_b = 0; /* PIO mode for uartb. */
178 ioc3->sio_ies = (SIO_IR_SA_INT | SIO_IR_SB_INT);
180 loops=1000000; while(loops--);
181 ioc3->sregs.uarta.iu_fcr = 0;
182 ioc3->sregs.uartb.iu_fcr = 0;
183 loops=1000000; while(loops--);
186 static inline void ioc3_eth_init(void)
192 ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base;
197 extern void ip27_setup_console(void);
198 extern void ip27_time_init(void);
199 extern void ip27_reboot_setup(void);
201 static int __init ip27_setup(void)
203 hubreg_t p, e, n_mode;
206 ip27_setup_console();
210 * hub_rtc init and cpu clock intr enabled for later calibrate_delay.
213 printk("IP27: Running on node %d.\n", nid);
215 p = LOCAL_HUB_L(PI_CPU_PRESENT_A) & 1;
216 e = LOCAL_HUB_L(PI_CPU_ENABLE_A) & 1;
217 printk("Node %d has %s primary CPU%s.\n", nid,
219 e ? ", CPU is running" : "");
221 p = LOCAL_HUB_L(PI_CPU_PRESENT_B) & 1;
222 e = LOCAL_HUB_L(PI_CPU_ENABLE_B) & 1;
223 printk("Node %d has %s secondary CPU%s.\n", nid,
225 e ? ", CPU is running" : "");
228 * Try to catch kernel missconfigurations and give user an
229 * indication what option to select.
231 n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK;
232 printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M');
233 #ifdef CONFIG_SGI_SN0_N_MODE
235 panic("Kernel compiled for M mode.");
238 panic("Kernel compiled for N mode.");
245 set_io_port_base(IO_BASE);
247 board_time_init = ip27_time_init;
252 early_initcall(ip27_setup);