1 /* Boot entry point for MN10300 kernel
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
12 #include <linux/threads.h>
13 #include <linux/linkage.h>
14 #include <linux/serial_reg.h>
15 #include <asm/thread_info.h>
17 #include <asm/pgtable.h>
18 #include <asm/frame.inc>
19 #include <asm/param.h>
20 #include <unit/serial.h>
22 .section .text.head,"ax"
24 ###############################################################################
26 # bootloader entry point
28 ###############################################################################
30 .type _start,@function
32 # save commandline pointer
35 # preload the PGD pointer register
40 mov MMUCTR_IIV|MMUCTR_DIV,d0
42 mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE,d0
45 # turn on AM33v2 exception handling mode and set the trap table base
49 mov CONFIG_INTERRUPT_VECTOR_BASE,d0
52 # invalidate and enable both of the caches
55 movhu d0,(a0) # turn off first
56 mov CHCTR_ICINV|CHCTR_DCINV,d0
60 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
63 #ifndef CONFIG_MN10300_CACHE_DISABLED
64 #ifdef CONFIG_MN10300_CACHE_WBACK
65 #ifndef CONFIG_MN10300_CACHE_WBACK_NOWRALLOC
66 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
68 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK|CHCTR_DCALMD,d0
69 #endif /* CACHE_DISABLED */
71 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
73 movhu d0,(a0) # enable
74 #endif /* NOWRALLOC */
76 # turn on RTS on the debug serial port if applicable
77 #ifdef CONFIG_MN10300_UNIT_ASB2305
78 bset UART_MCR_RTS,(ASB2305_DEBUG_MCR)
93 # retrieve the parameters (including command line) before we overwrite
99 mov redboot_command_line,a0
101 add COMMAND_LINE_SIZE,a1
110 mov redboot_platform_name,a0
112 add COMMAND_LINE_SIZE,a1
124 # set up the registers with recognisable rubbish in them
125 mov init_thread_union+THREAD_SIZE-12,sp
128 mov d0,(4,sp) # EPSW save area
130 mov d0,(8,sp) # PC save area
163 # set up the initial kernel stack
166 mov d0,(REG_ORIG_D0,fp)
168 # put different recognisable rubbish in the regs
199 # we may be holding current in E2
200 #ifdef CONFIG_MN10300_CURRENT_IN_E2
204 # initialise the processor and the unit
205 call processor_init[],0
208 #ifdef CONFIG_GDBSTUB
209 call gdbstub_init[],0
211 #ifdef CONFIG_GDBSTUB_IMMEDIATE
212 .globl __gdbstub_pause
219 .size _start, _start-.
223 * This is initialized to disallow all access to the low 2G region
224 * - the high 2G region is managed directly by the MMU
225 * - range 0x70000000-0x7C000000 are initialised for use by VMALLOC
229 ENTRY(swapper_pg_dir)
230 .space PTRS_PER_PGD*4
233 * The page tables are initialized to only 8MB here - the final page
234 * tables are set up later depending on memory size.
238 ENTRY(empty_zero_page)
242 ENTRY(empty_bad_page)
246 ENTRY(empty_bad_pte_table)
250 ENTRY(large_page_table)
254 ENTRY(kernel_vmalloc_ptes)
255 .space ((VMALLOC_END-VMALLOC_START)/PAGE_SIZE)*4