1 #ifndef _ASM_POWERPC_TLBFLUSH_H
2 #define _ASM_POWERPC_TLBFLUSH_H
6 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
7 * - flush_tlb_page(vma, vmaddr) flushes one page
8 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
9 * - flush_tlb_range(vma, start, end) flushes a range of pages
10 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
11 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
25 #include <linux/percpu.h>
28 #define PPC64_TLB_BATCH_NR 192
30 struct ppc64_tlb_batch {
33 real_pte_t pte[PPC64_TLB_BATCH_NR];
34 unsigned long vaddr[PPC64_TLB_BATCH_NR];
37 DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
39 extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
41 static inline void flush_tlb_pending(void)
43 struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
46 __flush_tlb_pending(batch);
47 put_cpu_var(ppc64_tlb_batch);
50 extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
52 extern void flush_hash_range(unsigned long number, int local);
54 #else /* CONFIG_PPC64 */
58 extern void _tlbie(unsigned long address);
59 extern void _tlbia(void);
62 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
63 * flush_tlb_kernel_range are best implemented as tlbia vs
67 #if (defined(CONFIG_4xx) && !defined(CONFIG_44x)) || defined(CONFIG_8xx)
68 #define flush_tlb_pending() asm volatile ("tlbia; sync" : : : "memory")
69 #elif defined(CONFIG_4xx) || defined(CONFIG_FSL_BOOKE)
70 #define flush_tlb_pending() _tlbia()
74 * This gets called at the end of handling a page fault, when
75 * the kernel has put a new PTE into the page table for the process.
76 * We use it to ensure coherency between the i-cache and d-cache
77 * for the page which has just been mapped in.
78 * On machines which use an MMU hash table, we use this to put a
79 * corresponding HPTE into the hash table ahead of time, instead of
80 * waiting for the inevitable extra hash-table miss exception.
82 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
84 #endif /* CONFIG_PPC64 */
86 #if defined(CONFIG_PPC64) || defined(CONFIG_4xx) || \
87 defined(CONFIG_FSL_BOOKE) || defined(CONFIG_8xx)
89 static inline void flush_tlb_mm(struct mm_struct *mm)
94 static inline void flush_tlb_page(struct vm_area_struct *vma,
104 static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
105 unsigned long vmaddr)
112 static inline void flush_tlb_range(struct vm_area_struct *vma,
113 unsigned long start, unsigned long end)
118 static inline void flush_tlb_kernel_range(unsigned long start,
124 #else /* 6xx, 7xx, 7xxx cpus */
126 extern void flush_tlb_mm(struct mm_struct *mm);
127 extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
128 extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
129 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
131 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
136 * This is called in munmap when we have freed up some page-table
137 * pages. We don't need to do anything here, there's nothing special
138 * about our page-table pages. -- paulus
140 static inline void flush_tlb_pgtables(struct mm_struct *mm,
141 unsigned long start, unsigned long end)
145 #endif /*__KERNEL__ */
146 #endif /* _ASM_POWERPC_TLBFLUSH_H */