git.oblomov.eu Git - linux-2.6/blob - drivers/usb/gadget/s3c2410_udc.c

   1 /*
   2  * linux/drivers/usb/gadget/s3c2410_udc.c
   3  *
   4  * Samsung S3C24xx series on-chip full speed USB device controllers
   5  *
   6  * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   7  *      Additional cleanups by Ben Dooks <ben-linux@fluff.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22  *
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/smp_lock.h>
  32 #include <linux/errno.h>
  33 #include <linux/init.h>
  34 #include <linux/timer.h>
  35 #include <linux/list.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/platform_device.h>
  38 #include <linux/clk.h>
  39 #include <linux/gpio.h>
  40
  41 #include <linux/debugfs.h>
  42 #include <linux/seq_file.h>
  43
  44 #include <linux/usb.h>
  45 #include <linux/usb/gadget.h>
  46
  47 #include <asm/byteorder.h>
  48 #include <asm/io.h>
  49 #include <asm/irq.h>
  50 #include <asm/system.h>
  51 #include <asm/unaligned.h>
  52 #include <mach/irqs.h>
  53
  54 #include <mach/hardware.h>
  55
  56 #include <plat/regs-udc.h>
  57 #include <plat/udc.h>
  58
  59
  60 #include "s3c2410_udc.h"
  61
  62 #define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  63 #define DRIVER_VERSION  "29 Apr 2007"
  64 #define DRIVER_AUTHOR   "Herbert Pötzl <herbert@13thfloor.at>, " \
  65                         "Arnaud Patard <arnaud.patard@rtp-net.org>"
  66
  67 static const char               gadget_name[] = "s3c2410_udc";
  68 static const char               driver_desc[] = DRIVER_DESC;
  69
  70 static struct s3c2410_udc       *the_controller;
  71 static struct clk               *udc_clock;
  72 static struct clk               *usb_bus_clock;
  73 static void __iomem             *base_addr;
  74 static u64                      rsrc_start;
  75 static u64                      rsrc_len;
  76 static struct dentry            *s3c2410_udc_debugfs_root;
  77
  78 static inline u32 udc_read(u32 reg)
  79 {
  80         return readb(base_addr + reg);
  81 }
  82
  83 static inline void udc_write(u32 value, u32 reg)
  84 {
  85         writeb(value, base_addr + reg);
  86 }
  87
  88 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  89 {
  90         writeb(value, base + reg);
  91 }
  92
  93 static struct s3c2410_udc_mach_info *udc_info;
  94
  95 /*************************** DEBUG FUNCTION ***************************/
  96 #define DEBUG_NORMAL    1
  97 #define DEBUG_VERBOSE   2
  98
  99 #ifdef CONFIG_USB_S3C2410_DEBUG
 100 #define USB_S3C2410_DEBUG_LEVEL 0
 101
 102 static uint32_t s3c2410_ticks = 0;
 103
 104 static int dprintk(int level, const char *fmt, ...)
 105 {
 106         static char printk_buf[1024];
 107         static long prevticks;
 108         static int invocation;
 109         va_list args;
 110         int len;
 111
 112         if (level > USB_S3C2410_DEBUG_LEVEL)
 113                 return 0;
 114
 115         if (s3c2410_ticks != prevticks) {
 116                 prevticks = s3c2410_ticks;
 117                 invocation = 0;
 118         }
 119
 120         len = scnprintf(printk_buf,
 121                         sizeof(printk_buf), "%1lu.%02d USB: ",
 122                         prevticks, invocation++);
 123
 124         va_start(args, fmt);
 125         len = vscnprintf(printk_buf+len,
 126                         sizeof(printk_buf)-len, fmt, args);
 127         va_end(args);
 128
 129         return printk(KERN_DEBUG "%s", printk_buf);
 130 }
 131 #else
 132 static int dprintk(int level, const char *fmt, ...)
 133 {
 134         return 0;
 135 }
 136 #endif
 137 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
 138 {
 139         u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg;
 140         u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 141         u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2;
 142         u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2;
 143
 144         addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 145         pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 146         ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 147         usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 148         ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 149         usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 150         udc_write(0, S3C2410_UDC_INDEX_REG);
 151         ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 152         udc_write(1, S3C2410_UDC_INDEX_REG);
 153         ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 154         ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 155         ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 156         ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 157         udc_write(2, S3C2410_UDC_INDEX_REG);
 158         ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 159         ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 160         ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 161         ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 162
 163         seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 164                  "PWR_REG        : 0x%04X\n"
 165                  "EP_INT_REG     : 0x%04X\n"
 166                  "USB_INT_REG    : 0x%04X\n"
 167                  "EP_INT_EN_REG  : 0x%04X\n"
 168                  "USB_INT_EN_REG : 0x%04X\n"
 169                  "EP0_CSR        : 0x%04X\n"
 170                  "EP1_I_CSR1     : 0x%04X\n"
 171                  "EP1_I_CSR2     : 0x%04X\n"
 172                  "EP1_O_CSR1     : 0x%04X\n"
 173                  "EP1_O_CSR2     : 0x%04X\n"
 174                  "EP2_I_CSR1     : 0x%04X\n"
 175                  "EP2_I_CSR2     : 0x%04X\n"
 176                  "EP2_O_CSR1     : 0x%04X\n"
 177                  "EP2_O_CSR2     : 0x%04X\n",
 178                         addr_reg,pwr_reg,ep_int_reg,usb_int_reg,
 179                         ep_int_en_reg, usb_int_en_reg, ep0_csr,
 180                         ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2,
 181                         ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2
 182                 );
 183
 184         return 0;
 185 }
 186
 187 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
 188                                          struct file *file)
 189 {
 190         return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
 191 }
 192
 193 static const struct file_operations s3c2410_udc_debugfs_fops = {
 194         .open           = s3c2410_udc_debugfs_fops_open,
 195         .read           = seq_read,
 196         .llseek         = seq_lseek,
 197         .release        = single_release,
 198         .owner          = THIS_MODULE,
 199 };
 200
 201 /* io macros */
 202
 203 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 204 {
 205         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 206         udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 207                         S3C2410_UDC_EP0_CSR_REG);
 208 }
 209
 210 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 211 {
 212         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 213         writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 214 }
 215
 216 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 217 {
 218         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 219         udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 220 }
 221
 222 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 223 {
 224         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 225         udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 226 }
 227
 228 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 229 {
 230         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 231         udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 232 }
 233
 234 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 235 {
 236         udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 237         udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 238 }
 239
 240 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 241 {
 242         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 243
 244         udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY
 245                                 | S3C2410_UDC_EP0_CSR_DE),
 246                         S3C2410_UDC_EP0_CSR_REG);
 247 }
 248
 249 static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
 250 {
 251         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 252         udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 253                                 | S3C2410_UDC_EP0_CSR_SSE),
 254                         S3C2410_UDC_EP0_CSR_REG);
 255 }
 256
 257 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 258 {
 259         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 260         udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 261                         | S3C2410_UDC_EP0_CSR_DE),
 262                 S3C2410_UDC_EP0_CSR_REG);
 263 }
 264
 265 /*------------------------- I/O ----------------------------------*/
 266
 267 /*
 268  *      s3c2410_udc_done
 269  */
 270 static void s3c2410_udc_done(struct s3c2410_ep *ep,
 271                 struct s3c2410_request *req, int status)
 272 {
 273         unsigned halted = ep->halted;
 274
 275         list_del_init(&req->queue);
 276
 277         if (likely (req->req.status == -EINPROGRESS))
 278                 req->req.status = status;
 279         else
 280                 status = req->req.status;
 281
 282         ep->halted = 1;
 283         req->req.complete(&ep->ep, &req->req);
 284         ep->halted = halted;
 285 }
 286
 287 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 288                 struct s3c2410_ep *ep, int status)
 289 {
 290         /* Sanity check */
 291         if (&ep->queue == NULL)
 292                 return;
 293
 294         while (!list_empty (&ep->queue)) {
 295                 struct s3c2410_request *req;
 296                 req = list_entry (ep->queue.next, struct s3c2410_request,
 297                                 queue);
 298                 s3c2410_udc_done(ep, req, status);
 299         }
 300 }
 301
 302 static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
 303 {
 304         unsigned i;
 305
 306         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
 307          * fifos, and pending transactions mustn't be continued in any case.
 308          */
 309
 310         for (i = 1; i < S3C2410_ENDPOINTS; i++)
 311                 s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
 312 }
 313
 314 static inline int s3c2410_udc_fifo_count_out(void)
 315 {
 316         int tmp;
 317
 318         tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 319         tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 320         return tmp;
 321 }
 322
 323 /*
 324  *      s3c2410_udc_write_packet
 325  */
 326 static inline int s3c2410_udc_write_packet(int fifo,
 327                 struct s3c2410_request *req,
 328                 unsigned max)
 329 {
 330         unsigned len = min(req->req.length - req->req.actual, max);
 331         u8 *buf = req->req.buf + req->req.actual;
 332
 333         prefetch(buf);
 334
 335         dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 336                 req->req.actual, req->req.length, len, req->req.actual + len);
 337
 338         req->req.actual += len;
 339
 340         udelay(5);
 341         writesb(base_addr + fifo, buf, len);
 342         return len;
 343 }
 344
 345 /*
 346  *      s3c2410_udc_write_fifo
 347  *
 348  * return:  0 = still running, 1 = completed, negative = errno
 349  */
 350 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 351                 struct s3c2410_request *req)
 352 {
 353         unsigned        count;
 354         int             is_last;
 355         u32             idx;
 356         int             fifo_reg;
 357         u32             ep_csr;
 358
 359         idx = ep->bEndpointAddress & 0x7F;
 360         switch (idx) {
 361         default:
 362                 idx = 0;
 363         case 0:
 364                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 365                 break;
 366         case 1:
 367                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 368                 break;
 369         case 2:
 370                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 371                 break;
 372         case 3:
 373                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 374                 break;
 375         case 4:
 376                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 377                 break;
 378         }
 379
 380         count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 381
 382         /* last packet is often short (sometimes a zlp) */
 383         if (count != ep->ep.maxpacket)
 384                 is_last = 1;
 385         else if (req->req.length != req->req.actual || req->req.zero)
 386                 is_last = 0;
 387         else
 388                 is_last = 2;
 389
 390         /* Only ep0 debug messages are interesting */
 391         if (idx == 0)
 392                 dprintk(DEBUG_NORMAL,
 393                         "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 394                         idx, count, req->req.actual, req->req.length,
 395                         is_last, req->req.zero);
 396
 397         if (is_last) {
 398                 /* The order is important. It prevents sending 2 packets
 399                  * at the same time */
 400
 401                 if (idx == 0) {
 402                         /* Reset signal => no need to say 'data sent' */
 403                         if (! (udc_read(S3C2410_UDC_USB_INT_REG)
 404                                         & S3C2410_UDC_USBINT_RESET))
 405                                 s3c2410_udc_set_ep0_de_in(base_addr);
 406                         ep->dev->ep0state=EP0_IDLE;
 407                 } else {
 408                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 409                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 410                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 411                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 412                                         S3C2410_UDC_IN_CSR1_REG);
 413                 }
 414
 415                 s3c2410_udc_done(ep, req, 0);
 416                 is_last = 1;
 417         } else {
 418                 if (idx == 0) {
 419                         /* Reset signal => no need to say 'data sent' */
 420                         if (! (udc_read(S3C2410_UDC_USB_INT_REG)
 421                                         & S3C2410_UDC_USBINT_RESET))
 422                                 s3c2410_udc_set_ep0_ipr(base_addr);
 423                 } else {
 424                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 425                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 426                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 427                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 428                                         S3C2410_UDC_IN_CSR1_REG);
 429                 }
 430         }
 431
 432         return is_last;
 433 }
 434
 435 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 436                 struct s3c2410_request *req, unsigned avail)
 437 {
 438         unsigned len;
 439
 440         len = min(req->req.length - req->req.actual, avail);
 441         req->req.actual += len;
 442
 443         readsb(fifo + base_addr, buf, len);
 444         return len;
 445 }
 446
 447 /*
 448  * return:  0 = still running, 1 = queue empty, negative = errno
 449  */
 450 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 451                                  struct s3c2410_request *req)
 452 {
 453         u8              *buf;
 454         u32             ep_csr;
 455         unsigned        bufferspace;
 456         int             is_last=1;
 457         unsigned        avail;
 458         int             fifo_count = 0;
 459         u32             idx;
 460         int             fifo_reg;
 461
 462         idx = ep->bEndpointAddress & 0x7F;
 463
 464         switch (idx) {
 465         default:
 466                 idx = 0;
 467         case 0:
 468                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 469                 break;
 470         case 1:
 471                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 472                 break;
 473         case 2:
 474                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 475                 break;
 476         case 3:
 477                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 478                 break;
 479         case 4:
 480                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 481                 break;
 482         }
 483
 484         if (!req->req.length)
 485                 return 1;
 486
 487         buf = req->req.buf + req->req.actual;
 488         bufferspace = req->req.length - req->req.actual;
 489         if (!bufferspace) {
 490                 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 491                 return -1;
 492         }
 493
 494         udc_write(idx, S3C2410_UDC_INDEX_REG);
 495
 496         fifo_count = s3c2410_udc_fifo_count_out();
 497         dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 498
 499         if (fifo_count > ep->ep.maxpacket)
 500                 avail = ep->ep.maxpacket;
 501         else
 502                 avail = fifo_count;
 503
 504         fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 505
 506         /* checking this with ep0 is not accurate as we already
 507          * read a control request
 508          **/
 509         if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 510                 is_last = 1;
 511                 /* overflowed this request?  flush extra data */
 512                 if (fifo_count != avail)
 513                         req->req.status = -EOVERFLOW;
 514         } else {
 515                 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 516         }
 517
 518         udc_write(idx, S3C2410_UDC_INDEX_REG);
 519         fifo_count = s3c2410_udc_fifo_count_out();
 520
 521         /* Only ep0 debug messages are interesting */
 522         if (idx == 0)
 523                 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 524                         __func__, fifo_count,is_last);
 525
 526         if (is_last) {
 527                 if (idx == 0) {
 528                         s3c2410_udc_set_ep0_de_out(base_addr);
 529                         ep->dev->ep0state = EP0_IDLE;
 530                 } else {
 531                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 532                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 533                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 534                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 535                                         S3C2410_UDC_OUT_CSR1_REG);
 536                 }
 537
 538                 s3c2410_udc_done(ep, req, 0);
 539         } else {
 540                 if (idx == 0) {
 541                         s3c2410_udc_clear_ep0_opr(base_addr);
 542                 } else {
 543                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 544                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 545                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 546                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 547                                         S3C2410_UDC_OUT_CSR1_REG);
 548                 }
 549         }
 550
 551         return is_last;
 552 }
 553
 554 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 555 {
 556         unsigned char *outbuf = (unsigned char*)crq;
 557         int bytes_read = 0;
 558
 559         udc_write(0, S3C2410_UDC_INDEX_REG);
 560
 561         bytes_read = s3c2410_udc_fifo_count_out();
 562
 563         dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 564
 565         if (bytes_read > sizeof(struct usb_ctrlrequest))
 566                 bytes_read = sizeof(struct usb_ctrlrequest);
 567
 568         readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 569
 570         dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 571                 bytes_read, crq->bRequest, crq->bRequestType,
 572                 crq->wValue, crq->wIndex, crq->wLength);
 573
 574         return bytes_read;
 575 }
 576
 577 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 578                 struct usb_ctrlrequest *crq)
 579 {
 580         u16 status = 0;
 581         u8 ep_num = crq->wIndex & 0x7F;
 582         u8 is_in = crq->wIndex & USB_DIR_IN;
 583
 584         switch (crq->bRequestType & USB_RECIP_MASK) {
 585         case USB_RECIP_INTERFACE:
 586                 break;
 587
 588         case USB_RECIP_DEVICE:
 589                 status = dev->devstatus;
 590                 break;
 591
 592         case USB_RECIP_ENDPOINT:
 593                 if (ep_num > 4 || crq->wLength > 2)
 594                         return 1;
 595
 596                 if (ep_num == 0) {
 597                         udc_write(0, S3C2410_UDC_INDEX_REG);
 598                         status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 599                         status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 600                 } else {
 601                         udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 602                         if (is_in) {
 603                                 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 604                                 status = status & S3C2410_UDC_ICSR1_SENDSTL;
 605                         } else {
 606                                 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 607                                 status = status & S3C2410_UDC_OCSR1_SENDSTL;
 608                         }
 609                 }
 610
 611                 status = status ? 1 : 0;
 612                 break;
 613
 614         default:
 615                 return 1;
 616         }
 617
 618         /* Seems to be needed to get it working. ouch :( */
 619         udelay(5);
 620         udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 621         udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 622         s3c2410_udc_set_ep0_de_in(base_addr);
 623
 624         return 0;
 625 }
 626 /*------------------------- usb state machine -------------------------------*/
 627 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 628
 629 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 630                                         struct s3c2410_ep *ep,
 631                                         struct usb_ctrlrequest *crq,
 632                                         u32 ep0csr)
 633 {
 634         int len, ret, tmp;
 635
 636         /* start control request? */
 637         if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 638                 return;
 639
 640         s3c2410_udc_nuke(dev, ep, -EPROTO);
 641
 642         len = s3c2410_udc_read_fifo_crq(crq);
 643         if (len != sizeof(*crq)) {
 644                 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 645                         " wanted %d bytes got %d. Stalling out...\n",
 646                         sizeof(*crq), len);
 647                 s3c2410_udc_set_ep0_ss(base_addr);
 648                 return;
 649         }
 650
 651         dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 652                 crq->bRequest, crq->bRequestType, crq->wLength);
 653
 654         /* cope with automagic for some standard requests. */
 655         dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 656                 == USB_TYPE_STANDARD;
 657         dev->req_config = 0;
 658         dev->req_pending = 1;
 659
 660         switch (crq->bRequest) {
 661         case USB_REQ_SET_CONFIGURATION:
 662                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n");
 663
 664                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 665                         dev->req_config = 1;
 666                         s3c2410_udc_set_ep0_de_out(base_addr);
 667                 }
 668                 break;
 669
 670         case USB_REQ_SET_INTERFACE:
 671                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n");
 672
 673                 if (crq->bRequestType == USB_RECIP_INTERFACE) {
 674                         dev->req_config = 1;
 675                         s3c2410_udc_set_ep0_de_out(base_addr);
 676                 }
 677                 break;
 678
 679         case USB_REQ_SET_ADDRESS:
 680                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n");
 681
 682                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 683                         tmp = crq->wValue & 0x7F;
 684                         dev->address = tmp;
 685                         udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 686                                         S3C2410_UDC_FUNC_ADDR_REG);
 687                         s3c2410_udc_set_ep0_de_out(base_addr);
 688                         return;
 689                 }
 690                 break;
 691
 692         case USB_REQ_GET_STATUS:
 693                 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n");
 694                 s3c2410_udc_clear_ep0_opr(base_addr);
 695
 696                 if (dev->req_std) {
 697                         if (!s3c2410_udc_get_status(dev, crq)) {
 698                                 return;
 699                         }
 700                 }
 701                 break;
 702
 703         case USB_REQ_CLEAR_FEATURE:
 704                 s3c2410_udc_clear_ep0_opr(base_addr);
 705
 706                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 707                         break;
 708
 709                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 710                         break;
 711
 712                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 713                 s3c2410_udc_set_ep0_de_out(base_addr);
 714                 return;
 715
 716         case USB_REQ_SET_FEATURE:
 717                 s3c2410_udc_clear_ep0_opr(base_addr);
 718
 719                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 720                         break;
 721
 722                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 723                         break;
 724
 725                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 726                 s3c2410_udc_set_ep0_de_out(base_addr);
 727                 return;
 728
 729         default:
 730                 s3c2410_udc_clear_ep0_opr(base_addr);
 731                 break;
 732         }
 733
 734         if (crq->bRequestType & USB_DIR_IN)
 735                 dev->ep0state = EP0_IN_DATA_PHASE;
 736         else
 737                 dev->ep0state = EP0_OUT_DATA_PHASE;
 738
 739         ret = dev->driver->setup(&dev->gadget, crq);
 740         if (ret < 0) {
 741                 if (dev->req_config) {
 742                         dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 743                                 crq->bRequest, ret);
 744                         return;
 745                 }
 746
 747                 if (ret == -EOPNOTSUPP)
 748                         dprintk(DEBUG_NORMAL, "Operation not supported\n");
 749                 else
 750                         dprintk(DEBUG_NORMAL,
 751                                 "dev->driver->setup failed. (%d)\n", ret);
 752
 753                 udelay(5);
 754                 s3c2410_udc_set_ep0_ss(base_addr);
 755                 s3c2410_udc_set_ep0_de_out(base_addr);
 756                 dev->ep0state = EP0_IDLE;
 757                 /* deferred i/o == no response yet */
 758         } else if (dev->req_pending) {
 759                 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 760                 dev->req_pending=0;
 761         }
 762
 763         dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 764 }
 765
 766 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 767 {
 768         u32                     ep0csr;
 769         struct s3c2410_ep       *ep = &dev->ep[0];
 770         struct s3c2410_request  *req;
 771         struct usb_ctrlrequest  crq;
 772
 773         if (list_empty(&ep->queue))
 774                 req = NULL;
 775         else
 776                 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 777
 778         /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 779          * S3C2410_UDC_EP0_CSR_REG when index is zero */
 780
 781         udc_write(0, S3C2410_UDC_INDEX_REG);
 782         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 783
 784         dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 785                 ep0csr, ep0states[dev->ep0state]);
 786
 787         /* clear stall status */
 788         if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 789                 s3c2410_udc_nuke(dev, ep, -EPIPE);
 790                 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 791                 s3c2410_udc_clear_ep0_sst(base_addr);
 792                 dev->ep0state = EP0_IDLE;
 793                 return;
 794         }
 795
 796         /* clear setup end */
 797         if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 798                 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 799                 s3c2410_udc_nuke(dev, ep, 0);
 800                 s3c2410_udc_clear_ep0_se(base_addr);
 801                 dev->ep0state = EP0_IDLE;
 802         }
 803
 804         switch (dev->ep0state) {
 805         case EP0_IDLE:
 806                 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 807                 break;
 808
 809         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 810                 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 811                 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) {
 812                         s3c2410_udc_write_fifo(ep, req);
 813                 }
 814                 break;
 815
 816         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 817                 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 818                 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) {
 819                         s3c2410_udc_read_fifo(ep,req);
 820                 }
 821                 break;
 822
 823         case EP0_END_XFER:
 824                 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 825                 dev->ep0state = EP0_IDLE;
 826                 break;
 827
 828         case EP0_STALL:
 829                 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 830                 dev->ep0state = EP0_IDLE;
 831                 break;
 832         }
 833 }
 834
 835 /*
 836  *      handle_ep - Manage I/O endpoints
 837  */
 838
 839 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 840 {
 841         struct s3c2410_request  *req;
 842         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 843         u32                     ep_csr1;
 844         u32                     idx;
 845
 846         if (likely (!list_empty(&ep->queue)))
 847                 req = list_entry(ep->queue.next,
 848                                 struct s3c2410_request, queue);
 849         else
 850                 req = NULL;
 851
 852         idx = ep->bEndpointAddress & 0x7F;
 853
 854         if (is_in) {
 855                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 856                 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 857                 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 858                         idx, ep_csr1, req ? 1 : 0);
 859
 860                 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 861                         dprintk(DEBUG_VERBOSE, "st\n");
 862                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 863                         udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 864                                         S3C2410_UDC_IN_CSR1_REG);
 865                         return;
 866                 }
 867
 868                 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) {
 869                         s3c2410_udc_write_fifo(ep,req);
 870                 }
 871         } else {
 872                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 873                 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 874                 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 875
 876                 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 877                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 878                         udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 879                                         S3C2410_UDC_OUT_CSR1_REG);
 880                         return;
 881                 }
 882
 883                 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
 884                         s3c2410_udc_read_fifo(ep,req);
 885                 }
 886         }
 887 }
 888
 889 #include <mach/regs-irq.h>
 890
 891 /*
 892  *      s3c2410_udc_irq - interrupt handler
 893  */
 894 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 895 {
 896         struct s3c2410_udc *dev = _dev;
 897         int usb_status;
 898         int usbd_status;
 899         int pwr_reg;
 900         int ep0csr;
 901         int i;
 902         u32 idx;
 903         unsigned long flags;
 904
 905         spin_lock_irqsave(&dev->lock, flags);
 906
 907         /* Driver connected ? */
 908         if (!dev->driver) {
 909                 /* Clear interrupts */
 910                 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 911                                 S3C2410_UDC_USB_INT_REG);
 912                 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 913                                 S3C2410_UDC_EP_INT_REG);
 914         }
 915
 916         /* Save index */
 917         idx = udc_read(S3C2410_UDC_INDEX_REG);
 918
 919         /* Read status registers */
 920         usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 921         usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 922         pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 923
 924         udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 925         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 926
 927         dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 928                 usb_status, usbd_status, pwr_reg, ep0csr);
 929
 930         /*
 931          * Now, handle interrupts. There's two types :
 932          * - Reset, Resume, Suspend coming -> usb_int_reg
 933          * - EP -> ep_int_reg
 934          */
 935
 936         /* RESET */
 937         if (usb_status & S3C2410_UDC_USBINT_RESET) {
 938                 /* two kind of reset :
 939                  * - reset start -> pwr reg = 8
 940                  * - reset end   -> pwr reg = 0
 941                  **/
 942                 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 943                         ep0csr, pwr_reg);
 944
 945                 dev->gadget.speed = USB_SPEED_UNKNOWN;
 946                 udc_write(0x00, S3C2410_UDC_INDEX_REG);
 947                 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 948                                 S3C2410_UDC_MAXP_REG);
 949                 dev->address = 0;
 950
 951                 dev->ep0state = EP0_IDLE;
 952                 dev->gadget.speed = USB_SPEED_FULL;
 953
 954                 /* clear interrupt */
 955                 udc_write(S3C2410_UDC_USBINT_RESET,
 956                                 S3C2410_UDC_USB_INT_REG);
 957
 958                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 959                 spin_unlock_irqrestore(&dev->lock, flags);
 960                 return IRQ_HANDLED;
 961         }
 962
 963         /* RESUME */
 964         if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 965                 dprintk(DEBUG_NORMAL, "USB resume\n");
 966
 967                 /* clear interrupt */
 968                 udc_write(S3C2410_UDC_USBINT_RESUME,
 969                                 S3C2410_UDC_USB_INT_REG);
 970
 971                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 972                                 && dev->driver
 973                                 && dev->driver->resume)
 974                         dev->driver->resume(&dev->gadget);
 975         }
 976
 977         /* SUSPEND */
 978         if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 979                 dprintk(DEBUG_NORMAL, "USB suspend\n");
 980
 981                 /* clear interrupt */
 982                 udc_write(S3C2410_UDC_USBINT_SUSPEND,
 983                                 S3C2410_UDC_USB_INT_REG);
 984
 985                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 986                                 && dev->driver
 987                                 && dev->driver->suspend)
 988                         dev->driver->suspend(&dev->gadget);
 989
 990                 dev->ep0state = EP0_IDLE;
 991         }
 992
 993         /* EP */
 994         /* control traffic */
 995         /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 996          * generate an interrupt
 997          */
 998         if (usbd_status & S3C2410_UDC_INT_EP0) {
 999                 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
1000                 /* Clear the interrupt bit by setting it to 1 */
1001                 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
1002                 s3c2410_udc_handle_ep0(dev);
1003         }
1004
1005         /* endpoint data transfers */
1006         for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1007                 u32 tmp = 1 << i;
1008                 if (usbd_status & tmp) {
1009                         dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1010
1011                         /* Clear the interrupt bit by setting it to 1 */
1012                         udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1013                         s3c2410_udc_handle_ep(&dev->ep[i]);
1014                 }
1015         }
1016
1017         dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1018
1019         /* Restore old index */
1020         udc_write(idx, S3C2410_UDC_INDEX_REG);
1021
1022         spin_unlock_irqrestore(&dev->lock, flags);
1023
1024         return IRQ_HANDLED;
1025 }
1026 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1027
1028 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1029 {
1030         return container_of(ep, struct s3c2410_ep, ep);
1031 }
1032
1033 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1034 {
1035         return container_of(gadget, struct s3c2410_udc, gadget);
1036 }
1037
1038 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1039 {
1040         return container_of(req, struct s3c2410_request, req);
1041 }
1042
1043 /*
1044  *      s3c2410_udc_ep_enable
1045  */
1046 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1047                                  const struct usb_endpoint_descriptor *desc)
1048 {
1049         struct s3c2410_udc      *dev;
1050         struct s3c2410_ep       *ep;
1051         u32                     max, tmp;
1052         unsigned long           flags;
1053         u32                     csr1,csr2;
1054         u32                     int_en_reg;
1055
1056         ep = to_s3c2410_ep(_ep);
1057
1058         if (!_ep || !desc || ep->desc
1059                         || _ep->name == ep0name
1060                         || desc->bDescriptorType != USB_DT_ENDPOINT)
1061                 return -EINVAL;
1062
1063         dev = ep->dev;
1064         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1065                 return -ESHUTDOWN;
1066
1067         max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff;
1068
1069         local_irq_save (flags);
1070         _ep->maxpacket = max & 0x7ff;
1071         ep->desc = desc;
1072         ep->halted = 0;
1073         ep->bEndpointAddress = desc->bEndpointAddress;
1074
1075         /* set max packet */
1076         udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1077         udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1078
1079         /* set type, direction, address; reset fifo counters */
1080         if (desc->bEndpointAddress & USB_DIR_IN) {
1081                 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1082                 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1083
1084                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1085                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1086                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1087                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1088         } else {
1089                 /* don't flush in fifo or it will cause endpoint interrupt */
1090                 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1091                 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1092
1093                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1094                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1095                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1096                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1097
1098                 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1099                 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1100
1101                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1102                 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1103                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1104                 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1105         }
1106
1107         /* enable irqs */
1108         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1109         udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1110
1111         /* print some debug message */
1112         tmp = desc->bEndpointAddress;
1113         dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1114                  _ep->name,ep->num, tmp,
1115                  desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1116
1117         local_irq_restore (flags);
1118         s3c2410_udc_set_halt(_ep, 0);
1119
1120         return 0;
1121 }
1122
1123 /*
1124  * s3c2410_udc_ep_disable
1125  */
1126 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1127 {
1128         struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1129         unsigned long flags;
1130         u32 int_en_reg;
1131
1132         if (!_ep || !ep->desc) {
1133                 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1134                         _ep ? ep->ep.name : NULL);
1135                 return -EINVAL;
1136         }
1137
1138         local_irq_save(flags);
1139
1140         dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1141
1142         ep->desc = NULL;
1143         ep->halted = 1;
1144
1145         s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN);
1146
1147         /* disable irqs */
1148         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1149         udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1150
1151         local_irq_restore(flags);
1152
1153         dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1154
1155         return 0;
1156 }
1157
1158 /*
1159  * s3c2410_udc_alloc_request
1160  */
1161 static struct usb_request *
1162 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1163 {
1164         struct s3c2410_request *req;
1165
1166         dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags);
1167
1168         if (!_ep)
1169                 return NULL;
1170
1171         req = kzalloc (sizeof(struct s3c2410_request), mem_flags);
1172         if (!req)
1173                 return NULL;
1174
1175         INIT_LIST_HEAD (&req->queue);
1176         return &req->req;
1177 }
1178
1179 /*
1180  * s3c2410_udc_free_request
1181  */
1182 static void
1183 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1184 {
1185         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1186         struct s3c2410_request  *req = to_s3c2410_req(_req);
1187
1188         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1189
1190         if (!ep || !_req || (!ep->desc && _ep->name != ep0name))
1191                 return;
1192
1193         WARN_ON (!list_empty (&req->queue));
1194         kfree(req);
1195 }
1196
1197 /*
1198  *      s3c2410_udc_queue
1199  */
1200 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1201                 gfp_t gfp_flags)
1202 {
1203         struct s3c2410_request  *req = to_s3c2410_req(_req);
1204         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1205         struct s3c2410_udc      *dev;
1206         u32                     ep_csr = 0;
1207         int                     fifo_count = 0;
1208         unsigned long           flags;
1209
1210         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1211                 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1212                 return -EINVAL;
1213         }
1214
1215         dev = ep->dev;
1216         if (unlikely (!dev->driver
1217                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1218                 return -ESHUTDOWN;
1219         }
1220
1221         local_irq_save (flags);
1222
1223         if (unlikely(!_req || !_req->complete
1224                         || !_req->buf || !list_empty(&req->queue))) {
1225                 if (!_req)
1226                         dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1227                 else {
1228                         dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1229                                 __func__, !_req->complete,!_req->buf,
1230                                 !list_empty(&req->queue));
1231                 }
1232
1233                 local_irq_restore(flags);
1234                 return -EINVAL;
1235         }
1236
1237         _req->status = -EINPROGRESS;
1238         _req->actual = 0;
1239
1240         dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1241                  __func__, ep->bEndpointAddress, _req->length);
1242
1243         if (ep->bEndpointAddress) {
1244                 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1245
1246                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1247                                 ? S3C2410_UDC_IN_CSR1_REG
1248                                 : S3C2410_UDC_OUT_CSR1_REG);
1249                 fifo_count = s3c2410_udc_fifo_count_out();
1250         } else {
1251                 udc_write(0, S3C2410_UDC_INDEX_REG);
1252                 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1253                 fifo_count = s3c2410_udc_fifo_count_out();
1254         }
1255
1256         /* kickstart this i/o queue? */
1257         if (list_empty(&ep->queue) && !ep->halted) {
1258                 if (ep->bEndpointAddress == 0 /* ep0 */) {
1259                         switch (dev->ep0state) {
1260                         case EP0_IN_DATA_PHASE:
1261                                 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1262                                                 && s3c2410_udc_write_fifo(ep,
1263                                                         req)) {
1264                                         dev->ep0state = EP0_IDLE;
1265                                         req = NULL;
1266                                 }
1267                                 break;
1268
1269                         case EP0_OUT_DATA_PHASE:
1270                                 if ((!_req->length)
1271                                         || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1272                                                 && s3c2410_udc_read_fifo(ep,
1273                                                         req))) {
1274                                         dev->ep0state = EP0_IDLE;
1275                                         req = NULL;
1276                                 }
1277                                 break;
1278
1279                         default:
1280                                 local_irq_restore(flags);
1281                                 return -EL2HLT;
1282                         }
1283                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1284                                 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1285                                 && s3c2410_udc_write_fifo(ep, req)) {
1286                         req = NULL;
1287                 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1288                                 && fifo_count
1289                                 && s3c2410_udc_read_fifo(ep, req)) {
1290                         req = NULL;
1291                 }
1292         }
1293
1294         /* pio or dma irq handler advances the queue. */
1295         if (likely (req != 0))
1296                 list_add_tail(&req->queue, &ep->queue);
1297
1298         local_irq_restore(flags);
1299
1300         dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1301         return 0;
1302 }
1303
1304 /*
1305  *      s3c2410_udc_dequeue
1306  */
1307 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1308 {
1309         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1310         struct s3c2410_udc      *udc;
1311         int                     retval = -EINVAL;
1312         unsigned long           flags;
1313         struct s3c2410_request  *req = NULL;
1314
1315         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1316
1317         if (!the_controller->driver)
1318                 return -ESHUTDOWN;
1319
1320         if (!_ep || !_req)
1321                 return retval;
1322
1323         udc = to_s3c2410_udc(ep->gadget);
1324
1325         local_irq_save (flags);
1326
1327         list_for_each_entry (req, &ep->queue, queue) {
1328                 if (&req->req == _req) {
1329                         list_del_init (&req->queue);
1330                         _req->status = -ECONNRESET;
1331                         retval = 0;
1332                         break;
1333                 }
1334         }
1335
1336         if (retval == 0) {
1337                 dprintk(DEBUG_VERBOSE,
1338                         "dequeued req %p from %s, len %d buf %p\n",
1339                         req, _ep->name, _req->length, _req->buf);
1340
1341                 s3c2410_udc_done(ep, req, -ECONNRESET);
1342         }
1343
1344         local_irq_restore (flags);
1345         return retval;
1346 }
1347
1348 /*
1349  * s3c2410_udc_set_halt
1350  */
1351 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1352 {
1353         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1354         u32                     ep_csr = 0;
1355         unsigned long           flags;
1356         u32                     idx;
1357
1358         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1359                 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1360                 return -EINVAL;
1361         }
1362
1363         local_irq_save (flags);
1364
1365         idx = ep->bEndpointAddress & 0x7F;
1366
1367         if (idx == 0) {
1368                 s3c2410_udc_set_ep0_ss(base_addr);
1369                 s3c2410_udc_set_ep0_de_out(base_addr);
1370         } else {
1371                 udc_write(idx, S3C2410_UDC_INDEX_REG);
1372                 ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN)
1373                                 ? S3C2410_UDC_IN_CSR1_REG
1374                                 : S3C2410_UDC_OUT_CSR1_REG);
1375
1376                 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1377                         if (value)
1378                                 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1379                                         S3C2410_UDC_IN_CSR1_REG);
1380                         else {
1381                                 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1382                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1383                                 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1384                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1385                         }
1386                 } else {
1387                         if (value)
1388                                 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1389                                         S3C2410_UDC_OUT_CSR1_REG);
1390                         else {
1391                                 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1392                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1393                                 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1394                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1395                         }
1396                 }
1397         }
1398
1399         ep->halted = value ? 1 : 0;
1400         local_irq_restore (flags);
1401
1402         return 0;
1403 }
1404
1405 static const struct usb_ep_ops s3c2410_ep_ops = {
1406         .enable         = s3c2410_udc_ep_enable,
1407         .disable        = s3c2410_udc_ep_disable,
1408
1409         .alloc_request  = s3c2410_udc_alloc_request,
1410         .free_request   = s3c2410_udc_free_request,
1411
1412         .queue          = s3c2410_udc_queue,
1413         .dequeue        = s3c2410_udc_dequeue,
1414
1415         .set_halt       = s3c2410_udc_set_halt,
1416 };
1417
1418 /*------------------------- usb_gadget_ops ----------------------------------*/
1419
1420 /*
1421  *      s3c2410_udc_get_frame
1422  */
1423 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1424 {
1425         int tmp;
1426
1427         dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1428
1429         tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1430         tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1431         return tmp;
1432 }
1433
1434 /*
1435  *      s3c2410_udc_wakeup
1436  */
1437 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1438 {
1439         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1440         return 0;
1441 }
1442
1443 /*
1444  *      s3c2410_udc_set_selfpowered
1445  */
1446 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1447 {
1448         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1449
1450         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1451
1452         if (value)
1453                 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1454         else
1455                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1456
1457         return 0;
1458 }
1459
1460 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1461 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1462
1463 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1464 {
1465         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1466
1467         if (udc_info && udc_info->udc_command) {
1468                 if (is_on)
1469                         s3c2410_udc_enable(udc);
1470                 else {
1471                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1472                                 if (udc->driver && udc->driver->disconnect)
1473                                         udc->driver->disconnect(&udc->gadget);
1474
1475                         }
1476                         s3c2410_udc_disable(udc);
1477                 }
1478         }
1479         else
1480                 return -EOPNOTSUPP;
1481
1482         return 0;
1483 }
1484
1485 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1486 {
1487         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1488
1489         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1490
1491         udc->vbus = (is_active != 0);
1492         s3c2410_udc_set_pullup(udc, is_active);
1493         return 0;
1494 }
1495
1496 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1497 {
1498         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1499
1500         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1501
1502         s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1503         return 0;
1504 }
1505
1506 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1507 {
1508         struct s3c2410_udc      *dev = _dev;
1509         unsigned int            value;
1510
1511         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1512
1513         value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1514         if (udc_info->vbus_pin_inverted)
1515                 value = !value;
1516
1517         if (value != dev->vbus)
1518                 s3c2410_udc_vbus_session(&dev->gadget, value);
1519
1520         return IRQ_HANDLED;
1521 }
1522
1523 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1524 {
1525         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1526
1527         if (udc_info && udc_info->vbus_draw) {
1528                 udc_info->vbus_draw(ma);
1529                 return 0;
1530         }
1531
1532         return -ENOTSUPP;
1533 }
1534
1535 static const struct usb_gadget_ops s3c2410_ops = {
1536         .get_frame              = s3c2410_udc_get_frame,
1537         .wakeup                 = s3c2410_udc_wakeup,
1538         .set_selfpowered        = s3c2410_udc_set_selfpowered,
1539         .pullup                 = s3c2410_udc_pullup,
1540         .vbus_session           = s3c2410_udc_vbus_session,
1541         .vbus_draw              = s3c2410_vbus_draw,
1542 };
1543
1544 /*------------------------- gadget driver handling---------------------------*/
1545 /*
1546  * s3c2410_udc_disable
1547  */
1548 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1549 {
1550         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1551
1552         /* Disable all interrupts */
1553         udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1554         udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1555
1556         /* Clear the interrupt registers */
1557         udc_write(S3C2410_UDC_USBINT_RESET
1558                                 | S3C2410_UDC_USBINT_RESUME
1559                                 | S3C2410_UDC_USBINT_SUSPEND,
1560                         S3C2410_UDC_USB_INT_REG);
1561
1562         udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1563
1564         /* Good bye, cruel world */
1565         if (udc_info && udc_info->udc_command)
1566                 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1567
1568         /* Set speed to unknown */
1569         dev->gadget.speed = USB_SPEED_UNKNOWN;
1570 }
1571
1572 /*
1573  * s3c2410_udc_reinit
1574  */
1575 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1576 {
1577         u32 i;
1578
1579         /* device/ep0 records init */
1580         INIT_LIST_HEAD (&dev->gadget.ep_list);
1581         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1582         dev->ep0state = EP0_IDLE;
1583
1584         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1585                 struct s3c2410_ep *ep = &dev->ep[i];
1586
1587                 if (i != 0)
1588                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1589
1590                 ep->dev = dev;
1591                 ep->desc = NULL;
1592                 ep->halted = 0;
1593                 INIT_LIST_HEAD (&ep->queue);
1594         }
1595 }
1596
1597 /*
1598  * s3c2410_udc_enable
1599  */
1600 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1601 {
1602         int i;
1603
1604         dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1605
1606         /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1607         dev->gadget.speed = USB_SPEED_FULL;
1608
1609         /* Set MAXP for all endpoints */
1610         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1611                 udc_write(i, S3C2410_UDC_INDEX_REG);
1612                 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1613                                 S3C2410_UDC_MAXP_REG);
1614         }
1615
1616         /* Set default power state */
1617         udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1618
1619         /* Enable reset and suspend interrupt interrupts */
1620         udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1621                         S3C2410_UDC_USB_INT_EN_REG);
1622
1623         /* Enable ep0 interrupt */
1624         udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1625
1626         /* time to say "hello, world" */
1627         if (udc_info && udc_info->udc_command)
1628                 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1629 }
1630
1631 /*
1632  *      usb_gadget_register_driver
1633  */
1634 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1635 {
1636         struct s3c2410_udc *udc = the_controller;
1637         int             retval;
1638
1639         dprintk(DEBUG_NORMAL, "usb_gadget_register_driver() '%s'\n",
1640                 driver->driver.name);
1641
1642         /* Sanity checks */
1643         if (!udc)
1644                 return -ENODEV;
1645
1646         if (udc->driver)
1647                 return -EBUSY;
1648
1649         if (!driver->bind || !driver->setup
1650                         || driver->speed < USB_SPEED_FULL) {
1651                 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1652                         driver->bind, driver->setup, driver->speed);
1653                 return -EINVAL;
1654         }
1655 #if defined(MODULE)
1656         if (!driver->unbind) {
1657                 printk(KERN_ERR "Invalid driver: no unbind method\n");
1658                 return -EINVAL;
1659         }
1660 #endif
1661
1662         /* Hook the driver */
1663         udc->driver = driver;
1664         udc->gadget.dev.driver = &driver->driver;
1665
1666         /* Bind the driver */
1667         if ((retval = device_add(&udc->gadget.dev)) != 0) {
1668                 printk(KERN_ERR "Error in device_add() : %d\n",retval);
1669                 goto register_error;
1670         }
1671
1672         dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n",
1673                 driver->driver.name);
1674
1675         if ((retval = driver->bind (&udc->gadget)) != 0) {
1676                 device_del(&udc->gadget.dev);
1677                 goto register_error;
1678         }
1679
1680         /* Enable udc */
1681         s3c2410_udc_enable(udc);
1682
1683         return 0;
1684
1685 register_error:
1686         udc->driver = NULL;
1687         udc->gadget.dev.driver = NULL;
1688         return retval;
1689 }
1690
1691 /*
1692  *      usb_gadget_unregister_driver
1693  */
1694 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1695 {
1696         struct s3c2410_udc *udc = the_controller;
1697
1698         if (!udc)
1699                 return -ENODEV;
1700
1701         if (!driver || driver != udc->driver || !driver->unbind)
1702                 return -EINVAL;
1703
1704         dprintk(DEBUG_NORMAL,"usb_gadget_register_driver() '%s'\n",
1705                 driver->driver.name);
1706
1707         if (driver->disconnect)
1708                 driver->disconnect(&udc->gadget);
1709
1710         device_del(&udc->gadget.dev);
1711         udc->driver = NULL;
1712
1713         /* Disable udc */
1714         s3c2410_udc_disable(udc);
1715
1716         return 0;
1717 }
1718
1719 /*---------------------------------------------------------------------------*/
1720 static struct s3c2410_udc memory = {
1721         .gadget = {
1722                 .ops            = &s3c2410_ops,
1723                 .ep0            = &memory.ep[0].ep,
1724                 .name           = gadget_name,
1725                 .dev = {
1726                         .init_name      = "gadget",
1727                 },
1728         },
1729
1730         /* control endpoint */
1731         .ep[0] = {
1732                 .num            = 0,
1733                 .ep = {
1734                         .name           = ep0name,
1735                         .ops            = &s3c2410_ep_ops,
1736                         .maxpacket      = EP0_FIFO_SIZE,
1737                 },
1738                 .dev            = &memory,
1739         },
1740
1741         /* first group of endpoints */
1742         .ep[1] = {
1743                 .num            = 1,
1744                 .ep = {
1745                         .name           = "ep1-bulk",
1746                         .ops            = &s3c2410_ep_ops,
1747                         .maxpacket      = EP_FIFO_SIZE,
1748                 },
1749                 .dev            = &memory,
1750                 .fifo_size      = EP_FIFO_SIZE,
1751                 .bEndpointAddress = 1,
1752                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1753         },
1754         .ep[2] = {
1755                 .num            = 2,
1756                 .ep = {
1757                         .name           = "ep2-bulk",
1758                         .ops            = &s3c2410_ep_ops,
1759                         .maxpacket      = EP_FIFO_SIZE,
1760                 },
1761                 .dev            = &memory,
1762                 .fifo_size      = EP_FIFO_SIZE,
1763                 .bEndpointAddress = 2,
1764                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1765         },
1766         .ep[3] = {
1767                 .num            = 3,
1768                 .ep = {
1769                         .name           = "ep3-bulk",
1770                         .ops            = &s3c2410_ep_ops,
1771                         .maxpacket      = EP_FIFO_SIZE,
1772                 },
1773                 .dev            = &memory,
1774                 .fifo_size      = EP_FIFO_SIZE,
1775                 .bEndpointAddress = 3,
1776                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1777         },
1778         .ep[4] = {
1779                 .num            = 4,
1780                 .ep = {
1781                         .name           = "ep4-bulk",
1782                         .ops            = &s3c2410_ep_ops,
1783                         .maxpacket      = EP_FIFO_SIZE,
1784                 },
1785                 .dev            = &memory,
1786                 .fifo_size      = EP_FIFO_SIZE,
1787                 .bEndpointAddress = 4,
1788                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1789         }
1790
1791 };
1792
1793 /*
1794  *      probe - binds to the platform device
1795  */
1796 static int s3c2410_udc_probe(struct platform_device *pdev)
1797 {
1798         struct s3c2410_udc *udc = &memory;
1799         struct device *dev = &pdev->dev;
1800         int retval;
1801         int irq;
1802
1803         dev_dbg(dev, "%s()\n", __func__);
1804
1805         usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1806         if (IS_ERR(usb_bus_clock)) {
1807                 dev_err(dev, "failed to get usb bus clock source\n");
1808                 return PTR_ERR(usb_bus_clock);
1809         }
1810
1811         clk_enable(usb_bus_clock);
1812
1813         udc_clock = clk_get(NULL, "usb-device");
1814         if (IS_ERR(udc_clock)) {
1815                 dev_err(dev, "failed to get udc clock source\n");
1816                 return PTR_ERR(udc_clock);
1817         }
1818
1819         clk_enable(udc_clock);
1820
1821         mdelay(10);
1822
1823         dev_dbg(dev, "got and enabled clocks\n");
1824
1825         if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1826                 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1827                 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1828                 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1829                 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1830                 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1831         }
1832
1833         spin_lock_init (&udc->lock);
1834         udc_info = pdev->dev.platform_data;
1835
1836         rsrc_start = S3C2410_PA_USBDEV;
1837         rsrc_len   = S3C24XX_SZ_USBDEV;
1838
1839         if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1840                 return -EBUSY;
1841
1842         base_addr = ioremap(rsrc_start, rsrc_len);
1843         if (!base_addr) {
1844                 retval = -ENOMEM;
1845                 goto err_mem;
1846         }
1847
1848         device_initialize(&udc->gadget.dev);
1849         udc->gadget.dev.parent = &pdev->dev;
1850         udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1851
1852         the_controller = udc;
1853         platform_set_drvdata(pdev, udc);
1854
1855         s3c2410_udc_disable(udc);
1856         s3c2410_udc_reinit(udc);
1857
1858         /* irq setup after old hardware state is cleaned up */
1859         retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1860                              IRQF_DISABLED, gadget_name, udc);
1861
1862         if (retval != 0) {
1863                 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1864                 retval = -EBUSY;
1865                 goto err_map;
1866         }
1867
1868         dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1869
1870         if (udc_info && udc_info->vbus_pin > 0) {
1871                 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1872                 if (retval < 0) {
1873                         dev_err(dev, "cannot claim vbus pin\n");
1874                         goto err_int;
1875                 }
1876
1877                 irq = gpio_to_irq(udc_info->vbus_pin);
1878                 if (irq < 0) {
1879                         dev_err(dev, "no irq for gpio vbus pin\n");
1880                         goto err_gpio_claim;
1881                 }
1882
1883                 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1884                                      IRQF_DISABLED | IRQF_TRIGGER_RISING
1885                                      | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1886                                      gadget_name, udc);
1887
1888                 if (retval != 0) {
1889                         dev_err(dev, "can't get vbus irq %d, err %d\n",
1890                                 irq, retval);
1891                         retval = -EBUSY;
1892                         goto err_gpio_claim;
1893                 }
1894
1895                 dev_dbg(dev, "got irq %i\n", irq);
1896         } else {
1897                 udc->vbus = 1;
1898         }
1899
1900         if (s3c2410_udc_debugfs_root) {
1901                 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1902                                 s3c2410_udc_debugfs_root,
1903                                 udc, &s3c2410_udc_debugfs_fops);
1904                 if (!udc->regs_info)
1905                         dev_warn(dev, "debugfs file creation failed\n");
1906         }
1907
1908         dev_dbg(dev, "probe ok\n");
1909
1910         return 0;
1911
1912 err_gpio_claim:
1913         if (udc_info && udc_info->vbus_pin > 0)
1914                 gpio_free(udc_info->vbus_pin);
1915 err_int:
1916         free_irq(IRQ_USBD, udc);
1917 err_map:
1918         iounmap(base_addr);
1919 err_mem:
1920         release_mem_region(rsrc_start, rsrc_len);
1921
1922         return retval;
1923 }
1924
1925 /*
1926  *      s3c2410_udc_remove
1927  */
1928 static int s3c2410_udc_remove(struct platform_device *pdev)
1929 {
1930         struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1931         unsigned int irq;
1932
1933         dev_dbg(&pdev->dev, "%s()\n", __func__);
1934         if (udc->driver)
1935                 return -EBUSY;
1936
1937         debugfs_remove(udc->regs_info);
1938
1939         if (udc_info && udc_info->vbus_pin > 0) {
1940                 irq = gpio_to_irq(udc_info->vbus_pin);
1941                 free_irq(irq, udc);
1942         }
1943
1944         free_irq(IRQ_USBD, udc);
1945
1946         iounmap(base_addr);
1947         release_mem_region(rsrc_start, rsrc_len);
1948
1949         platform_set_drvdata(pdev, NULL);
1950
1951         if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1952                 clk_disable(udc_clock);
1953                 clk_put(udc_clock);
1954                 udc_clock = NULL;
1955         }
1956
1957         if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1958                 clk_disable(usb_bus_clock);
1959                 clk_put(usb_bus_clock);
1960                 usb_bus_clock = NULL;
1961         }
1962
1963         dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1964         return 0;
1965 }
1966
1967 #ifdef CONFIG_PM
1968 static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1969 {
1970         if (udc_info && udc_info->udc_command)
1971                 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1972
1973         return 0;
1974 }
1975
1976 static int s3c2410_udc_resume(struct platform_device *pdev)
1977 {
1978         if (udc_info && udc_info->udc_command)
1979                 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1980
1981         return 0;
1982 }
1983 #else
1984 #define s3c2410_udc_suspend     NULL
1985 #define s3c2410_udc_resume      NULL
1986 #endif
1987
1988 static struct platform_driver udc_driver_2410 = {
1989         .driver         = {
1990                 .name   = "s3c2410-usbgadget",
1991                 .owner  = THIS_MODULE,
1992         },
1993         .probe          = s3c2410_udc_probe,
1994         .remove         = s3c2410_udc_remove,
1995         .suspend        = s3c2410_udc_suspend,
1996         .resume         = s3c2410_udc_resume,
1997 };
1998
1999 static struct platform_driver udc_driver_2440 = {
2000         .driver         = {
2001                 .name   = "s3c2440-usbgadget",
2002                 .owner  = THIS_MODULE,
2003         },
2004         .probe          = s3c2410_udc_probe,
2005         .remove         = s3c2410_udc_remove,
2006         .suspend        = s3c2410_udc_suspend,
2007         .resume         = s3c2410_udc_resume,
2008 };
2009
2010 static int __init udc_init(void)
2011 {
2012         int retval;
2013
2014         dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2015
2016         s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2017         if (IS_ERR(s3c2410_udc_debugfs_root)) {
2018                 printk(KERN_ERR "%s: debugfs dir creation failed %ld\n",
2019                         gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2020                 s3c2410_udc_debugfs_root = NULL;
2021         }
2022
2023         retval = platform_driver_register(&udc_driver_2410);
2024         if (retval)
2025                 goto err;
2026
2027         retval = platform_driver_register(&udc_driver_2440);
2028         if (retval)
2029                 goto err;
2030
2031         return 0;
2032
2033 err:
2034         debugfs_remove(s3c2410_udc_debugfs_root);
2035         return retval;
2036 }
2037
2038 static void __exit udc_exit(void)
2039 {
2040         platform_driver_unregister(&udc_driver_2410);
2041         platform_driver_unregister(&udc_driver_2440);
2042         debugfs_remove(s3c2410_udc_debugfs_root);
2043 }
2044
2045 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2046 EXPORT_SYMBOL(usb_gadget_register_driver);
2047
2048 module_init(udc_init);
2049 module_exit(udc_exit);
2050
2051 MODULE_AUTHOR(DRIVER_AUTHOR);
2052 MODULE_DESCRIPTION(DRIVER_DESC);
2053 MODULE_VERSION(DRIVER_VERSION);
2054 MODULE_LICENSE("GPL");
2055 MODULE_ALIAS("platform:s3c2410-usbgadget");
2056 MODULE_ALIAS("platform:s3c2440-usbgadget");