git.oblomov.eu Git - linux-2.6/blob - drivers/net/igb/igb_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for igb */
  29
  30 #include <linux/vmalloc.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/pci.h>
  33 #include <linux/delay.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/if_ether.h>
  36 #include <linux/ethtool.h>
  37
  38 #include "igb.h"
  39
  40 struct igb_stats {
  41         char stat_string[ETH_GSTRING_LEN];
  42         int sizeof_stat;
  43         int stat_offset;
  44 };
  45
  46 #define IGB_STAT(m) FIELD_SIZEOF(struct igb_adapter, m), \
  47                       offsetof(struct igb_adapter, m)
  48 static const struct igb_stats igb_gstrings_stats[] = {
  49         { "rx_packets", IGB_STAT(stats.gprc) },
  50         { "tx_packets", IGB_STAT(stats.gptc) },
  51         { "rx_bytes", IGB_STAT(stats.gorc) },
  52         { "tx_bytes", IGB_STAT(stats.gotc) },
  53         { "rx_broadcast", IGB_STAT(stats.bprc) },
  54         { "tx_broadcast", IGB_STAT(stats.bptc) },
  55         { "rx_multicast", IGB_STAT(stats.mprc) },
  56         { "tx_multicast", IGB_STAT(stats.mptc) },
  57         { "rx_errors", IGB_STAT(net_stats.rx_errors) },
  58         { "tx_errors", IGB_STAT(net_stats.tx_errors) },
  59         { "tx_dropped", IGB_STAT(net_stats.tx_dropped) },
  60         { "multicast", IGB_STAT(stats.mprc) },
  61         { "collisions", IGB_STAT(stats.colc) },
  62         { "rx_length_errors", IGB_STAT(net_stats.rx_length_errors) },
  63         { "rx_over_errors", IGB_STAT(net_stats.rx_over_errors) },
  64         { "rx_crc_errors", IGB_STAT(stats.crcerrs) },
  65         { "rx_frame_errors", IGB_STAT(net_stats.rx_frame_errors) },
  66         { "rx_no_buffer_count", IGB_STAT(stats.rnbc) },
  67         { "rx_missed_errors", IGB_STAT(stats.mpc) },
  68         { "tx_aborted_errors", IGB_STAT(stats.ecol) },
  69         { "tx_carrier_errors", IGB_STAT(stats.tncrs) },
  70         { "tx_fifo_errors", IGB_STAT(net_stats.tx_fifo_errors) },
  71         { "tx_heartbeat_errors", IGB_STAT(net_stats.tx_heartbeat_errors) },
  72         { "tx_window_errors", IGB_STAT(stats.latecol) },
  73         { "tx_abort_late_coll", IGB_STAT(stats.latecol) },
  74         { "tx_deferred_ok", IGB_STAT(stats.dc) },
  75         { "tx_single_coll_ok", IGB_STAT(stats.scc) },
  76         { "tx_multi_coll_ok", IGB_STAT(stats.mcc) },
  77         { "tx_timeout_count", IGB_STAT(tx_timeout_count) },
  78         { "tx_restart_queue", IGB_STAT(restart_queue) },
  79         { "rx_long_length_errors", IGB_STAT(stats.roc) },
  80         { "rx_short_length_errors", IGB_STAT(stats.ruc) },
  81         { "rx_align_errors", IGB_STAT(stats.algnerrc) },
  82         { "tx_tcp_seg_good", IGB_STAT(stats.tsctc) },
  83         { "tx_tcp_seg_failed", IGB_STAT(stats.tsctfc) },
  84         { "rx_flow_control_xon", IGB_STAT(stats.xonrxc) },
  85         { "rx_flow_control_xoff", IGB_STAT(stats.xoffrxc) },
  86         { "tx_flow_control_xon", IGB_STAT(stats.xontxc) },
  87         { "tx_flow_control_xoff", IGB_STAT(stats.xofftxc) },
  88         { "rx_long_byte_count", IGB_STAT(stats.gorc) },
  89         { "rx_csum_offload_good", IGB_STAT(hw_csum_good) },
  90         { "rx_csum_offload_errors", IGB_STAT(hw_csum_err) },
  91         { "rx_header_split", IGB_STAT(rx_hdr_split) },
  92         { "alloc_rx_buff_failed", IGB_STAT(alloc_rx_buff_failed) },
  93         { "tx_smbus", IGB_STAT(stats.mgptc) },
  94         { "rx_smbus", IGB_STAT(stats.mgprc) },
  95         { "dropped_smbus", IGB_STAT(stats.mgpdc) },
  96 };
  97
  98 #define IGB_QUEUE_STATS_LEN \
  99         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues + \
 100          ((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues) * \
 101         (sizeof(struct igb_queue_stats) / sizeof(u64)))
 102 #define IGB_GLOBAL_STATS_LEN    \
 103         sizeof(igb_gstrings_stats) / sizeof(struct igb_stats)
 104 #define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN)
 105 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 106         "Register test  (offline)", "Eeprom test    (offline)",
 107         "Interrupt test (offline)", "Loopback test  (offline)",
 108         "Link test   (on/offline)"
 109 };
 110 #define IGB_TEST_LEN sizeof(igb_gstrings_test) / ETH_GSTRING_LEN
 111
 112 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 113 {
 114         struct igb_adapter *adapter = netdev_priv(netdev);
 115         struct e1000_hw *hw = &adapter->hw;
 116
 117         if (hw->phy.media_type == e1000_media_type_copper) {
 118
 119                 ecmd->supported = (SUPPORTED_10baseT_Half |
 120                                    SUPPORTED_10baseT_Full |
 121                                    SUPPORTED_100baseT_Half |
 122                                    SUPPORTED_100baseT_Full |
 123                                    SUPPORTED_1000baseT_Full|
 124                                    SUPPORTED_Autoneg |
 125                                    SUPPORTED_TP);
 126                 ecmd->advertising = ADVERTISED_TP;
 127
 128                 if (hw->mac.autoneg == 1) {
 129                         ecmd->advertising |= ADVERTISED_Autoneg;
 130                         /* the e1000 autoneg seems to match ethtool nicely */
 131                         ecmd->advertising |= hw->phy.autoneg_advertised;
 132                 }
 133
 134                 ecmd->port = PORT_TP;
 135                 ecmd->phy_address = hw->phy.addr;
 136         } else {
 137                 ecmd->supported   = (SUPPORTED_1000baseT_Full |
 138                                      SUPPORTED_FIBRE |
 139                                      SUPPORTED_Autoneg);
 140
 141                 ecmd->advertising = (ADVERTISED_1000baseT_Full |
 142                                      ADVERTISED_FIBRE |
 143                                      ADVERTISED_Autoneg);
 144
 145                 ecmd->port = PORT_FIBRE;
 146         }
 147
 148         ecmd->transceiver = XCVR_INTERNAL;
 149
 150         if (rd32(E1000_STATUS) & E1000_STATUS_LU) {
 151
 152                 adapter->hw.mac.ops.get_speed_and_duplex(hw,
 153                                         &adapter->link_speed,
 154                                         &adapter->link_duplex);
 155                 ecmd->speed = adapter->link_speed;
 156
 157                 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
 158                  *          and HALF_DUPLEX != DUPLEX_HALF */
 159
 160                 if (adapter->link_duplex == FULL_DUPLEX)
 161                         ecmd->duplex = DUPLEX_FULL;
 162                 else
 163                         ecmd->duplex = DUPLEX_HALF;
 164         } else {
 165                 ecmd->speed = -1;
 166                 ecmd->duplex = -1;
 167         }
 168
 169         ecmd->autoneg = ((hw->phy.media_type == e1000_media_type_fiber) ||
 170                          hw->mac.autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
 171         return 0;
 172 }
 173
 174 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 175 {
 176         struct igb_adapter *adapter = netdev_priv(netdev);
 177         struct e1000_hw *hw = &adapter->hw;
 178
 179         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 180          * cannot be changed */
 181         if (igb_check_reset_block(hw)) {
 182                 dev_err(&adapter->pdev->dev, "Cannot change link "
 183                         "characteristics when SoL/IDER is active.\n");
 184                 return -EINVAL;
 185         }
 186
 187         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 188                 msleep(1);
 189
 190         if (ecmd->autoneg == AUTONEG_ENABLE) {
 191                 hw->mac.autoneg = 1;
 192                 if (hw->phy.media_type == e1000_media_type_fiber)
 193                         hw->phy.autoneg_advertised = ADVERTISED_1000baseT_Full |
 194                                                      ADVERTISED_FIBRE |
 195                                                      ADVERTISED_Autoneg;
 196                 else
 197                         hw->phy.autoneg_advertised = ecmd->advertising |
 198                                                      ADVERTISED_TP |
 199                                                      ADVERTISED_Autoneg;
 200                 ecmd->advertising = hw->phy.autoneg_advertised;
 201         } else
 202                 if (igb_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
 203                         clear_bit(__IGB_RESETTING, &adapter->state);
 204                         return -EINVAL;
 205                 }
 206
 207         /* reset the link */
 208
 209         if (netif_running(adapter->netdev)) {
 210                 igb_down(adapter);
 211                 igb_up(adapter);
 212         } else
 213                 igb_reset(adapter);
 214
 215         clear_bit(__IGB_RESETTING, &adapter->state);
 216         return 0;
 217 }
 218
 219 static void igb_get_pauseparam(struct net_device *netdev,
 220                                struct ethtool_pauseparam *pause)
 221 {
 222         struct igb_adapter *adapter = netdev_priv(netdev);
 223         struct e1000_hw *hw = &adapter->hw;
 224
 225         pause->autoneg =
 226                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 227
 228         if (hw->fc.type == e1000_fc_rx_pause)
 229                 pause->rx_pause = 1;
 230         else if (hw->fc.type == e1000_fc_tx_pause)
 231                 pause->tx_pause = 1;
 232         else if (hw->fc.type == e1000_fc_full) {
 233                 pause->rx_pause = 1;
 234                 pause->tx_pause = 1;
 235         }
 236 }
 237
 238 static int igb_set_pauseparam(struct net_device *netdev,
 239                               struct ethtool_pauseparam *pause)
 240 {
 241         struct igb_adapter *adapter = netdev_priv(netdev);
 242         struct e1000_hw *hw = &adapter->hw;
 243         int retval = 0;
 244
 245         adapter->fc_autoneg = pause->autoneg;
 246
 247         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 248                 msleep(1);
 249
 250         if (pause->rx_pause && pause->tx_pause)
 251                 hw->fc.type = e1000_fc_full;
 252         else if (pause->rx_pause && !pause->tx_pause)
 253                 hw->fc.type = e1000_fc_rx_pause;
 254         else if (!pause->rx_pause && pause->tx_pause)
 255                 hw->fc.type = e1000_fc_tx_pause;
 256         else if (!pause->rx_pause && !pause->tx_pause)
 257                 hw->fc.type = e1000_fc_none;
 258
 259         hw->fc.original_type = hw->fc.type;
 260
 261         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 262                 if (netif_running(adapter->netdev)) {
 263                         igb_down(adapter);
 264                         igb_up(adapter);
 265                 } else
 266                         igb_reset(adapter);
 267         } else
 268                 retval = ((hw->phy.media_type == e1000_media_type_fiber) ?
 269                           igb_setup_link(hw) : igb_force_mac_fc(hw));
 270
 271         clear_bit(__IGB_RESETTING, &adapter->state);
 272         return retval;
 273 }
 274
 275 static u32 igb_get_rx_csum(struct net_device *netdev)
 276 {
 277         struct igb_adapter *adapter = netdev_priv(netdev);
 278         return adapter->rx_csum;
 279 }
 280
 281 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
 282 {
 283         struct igb_adapter *adapter = netdev_priv(netdev);
 284         adapter->rx_csum = data;
 285
 286         return 0;
 287 }
 288
 289 static u32 igb_get_tx_csum(struct net_device *netdev)
 290 {
 291         return (netdev->features & NETIF_F_HW_CSUM) != 0;
 292 }
 293
 294 static int igb_set_tx_csum(struct net_device *netdev, u32 data)
 295 {
 296         if (data)
 297                 netdev->features |= NETIF_F_HW_CSUM;
 298         else
 299                 netdev->features &= ~NETIF_F_HW_CSUM;
 300
 301         return 0;
 302 }
 303
 304 static int igb_set_tso(struct net_device *netdev, u32 data)
 305 {
 306         struct igb_adapter *adapter = netdev_priv(netdev);
 307
 308         if (data)
 309                 netdev->features |= NETIF_F_TSO;
 310         else
 311                 netdev->features &= ~NETIF_F_TSO;
 312
 313         if (data)
 314                 netdev->features |= NETIF_F_TSO6;
 315         else
 316                 netdev->features &= ~NETIF_F_TSO6;
 317
 318         dev_info(&adapter->pdev->dev, "TSO is %s\n",
 319                  data ? "Enabled" : "Disabled");
 320         return 0;
 321 }
 322
 323 static u32 igb_get_msglevel(struct net_device *netdev)
 324 {
 325         struct igb_adapter *adapter = netdev_priv(netdev);
 326         return adapter->msg_enable;
 327 }
 328
 329 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 330 {
 331         struct igb_adapter *adapter = netdev_priv(netdev);
 332         adapter->msg_enable = data;
 333 }
 334
 335 static int igb_get_regs_len(struct net_device *netdev)
 336 {
 337 #define IGB_REGS_LEN 551
 338         return IGB_REGS_LEN * sizeof(u32);
 339 }
 340
 341 static void igb_get_regs(struct net_device *netdev,
 342                          struct ethtool_regs *regs, void *p)
 343 {
 344         struct igb_adapter *adapter = netdev_priv(netdev);
 345         struct e1000_hw *hw = &adapter->hw;
 346         u32 *regs_buff = p;
 347         u8 i;
 348
 349         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 350
 351         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
 352
 353         /* General Registers */
 354         regs_buff[0] = rd32(E1000_CTRL);
 355         regs_buff[1] = rd32(E1000_STATUS);
 356         regs_buff[2] = rd32(E1000_CTRL_EXT);
 357         regs_buff[3] = rd32(E1000_MDIC);
 358         regs_buff[4] = rd32(E1000_SCTL);
 359         regs_buff[5] = rd32(E1000_CONNSW);
 360         regs_buff[6] = rd32(E1000_VET);
 361         regs_buff[7] = rd32(E1000_LEDCTL);
 362         regs_buff[8] = rd32(E1000_PBA);
 363         regs_buff[9] = rd32(E1000_PBS);
 364         regs_buff[10] = rd32(E1000_FRTIMER);
 365         regs_buff[11] = rd32(E1000_TCPTIMER);
 366
 367         /* NVM Register */
 368         regs_buff[12] = rd32(E1000_EECD);
 369
 370         /* Interrupt */
 371         /* Reading EICS for EICR because they read the
 372          * same but EICS does not clear on read */
 373         regs_buff[13] = rd32(E1000_EICS);
 374         regs_buff[14] = rd32(E1000_EICS);
 375         regs_buff[15] = rd32(E1000_EIMS);
 376         regs_buff[16] = rd32(E1000_EIMC);
 377         regs_buff[17] = rd32(E1000_EIAC);
 378         regs_buff[18] = rd32(E1000_EIAM);
 379         /* Reading ICS for ICR because they read the
 380          * same but ICS does not clear on read */
 381         regs_buff[19] = rd32(E1000_ICS);
 382         regs_buff[20] = rd32(E1000_ICS);
 383         regs_buff[21] = rd32(E1000_IMS);
 384         regs_buff[22] = rd32(E1000_IMC);
 385         regs_buff[23] = rd32(E1000_IAC);
 386         regs_buff[24] = rd32(E1000_IAM);
 387         regs_buff[25] = rd32(E1000_IMIRVP);
 388
 389         /* Flow Control */
 390         regs_buff[26] = rd32(E1000_FCAL);
 391         regs_buff[27] = rd32(E1000_FCAH);
 392         regs_buff[28] = rd32(E1000_FCTTV);
 393         regs_buff[29] = rd32(E1000_FCRTL);
 394         regs_buff[30] = rd32(E1000_FCRTH);
 395         regs_buff[31] = rd32(E1000_FCRTV);
 396
 397         /* Receive */
 398         regs_buff[32] = rd32(E1000_RCTL);
 399         regs_buff[33] = rd32(E1000_RXCSUM);
 400         regs_buff[34] = rd32(E1000_RLPML);
 401         regs_buff[35] = rd32(E1000_RFCTL);
 402         regs_buff[36] = rd32(E1000_MRQC);
 403         regs_buff[37] = rd32(E1000_VMD_CTL);
 404
 405         /* Transmit */
 406         regs_buff[38] = rd32(E1000_TCTL);
 407         regs_buff[39] = rd32(E1000_TCTL_EXT);
 408         regs_buff[40] = rd32(E1000_TIPG);
 409         regs_buff[41] = rd32(E1000_DTXCTL);
 410
 411         /* Wake Up */
 412         regs_buff[42] = rd32(E1000_WUC);
 413         regs_buff[43] = rd32(E1000_WUFC);
 414         regs_buff[44] = rd32(E1000_WUS);
 415         regs_buff[45] = rd32(E1000_IPAV);
 416         regs_buff[46] = rd32(E1000_WUPL);
 417
 418         /* MAC */
 419         regs_buff[47] = rd32(E1000_PCS_CFG0);
 420         regs_buff[48] = rd32(E1000_PCS_LCTL);
 421         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 422         regs_buff[50] = rd32(E1000_PCS_ANADV);
 423         regs_buff[51] = rd32(E1000_PCS_LPAB);
 424         regs_buff[52] = rd32(E1000_PCS_NPTX);
 425         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 426
 427         /* Statistics */
 428         regs_buff[54] = adapter->stats.crcerrs;
 429         regs_buff[55] = adapter->stats.algnerrc;
 430         regs_buff[56] = adapter->stats.symerrs;
 431         regs_buff[57] = adapter->stats.rxerrc;
 432         regs_buff[58] = adapter->stats.mpc;
 433         regs_buff[59] = adapter->stats.scc;
 434         regs_buff[60] = adapter->stats.ecol;
 435         regs_buff[61] = adapter->stats.mcc;
 436         regs_buff[62] = adapter->stats.latecol;
 437         regs_buff[63] = adapter->stats.colc;
 438         regs_buff[64] = adapter->stats.dc;
 439         regs_buff[65] = adapter->stats.tncrs;
 440         regs_buff[66] = adapter->stats.sec;
 441         regs_buff[67] = adapter->stats.htdpmc;
 442         regs_buff[68] = adapter->stats.rlec;
 443         regs_buff[69] = adapter->stats.xonrxc;
 444         regs_buff[70] = adapter->stats.xontxc;
 445         regs_buff[71] = adapter->stats.xoffrxc;
 446         regs_buff[72] = adapter->stats.xofftxc;
 447         regs_buff[73] = adapter->stats.fcruc;
 448         regs_buff[74] = adapter->stats.prc64;
 449         regs_buff[75] = adapter->stats.prc127;
 450         regs_buff[76] = adapter->stats.prc255;
 451         regs_buff[77] = adapter->stats.prc511;
 452         regs_buff[78] = adapter->stats.prc1023;
 453         regs_buff[79] = adapter->stats.prc1522;
 454         regs_buff[80] = adapter->stats.gprc;
 455         regs_buff[81] = adapter->stats.bprc;
 456         regs_buff[82] = adapter->stats.mprc;
 457         regs_buff[83] = adapter->stats.gptc;
 458         regs_buff[84] = adapter->stats.gorc;
 459         regs_buff[86] = adapter->stats.gotc;
 460         regs_buff[88] = adapter->stats.rnbc;
 461         regs_buff[89] = adapter->stats.ruc;
 462         regs_buff[90] = adapter->stats.rfc;
 463         regs_buff[91] = adapter->stats.roc;
 464         regs_buff[92] = adapter->stats.rjc;
 465         regs_buff[93] = adapter->stats.mgprc;
 466         regs_buff[94] = adapter->stats.mgpdc;
 467         regs_buff[95] = adapter->stats.mgptc;
 468         regs_buff[96] = adapter->stats.tor;
 469         regs_buff[98] = adapter->stats.tot;
 470         regs_buff[100] = adapter->stats.tpr;
 471         regs_buff[101] = adapter->stats.tpt;
 472         regs_buff[102] = adapter->stats.ptc64;
 473         regs_buff[103] = adapter->stats.ptc127;
 474         regs_buff[104] = adapter->stats.ptc255;
 475         regs_buff[105] = adapter->stats.ptc511;
 476         regs_buff[106] = adapter->stats.ptc1023;
 477         regs_buff[107] = adapter->stats.ptc1522;
 478         regs_buff[108] = adapter->stats.mptc;
 479         regs_buff[109] = adapter->stats.bptc;
 480         regs_buff[110] = adapter->stats.tsctc;
 481         regs_buff[111] = adapter->stats.iac;
 482         regs_buff[112] = adapter->stats.rpthc;
 483         regs_buff[113] = adapter->stats.hgptc;
 484         regs_buff[114] = adapter->stats.hgorc;
 485         regs_buff[116] = adapter->stats.hgotc;
 486         regs_buff[118] = adapter->stats.lenerrs;
 487         regs_buff[119] = adapter->stats.scvpc;
 488         regs_buff[120] = adapter->stats.hrmpc;
 489
 490         /* These should probably be added to e1000_regs.h instead */
 491         #define E1000_PSRTYPE_REG(_i) (0x05480 + ((_i) * 4))
 492         #define E1000_IP4AT_REG(_i)   (0x05840 + ((_i) * 8))
 493         #define E1000_IP6AT_REG(_i)   (0x05880 + ((_i) * 4))
 494         #define E1000_WUPM_REG(_i)    (0x05A00 + ((_i) * 4))
 495         #define E1000_FFMT_REG(_i)    (0x09000 + ((_i) * 8))
 496         #define E1000_FFVT_REG(_i)    (0x09800 + ((_i) * 8))
 497         #define E1000_FFLT_REG(_i)    (0x05F00 + ((_i) * 8))
 498
 499         for (i = 0; i < 4; i++)
 500                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 501         for (i = 0; i < 4; i++)
 502                 regs_buff[125 + i] = rd32(E1000_PSRTYPE_REG(i));
 503         for (i = 0; i < 4; i++)
 504                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 505         for (i = 0; i < 4; i++)
 506                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 507         for (i = 0; i < 4; i++)
 508                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 509         for (i = 0; i < 4; i++)
 510                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 511         for (i = 0; i < 4; i++)
 512                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 513         for (i = 0; i < 4; i++)
 514                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 515
 516         for (i = 0; i < 10; i++)
 517                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 518         for (i = 0; i < 8; i++)
 519                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 520         for (i = 0; i < 8; i++)
 521                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 522         for (i = 0; i < 16; i++)
 523                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 524         for (i = 0; i < 16; i++)
 525                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 526
 527         for (i = 0; i < 4; i++)
 528                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 529         for (i = 0; i < 4; i++)
 530                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 531         for (i = 0; i < 4; i++)
 532                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 533         for (i = 0; i < 4; i++)
 534                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 535         for (i = 0; i < 4; i++)
 536                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 537         for (i = 0; i < 4; i++)
 538                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 539         for (i = 0; i < 4; i++)
 540                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 541         for (i = 0; i < 4; i++)
 542                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 543         for (i = 0; i < 4; i++)
 544                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 545
 546         for (i = 0; i < 4; i++)
 547                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 548         for (i = 0; i < 4; i++)
 549                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 550         for (i = 0; i < 32; i++)
 551                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 552         for (i = 0; i < 128; i++)
 553                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 554         for (i = 0; i < 128; i++)
 555                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 556         for (i = 0; i < 4; i++)
 557                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 558
 559         regs_buff[547] = rd32(E1000_TDFH);
 560         regs_buff[548] = rd32(E1000_TDFT);
 561         regs_buff[549] = rd32(E1000_TDFHS);
 562         regs_buff[550] = rd32(E1000_TDFPC);
 563
 564 }
 565
 566 static int igb_get_eeprom_len(struct net_device *netdev)
 567 {
 568         struct igb_adapter *adapter = netdev_priv(netdev);
 569         return adapter->hw.nvm.word_size * 2;
 570 }
 571
 572 static int igb_get_eeprom(struct net_device *netdev,
 573                           struct ethtool_eeprom *eeprom, u8 *bytes)
 574 {
 575         struct igb_adapter *adapter = netdev_priv(netdev);
 576         struct e1000_hw *hw = &adapter->hw;
 577         u16 *eeprom_buff;
 578         int first_word, last_word;
 579         int ret_val = 0;
 580         u16 i;
 581
 582         if (eeprom->len == 0)
 583                 return -EINVAL;
 584
 585         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 586
 587         first_word = eeprom->offset >> 1;
 588         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 589
 590         eeprom_buff = kmalloc(sizeof(u16) *
 591                         (last_word - first_word + 1), GFP_KERNEL);
 592         if (!eeprom_buff)
 593                 return -ENOMEM;
 594
 595         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 596                 ret_val = hw->nvm.ops.read_nvm(hw, first_word,
 597                                             last_word - first_word + 1,
 598                                             eeprom_buff);
 599         else {
 600                 for (i = 0; i < last_word - first_word + 1; i++) {
 601                         ret_val = hw->nvm.ops.read_nvm(hw, first_word + i, 1,
 602                                                     &eeprom_buff[i]);
 603                         if (ret_val)
 604                                 break;
 605                 }
 606         }
 607
 608         /* Device's eeprom is always little-endian, word addressable */
 609         for (i = 0; i < last_word - first_word + 1; i++)
 610                 le16_to_cpus(&eeprom_buff[i]);
 611
 612         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 613                         eeprom->len);
 614         kfree(eeprom_buff);
 615
 616         return ret_val;
 617 }
 618
 619 static int igb_set_eeprom(struct net_device *netdev,
 620                           struct ethtool_eeprom *eeprom, u8 *bytes)
 621 {
 622         struct igb_adapter *adapter = netdev_priv(netdev);
 623         struct e1000_hw *hw = &adapter->hw;
 624         u16 *eeprom_buff;
 625         void *ptr;
 626         int max_len, first_word, last_word, ret_val = 0;
 627         u16 i;
 628
 629         if (eeprom->len == 0)
 630                 return -EOPNOTSUPP;
 631
 632         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 633                 return -EFAULT;
 634
 635         max_len = hw->nvm.word_size * 2;
 636
 637         first_word = eeprom->offset >> 1;
 638         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 639         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 640         if (!eeprom_buff)
 641                 return -ENOMEM;
 642
 643         ptr = (void *)eeprom_buff;
 644
 645         if (eeprom->offset & 1) {
 646                 /* need read/modify/write of first changed EEPROM word */
 647                 /* only the second byte of the word is being modified */
 648                 ret_val = hw->nvm.ops.read_nvm(hw, first_word, 1,
 649                                             &eeprom_buff[0]);
 650                 ptr++;
 651         }
 652         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 653                 /* need read/modify/write of last changed EEPROM word */
 654                 /* only the first byte of the word is being modified */
 655                 ret_val = hw->nvm.ops.read_nvm(hw, last_word, 1,
 656                                    &eeprom_buff[last_word - first_word]);
 657         }
 658
 659         /* Device's eeprom is always little-endian, word addressable */
 660         for (i = 0; i < last_word - first_word + 1; i++)
 661                 le16_to_cpus(&eeprom_buff[i]);
 662
 663         memcpy(ptr, bytes, eeprom->len);
 664
 665         for (i = 0; i < last_word - first_word + 1; i++)
 666                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 667
 668         ret_val = hw->nvm.ops.write_nvm(hw, first_word,
 669                                      last_word - first_word + 1, eeprom_buff);
 670
 671         /* Update the checksum over the first part of the EEPROM if needed
 672          * and flush shadow RAM for 82573 controllers */
 673         if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG)))
 674                 igb_update_nvm_checksum(hw);
 675
 676         kfree(eeprom_buff);
 677         return ret_val;
 678 }
 679
 680 static void igb_get_drvinfo(struct net_device *netdev,
 681                             struct ethtool_drvinfo *drvinfo)
 682 {
 683         struct igb_adapter *adapter = netdev_priv(netdev);
 684         char firmware_version[32];
 685         u16 eeprom_data;
 686
 687         strncpy(drvinfo->driver,  igb_driver_name, 32);
 688         strncpy(drvinfo->version, igb_driver_version, 32);
 689
 690         /* EEPROM image version # is reported as firmware version # for
 691          * 82575 controllers */
 692         adapter->hw.nvm.ops.read_nvm(&adapter->hw, 5, 1, &eeprom_data);
 693         sprintf(firmware_version, "%d.%d-%d",
 694                 (eeprom_data & 0xF000) >> 12,
 695                 (eeprom_data & 0x0FF0) >> 4,
 696                 eeprom_data & 0x000F);
 697
 698         strncpy(drvinfo->fw_version, firmware_version, 32);
 699         strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
 700         drvinfo->n_stats = IGB_STATS_LEN;
 701         drvinfo->testinfo_len = IGB_TEST_LEN;
 702         drvinfo->regdump_len = igb_get_regs_len(netdev);
 703         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
 704 }
 705
 706 static void igb_get_ringparam(struct net_device *netdev,
 707                               struct ethtool_ringparam *ring)
 708 {
 709         struct igb_adapter *adapter = netdev_priv(netdev);
 710
 711         ring->rx_max_pending = IGB_MAX_RXD;
 712         ring->tx_max_pending = IGB_MAX_TXD;
 713         ring->rx_mini_max_pending = 0;
 714         ring->rx_jumbo_max_pending = 0;
 715         ring->rx_pending = adapter->rx_ring_count;
 716         ring->tx_pending = adapter->tx_ring_count;
 717         ring->rx_mini_pending = 0;
 718         ring->rx_jumbo_pending = 0;
 719 }
 720
 721 static int igb_set_ringparam(struct net_device *netdev,
 722                              struct ethtool_ringparam *ring)
 723 {
 724         struct igb_adapter *adapter = netdev_priv(netdev);
 725         struct igb_ring *temp_ring;
 726         int i, err;
 727         u32 new_rx_count, new_tx_count;
 728
 729         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 730                 return -EINVAL;
 731
 732         new_rx_count = max(ring->rx_pending, (u32)IGB_MIN_RXD);
 733         new_rx_count = min(new_rx_count, (u32)IGB_MAX_RXD);
 734         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 735
 736         new_tx_count = max(ring->tx_pending, (u32)IGB_MIN_TXD);
 737         new_tx_count = min(new_tx_count, (u32)IGB_MAX_TXD);
 738         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 739
 740         if ((new_tx_count == adapter->tx_ring_count) &&
 741             (new_rx_count == adapter->rx_ring_count)) {
 742                 /* nothing to do */
 743                 return 0;
 744         }
 745
 746         if (adapter->num_tx_queues > adapter->num_rx_queues)
 747                 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
 748         else
 749                 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
 750         if (!temp_ring)
 751                 return -ENOMEM;
 752
 753         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 754                 msleep(1);
 755
 756         if (netif_running(adapter->netdev))
 757                 igb_down(adapter);
 758
 759         /*
 760          * We can't just free everything and then setup again,
 761          * because the ISRs in MSI-X mode get passed pointers
 762          * to the tx and rx ring structs.
 763          */
 764         if (new_tx_count != adapter->tx_ring_count) {
 765                 memcpy(temp_ring, adapter->tx_ring,
 766                        adapter->num_tx_queues * sizeof(struct igb_ring));
 767
 768                 for (i = 0; i < adapter->num_tx_queues; i++) {
 769                         temp_ring[i].count = new_tx_count;
 770                         err = igb_setup_tx_resources(adapter, &temp_ring[i]);
 771                         if (err) {
 772                                 while (i) {
 773                                         i--;
 774                                         igb_free_tx_resources(&temp_ring[i]);
 775                                 }
 776                                 goto err_setup;
 777                         }
 778                 }
 779
 780                 for (i = 0; i < adapter->num_tx_queues; i++)
 781                         igb_free_tx_resources(&adapter->tx_ring[i]);
 782
 783                 memcpy(adapter->tx_ring, temp_ring,
 784                        adapter->num_tx_queues * sizeof(struct igb_ring));
 785
 786                 adapter->tx_ring_count = new_tx_count;
 787         }
 788
 789         if (new_rx_count != adapter->rx_ring->count) {
 790                 memcpy(temp_ring, adapter->rx_ring,
 791                        adapter->num_rx_queues * sizeof(struct igb_ring));
 792
 793                 for (i = 0; i < adapter->num_rx_queues; i++) {
 794                         temp_ring[i].count = new_rx_count;
 795                         err = igb_setup_rx_resources(adapter, &temp_ring[i]);
 796                         if (err) {
 797                                 while (i) {
 798                                         i--;
 799                                         igb_free_rx_resources(&temp_ring[i]);
 800                                 }
 801                                 goto err_setup;
 802                         }
 803
 804                 }
 805
 806                 for (i = 0; i < adapter->num_rx_queues; i++)
 807                         igb_free_rx_resources(&adapter->rx_ring[i]);
 808
 809                 memcpy(adapter->rx_ring, temp_ring,
 810                        adapter->num_rx_queues * sizeof(struct igb_ring));
 811
 812                 adapter->rx_ring_count = new_rx_count;
 813         }
 814
 815         err = 0;
 816 err_setup:
 817         if (netif_running(adapter->netdev))
 818                 igb_up(adapter);
 819
 820         clear_bit(__IGB_RESETTING, &adapter->state);
 821         vfree(temp_ring);
 822         return err;
 823 }
 824
 825 /* ethtool register test data */
 826 struct igb_reg_test {
 827         u16 reg;
 828         u16 reg_offset;
 829         u16 array_len;
 830         u16 test_type;
 831         u32 mask;
 832         u32 write;
 833 };
 834
 835 /* In the hardware, registers are laid out either singly, in arrays
 836  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 837  * most tests take place on arrays or single registers (handled
 838  * as a single-element array) and special-case the tables.
 839  * Table tests are always pattern tests.
 840  *
 841  * We also make provision for some required setup steps by specifying
 842  * registers to be written without any read-back testing.
 843  */
 844
 845 #define PATTERN_TEST    1
 846 #define SET_READ_TEST   2
 847 #define WRITE_NO_TEST   3
 848 #define TABLE32_TEST    4
 849 #define TABLE64_TEST_LO 5
 850 #define TABLE64_TEST_HI 6
 851
 852 /* 82576 reg test */
 853 static struct igb_reg_test reg_test_82576[] = {
 854         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 855         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 856         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 857         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 858         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 859         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 860         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 861         { E1000_RDBAL(4),  0x40,  8, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 862         { E1000_RDBAH(4),  0x40,  8, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 863         { E1000_RDLEN(4),  0x40,  8, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 864         /* Enable all four RX queues before testing. */
 865         { E1000_RXDCTL(0), 0x100, 1,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 866         /* RDH is read-only for 82576, only test RDT. */
 867         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 868         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
 869         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 870         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 871         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 872         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 873         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 874         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 875         { E1000_TDBAL(4),  0x40, 8,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 876         { E1000_TDBAH(4),  0x40, 8,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 877         { E1000_TDLEN(4),  0x40, 8,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 878         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 879         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 880         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 881         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 882         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 883         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 884         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 885         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 886         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 887         { 0, 0, 0, 0 }
 888 };
 889
 890 /* 82575 register test */
 891 static struct igb_reg_test reg_test_82575[] = {
 892         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 893         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 894         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 895         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 896         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 897         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 898         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 899         /* Enable all four RX queues before testing. */
 900         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 901         /* RDH is read-only for 82575, only test RDT. */
 902         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 903         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
 904         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 905         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 906         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 907         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 908         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 909         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 910         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 911         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
 912         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
 913         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 914         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
 915         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 916         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
 917         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 918         { 0, 0, 0, 0 }
 919 };
 920
 921 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
 922                              int reg, u32 mask, u32 write)
 923 {
 924         u32 pat, val;
 925         u32 _test[] =
 926                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
 927         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
 928                 writel((_test[pat] & write), (adapter->hw.hw_addr + reg));
 929                 val = readl(adapter->hw.hw_addr + reg);
 930                 if (val != (_test[pat] & write & mask)) {
 931                         dev_err(&adapter->pdev->dev, "pattern test reg %04X "
 932                                 "failed: got 0x%08X expected 0x%08X\n",
 933                                 reg, val, (_test[pat] & write & mask));
 934                         *data = reg;
 935                         return 1;
 936                 }
 937         }
 938         return 0;
 939 }
 940
 941 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
 942                               int reg, u32 mask, u32 write)
 943 {
 944         u32 val;
 945         writel((write & mask), (adapter->hw.hw_addr + reg));
 946         val = readl(adapter->hw.hw_addr + reg);
 947         if ((write & mask) != (val & mask)) {
 948                 dev_err(&adapter->pdev->dev, "set/check reg %04X test failed:"
 949                         " got 0x%08X expected 0x%08X\n", reg,
 950                         (val & mask), (write & mask));
 951                 *data = reg;
 952                 return 1;
 953         }
 954         return 0;
 955 }
 956
 957 #define REG_PATTERN_TEST(reg, mask, write) \
 958         do { \
 959                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
 960                         return 1; \
 961         } while (0)
 962
 963 #define REG_SET_AND_CHECK(reg, mask, write) \
 964         do { \
 965                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
 966                         return 1; \
 967         } while (0)
 968
 969 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
 970 {
 971         struct e1000_hw *hw = &adapter->hw;
 972         struct igb_reg_test *test;
 973         u32 value, before, after;
 974         u32 i, toggle;
 975
 976         toggle = 0x7FFFF3FF;
 977
 978         switch (adapter->hw.mac.type) {
 979         case e1000_82576:
 980                 test = reg_test_82576;
 981                 break;
 982         default:
 983                 test = reg_test_82575;
 984                 break;
 985         }
 986
 987         /* Because the status register is such a special case,
 988          * we handle it separately from the rest of the register
 989          * tests.  Some bits are read-only, some toggle, and some
 990          * are writable on newer MACs.
 991          */
 992         before = rd32(E1000_STATUS);
 993         value = (rd32(E1000_STATUS) & toggle);
 994         wr32(E1000_STATUS, toggle);
 995         after = rd32(E1000_STATUS) & toggle;
 996         if (value != after) {
 997                 dev_err(&adapter->pdev->dev, "failed STATUS register test "
 998                         "got: 0x%08X expected: 0x%08X\n", after, value);
 999                 *data = 1;
1000                 return 1;
1001         }
1002         /* restore previous status */
1003         wr32(E1000_STATUS, before);
1004
1005         /* Perform the remainder of the register test, looping through
1006          * the test table until we either fail or reach the null entry.
1007          */
1008         while (test->reg) {
1009                 for (i = 0; i < test->array_len; i++) {
1010                         switch (test->test_type) {
1011                         case PATTERN_TEST:
1012                                 REG_PATTERN_TEST(test->reg + (i * test->reg_offset),
1013                                                 test->mask,
1014                                                 test->write);
1015                                 break;
1016                         case SET_READ_TEST:
1017                                 REG_SET_AND_CHECK(test->reg + (i * test->reg_offset),
1018                                                 test->mask,
1019                                                 test->write);
1020                                 break;
1021                         case WRITE_NO_TEST:
1022                                 writel(test->write,
1023                                     (adapter->hw.hw_addr + test->reg)
1024                                         + (i * test->reg_offset));
1025                                 break;
1026                         case TABLE32_TEST:
1027                                 REG_PATTERN_TEST(test->reg + (i * 4),
1028                                                 test->mask,
1029                                                 test->write);
1030                                 break;
1031                         case TABLE64_TEST_LO:
1032                                 REG_PATTERN_TEST(test->reg + (i * 8),
1033                                                 test->mask,
1034                                                 test->write);
1035                                 break;
1036                         case TABLE64_TEST_HI:
1037                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1038                                                 test->mask,
1039                                                 test->write);
1040                                 break;
1041                         }
1042                 }
1043                 test++;
1044         }
1045
1046         *data = 0;
1047         return 0;
1048 }
1049
1050 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1051 {
1052         u16 temp;
1053         u16 checksum = 0;
1054         u16 i;
1055
1056         *data = 0;
1057         /* Read and add up the contents of the EEPROM */
1058         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1059                 if ((adapter->hw.nvm.ops.read_nvm(&adapter->hw, i, 1, &temp))
1060                     < 0) {
1061                         *data = 1;
1062                         break;
1063                 }
1064                 checksum += temp;
1065         }
1066
1067         /* If Checksum is not Correct return error else test passed */
1068         if ((checksum != (u16) NVM_SUM) && !(*data))
1069                 *data = 2;
1070
1071         return *data;
1072 }
1073
1074 static irqreturn_t igb_test_intr(int irq, void *data)
1075 {
1076         struct net_device *netdev = (struct net_device *) data;
1077         struct igb_adapter *adapter = netdev_priv(netdev);
1078         struct e1000_hw *hw = &adapter->hw;
1079
1080         adapter->test_icr |= rd32(E1000_ICR);
1081
1082         return IRQ_HANDLED;
1083 }
1084
1085 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1086 {
1087         struct e1000_hw *hw = &adapter->hw;
1088         struct net_device *netdev = adapter->netdev;
1089         u32 mask, i = 0, shared_int = true;
1090         u32 irq = adapter->pdev->irq;
1091
1092         *data = 0;
1093
1094         /* Hook up test interrupt handler just for this test */
1095         if (adapter->msix_entries) {
1096                 /* NOTE: we don't test MSI-X interrupts here, yet */
1097                 return 0;
1098         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1099                 shared_int = false;
1100                 if (request_irq(irq, &igb_test_intr, 0, netdev->name, netdev)) {
1101                         *data = 1;
1102                         return -1;
1103                 }
1104         } else if (!request_irq(irq, &igb_test_intr, IRQF_PROBE_SHARED,
1105                                 netdev->name, netdev)) {
1106                 shared_int = false;
1107         } else if (request_irq(irq, &igb_test_intr, IRQF_SHARED,
1108                  netdev->name, netdev)) {
1109                 *data = 1;
1110                 return -1;
1111         }
1112         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1113                 (shared_int ? "shared" : "unshared"));
1114
1115         /* Disable all the interrupts */
1116         wr32(E1000_IMC, 0xFFFFFFFF);
1117         msleep(10);
1118
1119         /* Test each interrupt */
1120         for (; i < 10; i++) {
1121                 /* Interrupt to test */
1122                 mask = 1 << i;
1123
1124                 if (!shared_int) {
1125                         /* Disable the interrupt to be reported in
1126                          * the cause register and then force the same
1127                          * interrupt and see if one gets posted.  If
1128                          * an interrupt was posted to the bus, the
1129                          * test failed.
1130                          */
1131                         adapter->test_icr = 0;
1132                         wr32(E1000_IMC, ~mask & 0x00007FFF);
1133                         wr32(E1000_ICS, ~mask & 0x00007FFF);
1134                         msleep(10);
1135
1136                         if (adapter->test_icr & mask) {
1137                                 *data = 3;
1138                                 break;
1139                         }
1140                 }
1141
1142                 /* Enable the interrupt to be reported in
1143                  * the cause register and then force the same
1144                  * interrupt and see if one gets posted.  If
1145                  * an interrupt was not posted to the bus, the
1146                  * test failed.
1147                  */
1148                 adapter->test_icr = 0;
1149                 wr32(E1000_IMS, mask);
1150                 wr32(E1000_ICS, mask);
1151                 msleep(10);
1152
1153                 if (!(adapter->test_icr & mask)) {
1154                         *data = 4;
1155                         break;
1156                 }
1157
1158                 if (!shared_int) {
1159                         /* Disable the other interrupts to be reported in
1160                          * the cause register and then force the other
1161                          * interrupts and see if any get posted.  If
1162                          * an interrupt was posted to the bus, the
1163                          * test failed.
1164                          */
1165                         adapter->test_icr = 0;
1166                         wr32(E1000_IMC, ~mask & 0x00007FFF);
1167                         wr32(E1000_ICS, ~mask & 0x00007FFF);
1168                         msleep(10);
1169
1170                         if (adapter->test_icr) {
1171                                 *data = 5;
1172                                 break;
1173                         }
1174                 }
1175         }
1176
1177         /* Disable all the interrupts */
1178         wr32(E1000_IMC, 0xFFFFFFFF);
1179         msleep(10);
1180
1181         /* Unhook test interrupt handler */
1182         free_irq(irq, netdev);
1183
1184         return *data;
1185 }
1186
1187 static void igb_free_desc_rings(struct igb_adapter *adapter)
1188 {
1189         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1190         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1191         struct pci_dev *pdev = adapter->pdev;
1192         int i;
1193
1194         if (tx_ring->desc && tx_ring->buffer_info) {
1195                 for (i = 0; i < tx_ring->count; i++) {
1196                         struct igb_buffer *buf = &(tx_ring->buffer_info[i]);
1197                         if (buf->dma)
1198                                 pci_unmap_single(pdev, buf->dma, buf->length,
1199                                                  PCI_DMA_TODEVICE);
1200                         if (buf->skb)
1201                                 dev_kfree_skb(buf->skb);
1202                 }
1203         }
1204
1205         if (rx_ring->desc && rx_ring->buffer_info) {
1206                 for (i = 0; i < rx_ring->count; i++) {
1207                         struct igb_buffer *buf = &(rx_ring->buffer_info[i]);
1208                         if (buf->dma)
1209                                 pci_unmap_single(pdev, buf->dma,
1210                                                  IGB_RXBUFFER_2048,
1211                                                  PCI_DMA_FROMDEVICE);
1212                         if (buf->skb)
1213                                 dev_kfree_skb(buf->skb);
1214                 }
1215         }
1216
1217         if (tx_ring->desc) {
1218                 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc,
1219                                     tx_ring->dma);
1220                 tx_ring->desc = NULL;
1221         }
1222         if (rx_ring->desc) {
1223                 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc,
1224                                     rx_ring->dma);
1225                 rx_ring->desc = NULL;
1226         }
1227
1228         kfree(tx_ring->buffer_info);
1229         tx_ring->buffer_info = NULL;
1230         kfree(rx_ring->buffer_info);
1231         rx_ring->buffer_info = NULL;
1232
1233         return;
1234 }
1235
1236 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1237 {
1238         struct e1000_hw *hw = &adapter->hw;
1239         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1240         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1241         struct pci_dev *pdev = adapter->pdev;
1242         u32 rctl;
1243         int i, ret_val;
1244
1245         /* Setup Tx descriptor ring and Tx buffers */
1246
1247         if (!tx_ring->count)
1248                 tx_ring->count = IGB_DEFAULT_TXD;
1249
1250         tx_ring->buffer_info = kcalloc(tx_ring->count,
1251                                        sizeof(struct igb_buffer),
1252                                        GFP_KERNEL);
1253         if (!tx_ring->buffer_info) {
1254                 ret_val = 1;
1255                 goto err_nomem;
1256         }
1257
1258         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1259         tx_ring->size = ALIGN(tx_ring->size, 4096);
1260         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1261                                              &tx_ring->dma);
1262         if (!tx_ring->desc) {
1263                 ret_val = 2;
1264                 goto err_nomem;
1265         }
1266         tx_ring->next_to_use = tx_ring->next_to_clean = 0;
1267
1268         wr32(E1000_TDBAL(0),
1269                         ((u64) tx_ring->dma & 0x00000000FFFFFFFF));
1270         wr32(E1000_TDBAH(0), ((u64) tx_ring->dma >> 32));
1271         wr32(E1000_TDLEN(0),
1272                         tx_ring->count * sizeof(struct e1000_tx_desc));
1273         wr32(E1000_TDH(0), 0);
1274         wr32(E1000_TDT(0), 0);
1275         wr32(E1000_TCTL,
1276                         E1000_TCTL_PSP | E1000_TCTL_EN |
1277                         E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1278                         E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1279
1280         for (i = 0; i < tx_ring->count; i++) {
1281                 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
1282                 struct sk_buff *skb;
1283                 unsigned int size = 1024;
1284
1285                 skb = alloc_skb(size, GFP_KERNEL);
1286                 if (!skb) {
1287                         ret_val = 3;
1288                         goto err_nomem;
1289                 }
1290                 skb_put(skb, size);
1291                 tx_ring->buffer_info[i].skb = skb;
1292                 tx_ring->buffer_info[i].length = skb->len;
1293                 tx_ring->buffer_info[i].dma =
1294                         pci_map_single(pdev, skb->data, skb->len,
1295                                        PCI_DMA_TODEVICE);
1296                 tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
1297                 tx_desc->lower.data = cpu_to_le32(skb->len);
1298                 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1299                                                    E1000_TXD_CMD_IFCS |
1300                                                    E1000_TXD_CMD_RS);
1301                 tx_desc->upper.data = 0;
1302         }
1303
1304         /* Setup Rx descriptor ring and Rx buffers */
1305
1306         if (!rx_ring->count)
1307                 rx_ring->count = IGB_DEFAULT_RXD;
1308
1309         rx_ring->buffer_info = kcalloc(rx_ring->count,
1310                                        sizeof(struct igb_buffer),
1311                                        GFP_KERNEL);
1312         if (!rx_ring->buffer_info) {
1313                 ret_val = 4;
1314                 goto err_nomem;
1315         }
1316
1317         rx_ring->size = rx_ring->count * sizeof(struct e1000_rx_desc);
1318         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1319                                              &rx_ring->dma);
1320         if (!rx_ring->desc) {
1321                 ret_val = 5;
1322                 goto err_nomem;
1323         }
1324         rx_ring->next_to_use = rx_ring->next_to_clean = 0;
1325
1326         rctl = rd32(E1000_RCTL);
1327         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1328         wr32(E1000_RDBAL(0),
1329                         ((u64) rx_ring->dma & 0xFFFFFFFF));
1330         wr32(E1000_RDBAH(0),
1331                         ((u64) rx_ring->dma >> 32));
1332         wr32(E1000_RDLEN(0), rx_ring->size);
1333         wr32(E1000_RDH(0), 0);
1334         wr32(E1000_RDT(0), 0);
1335         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1336         rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1337                 E1000_RCTL_RDMTS_HALF |
1338                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1339         wr32(E1000_RCTL, rctl);
1340         wr32(E1000_SRRCTL(0), 0);
1341
1342         for (i = 0; i < rx_ring->count; i++) {
1343                 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
1344                 struct sk_buff *skb;
1345
1346                 skb = alloc_skb(IGB_RXBUFFER_2048 + NET_IP_ALIGN,
1347                                 GFP_KERNEL);
1348                 if (!skb) {
1349                         ret_val = 6;
1350                         goto err_nomem;
1351                 }
1352                 skb_reserve(skb, NET_IP_ALIGN);
1353                 rx_ring->buffer_info[i].skb = skb;
1354                 rx_ring->buffer_info[i].dma =
1355                         pci_map_single(pdev, skb->data, IGB_RXBUFFER_2048,
1356                                        PCI_DMA_FROMDEVICE);
1357                 rx_desc->buffer_addr = cpu_to_le64(rx_ring->buffer_info[i].dma);
1358                 memset(skb->data, 0x00, skb->len);
1359         }
1360
1361         return 0;
1362
1363 err_nomem:
1364         igb_free_desc_rings(adapter);
1365         return ret_val;
1366 }
1367
1368 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1369 {
1370         struct e1000_hw *hw = &adapter->hw;
1371
1372         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1373         igb_write_phy_reg(hw, 29, 0x001F);
1374         igb_write_phy_reg(hw, 30, 0x8FFC);
1375         igb_write_phy_reg(hw, 29, 0x001A);
1376         igb_write_phy_reg(hw, 30, 0x8FF0);
1377 }
1378
1379 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1380 {
1381         struct e1000_hw *hw = &adapter->hw;
1382         u32 ctrl_reg = 0;
1383         u32 stat_reg = 0;
1384
1385         hw->mac.autoneg = false;
1386
1387         if (hw->phy.type == e1000_phy_m88) {
1388                 /* Auto-MDI/MDIX Off */
1389                 igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1390                 /* reset to update Auto-MDI/MDIX */
1391                 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1392                 /* autoneg off */
1393                 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1394         }
1395
1396         ctrl_reg = rd32(E1000_CTRL);
1397
1398         /* force 1000, set loopback */
1399         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1400
1401         /* Now set up the MAC to the same speed/duplex as the PHY. */
1402         ctrl_reg = rd32(E1000_CTRL);
1403         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1404         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1405                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1406                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1407                      E1000_CTRL_FD);     /* Force Duplex to FULL */
1408
1409         if (hw->phy.media_type == e1000_media_type_copper &&
1410             hw->phy.type == e1000_phy_m88)
1411                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1412         else {
1413                 /* Set the ILOS bit on the fiber Nic if half duplex link is
1414                  * detected. */
1415                 stat_reg = rd32(E1000_STATUS);
1416                 if ((stat_reg & E1000_STATUS_FD) == 0)
1417                         ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1418         }
1419
1420         wr32(E1000_CTRL, ctrl_reg);
1421
1422         /* Disable the receiver on the PHY so when a cable is plugged in, the
1423          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1424          */
1425         if (hw->phy.type == e1000_phy_m88)
1426                 igb_phy_disable_receiver(adapter);
1427
1428         udelay(500);
1429
1430         return 0;
1431 }
1432
1433 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1434 {
1435         return igb_integrated_phy_loopback(adapter);
1436 }
1437
1438 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1439 {
1440         struct e1000_hw *hw = &adapter->hw;
1441         u32 reg;
1442
1443         if (hw->phy.media_type == e1000_media_type_fiber ||
1444             hw->phy.media_type == e1000_media_type_internal_serdes) {
1445                 reg = rd32(E1000_RCTL);
1446                 reg |= E1000_RCTL_LBM_TCVR;
1447                 wr32(E1000_RCTL, reg);
1448
1449                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1450
1451                 reg = rd32(E1000_CTRL);
1452                 reg &= ~(E1000_CTRL_RFCE |
1453                          E1000_CTRL_TFCE |
1454                          E1000_CTRL_LRST);
1455                 reg |= E1000_CTRL_SLU |
1456                        E1000_CTRL_FD;
1457                 wr32(E1000_CTRL, reg);
1458
1459                 /* Unset switch control to serdes energy detect */
1460                 reg = rd32(E1000_CONNSW);
1461                 reg &= ~E1000_CONNSW_ENRGSRC;
1462                 wr32(E1000_CONNSW, reg);
1463
1464                 /* Set PCS register for forced speed */
1465                 reg = rd32(E1000_PCS_LCTL);
1466                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1467                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1468                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1469                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1470                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1471                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1472                 wr32(E1000_PCS_LCTL, reg);
1473
1474                 return 0;
1475         } else if (hw->phy.media_type == e1000_media_type_copper) {
1476                 return igb_set_phy_loopback(adapter);
1477         }
1478
1479         return 7;
1480 }
1481
1482 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1483 {
1484         struct e1000_hw *hw = &adapter->hw;
1485         u32 rctl;
1486         u16 phy_reg;
1487
1488         rctl = rd32(E1000_RCTL);
1489         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1490         wr32(E1000_RCTL, rctl);
1491
1492         hw->mac.autoneg = true;
1493         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1494         if (phy_reg & MII_CR_LOOPBACK) {
1495                 phy_reg &= ~MII_CR_LOOPBACK;
1496                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1497                 igb_phy_sw_reset(hw);
1498         }
1499 }
1500
1501 static void igb_create_lbtest_frame(struct sk_buff *skb,
1502                                     unsigned int frame_size)
1503 {
1504         memset(skb->data, 0xFF, frame_size);
1505         frame_size &= ~1;
1506         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1507         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1508         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1509 }
1510
1511 static int igb_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1512 {
1513         frame_size &= ~1;
1514         if (*(skb->data + 3) == 0xFF)
1515                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1516                    (*(skb->data + frame_size / 2 + 12) == 0xAF))
1517                         return 0;
1518         return 13;
1519 }
1520
1521 static int igb_run_loopback_test(struct igb_adapter *adapter)
1522 {
1523         struct e1000_hw *hw = &adapter->hw;
1524         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1525         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1526         struct pci_dev *pdev = adapter->pdev;
1527         int i, j, k, l, lc, good_cnt;
1528         int ret_val = 0;
1529         unsigned long time;
1530
1531         wr32(E1000_RDT(0), rx_ring->count - 1);
1532
1533         /* Calculate the loop count based on the largest descriptor ring
1534          * The idea is to wrap the largest ring a number of times using 64
1535          * send/receive pairs during each loop
1536          */
1537
1538         if (rx_ring->count <= tx_ring->count)
1539                 lc = ((tx_ring->count / 64) * 2) + 1;
1540         else
1541                 lc = ((rx_ring->count / 64) * 2) + 1;
1542
1543         k = l = 0;
1544         for (j = 0; j <= lc; j++) { /* loop count loop */
1545                 for (i = 0; i < 64; i++) { /* send the packets */
1546                         igb_create_lbtest_frame(tx_ring->buffer_info[k].skb,
1547                                                 1024);
1548                         pci_dma_sync_single_for_device(pdev,
1549                                 tx_ring->buffer_info[k].dma,
1550                                 tx_ring->buffer_info[k].length,
1551                                 PCI_DMA_TODEVICE);
1552                         k++;
1553                         if (k == tx_ring->count)
1554                                 k = 0;
1555                 }
1556                 wr32(E1000_TDT(0), k);
1557                 msleep(200);
1558                 time = jiffies; /* set the start time for the receive */
1559                 good_cnt = 0;
1560                 do { /* receive the sent packets */
1561                         pci_dma_sync_single_for_cpu(pdev,
1562                                         rx_ring->buffer_info[l].dma,
1563                                         IGB_RXBUFFER_2048,
1564                                         PCI_DMA_FROMDEVICE);
1565
1566                         ret_val = igb_check_lbtest_frame(
1567                                              rx_ring->buffer_info[l].skb, 1024);
1568                         if (!ret_val)
1569                                 good_cnt++;
1570                         l++;
1571                         if (l == rx_ring->count)
1572                                 l = 0;
1573                         /* time + 20 msecs (200 msecs on 2.4) is more than
1574                          * enough time to complete the receives, if it's
1575                          * exceeded, break and error off
1576                          */
1577                 } while (good_cnt < 64 && jiffies < (time + 20));
1578                 if (good_cnt != 64) {
1579                         ret_val = 13; /* ret_val is the same as mis-compare */
1580                         break;
1581                 }
1582                 if (jiffies >= (time + 20)) {
1583                         ret_val = 14; /* error code for time out error */
1584                         break;
1585                 }
1586         } /* end loop count loop */
1587         return ret_val;
1588 }
1589
1590 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1591 {
1592         /* PHY loopback cannot be performed if SoL/IDER
1593          * sessions are active */
1594         if (igb_check_reset_block(&adapter->hw)) {
1595                 dev_err(&adapter->pdev->dev,
1596                         "Cannot do PHY loopback test "
1597                         "when SoL/IDER is active.\n");
1598                 *data = 0;
1599                 goto out;
1600         }
1601         *data = igb_setup_desc_rings(adapter);
1602         if (*data)
1603                 goto out;
1604         *data = igb_setup_loopback_test(adapter);
1605         if (*data)
1606                 goto err_loopback;
1607         *data = igb_run_loopback_test(adapter);
1608         igb_loopback_cleanup(adapter);
1609
1610 err_loopback:
1611         igb_free_desc_rings(adapter);
1612 out:
1613         return *data;
1614 }
1615
1616 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1617 {
1618         struct e1000_hw *hw = &adapter->hw;
1619         *data = 0;
1620         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1621                 int i = 0;
1622                 hw->mac.serdes_has_link = false;
1623
1624                 /* On some blade server designs, link establishment
1625                  * could take as long as 2-3 minutes */
1626                 do {
1627                         hw->mac.ops.check_for_link(&adapter->hw);
1628                         if (hw->mac.serdes_has_link)
1629                                 return *data;
1630                         msleep(20);
1631                 } while (i++ < 3750);
1632
1633                 *data = 1;
1634         } else {
1635                 hw->mac.ops.check_for_link(&adapter->hw);
1636                 if (hw->mac.autoneg)
1637                         msleep(4000);
1638
1639                 if (!(rd32(E1000_STATUS) &
1640                       E1000_STATUS_LU))
1641                         *data = 1;
1642         }
1643         return *data;
1644 }
1645
1646 static void igb_diag_test(struct net_device *netdev,
1647                           struct ethtool_test *eth_test, u64 *data)
1648 {
1649         struct igb_adapter *adapter = netdev_priv(netdev);
1650         u16 autoneg_advertised;
1651         u8 forced_speed_duplex, autoneg;
1652         bool if_running = netif_running(netdev);
1653
1654         set_bit(__IGB_TESTING, &adapter->state);
1655         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1656                 /* Offline tests */
1657
1658                 /* save speed, duplex, autoneg settings */
1659                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1660                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1661                 autoneg = adapter->hw.mac.autoneg;
1662
1663                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1664
1665                 /* Link test performed before hardware reset so autoneg doesn't
1666                  * interfere with test result */
1667                 if (igb_link_test(adapter, &data[4]))
1668                         eth_test->flags |= ETH_TEST_FL_FAILED;
1669
1670                 if (if_running)
1671                         /* indicate we're in test mode */
1672                         dev_close(netdev);
1673                 else
1674                         igb_reset(adapter);
1675
1676                 if (igb_reg_test(adapter, &data[0]))
1677                         eth_test->flags |= ETH_TEST_FL_FAILED;
1678
1679                 igb_reset(adapter);
1680                 if (igb_eeprom_test(adapter, &data[1]))
1681                         eth_test->flags |= ETH_TEST_FL_FAILED;
1682
1683                 igb_reset(adapter);
1684                 if (igb_intr_test(adapter, &data[2]))
1685                         eth_test->flags |= ETH_TEST_FL_FAILED;
1686
1687                 igb_reset(adapter);
1688                 if (igb_loopback_test(adapter, &data[3]))
1689                         eth_test->flags |= ETH_TEST_FL_FAILED;
1690
1691                 /* restore speed, duplex, autoneg settings */
1692                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1693                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1694                 adapter->hw.mac.autoneg = autoneg;
1695
1696                 /* force this routine to wait until autoneg complete/timeout */
1697                 adapter->hw.phy.autoneg_wait_to_complete = true;
1698                 igb_reset(adapter);
1699                 adapter->hw.phy.autoneg_wait_to_complete = false;
1700
1701                 clear_bit(__IGB_TESTING, &adapter->state);
1702                 if (if_running)
1703                         dev_open(netdev);
1704         } else {
1705                 dev_info(&adapter->pdev->dev, "online testing starting\n");
1706                 /* Online tests */
1707                 if (igb_link_test(adapter, &data[4]))
1708                         eth_test->flags |= ETH_TEST_FL_FAILED;
1709
1710                 /* Online tests aren't run; pass by default */
1711                 data[0] = 0;
1712                 data[1] = 0;
1713                 data[2] = 0;
1714                 data[3] = 0;
1715
1716                 clear_bit(__IGB_TESTING, &adapter->state);
1717         }
1718         msleep_interruptible(4 * 1000);
1719 }
1720
1721 static int igb_wol_exclusion(struct igb_adapter *adapter,
1722                              struct ethtool_wolinfo *wol)
1723 {
1724         struct e1000_hw *hw = &adapter->hw;
1725         int retval = 1; /* fail by default */
1726
1727         switch (hw->device_id) {
1728         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1729                 /* WoL not supported */
1730                 wol->supported = 0;
1731                 break;
1732         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1733         case E1000_DEV_ID_82576_FIBER:
1734         case E1000_DEV_ID_82576_SERDES:
1735                 /* Wake events not supported on port B */
1736                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) {
1737                         wol->supported = 0;
1738                         break;
1739                 }
1740                 /* return success for non excluded adapter ports */
1741                 retval = 0;
1742                 break;
1743         default:
1744                 /* dual port cards only support WoL on port A from now on
1745                  * unless it was enabled in the eeprom for port B
1746                  * so exclude FUNC_1 ports from having WoL enabled */
1747                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1 &&
1748                     !adapter->eeprom_wol) {
1749                         wol->supported = 0;
1750                         break;
1751                 }
1752
1753                 retval = 0;
1754         }
1755
1756         return retval;
1757 }
1758
1759 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1760 {
1761         struct igb_adapter *adapter = netdev_priv(netdev);
1762
1763         wol->supported = WAKE_UCAST | WAKE_MCAST |
1764                          WAKE_BCAST | WAKE_MAGIC;
1765         wol->wolopts = 0;
1766
1767         /* this function will set ->supported = 0 and return 1 if wol is not
1768          * supported by this hardware */
1769         if (igb_wol_exclusion(adapter, wol) ||
1770             !device_can_wakeup(&adapter->pdev->dev))
1771                 return;
1772
1773         /* apply any specific unsupported masks here */
1774         switch (adapter->hw.device_id) {
1775         default:
1776                 break;
1777         }
1778
1779         if (adapter->wol & E1000_WUFC_EX)
1780                 wol->wolopts |= WAKE_UCAST;
1781         if (adapter->wol & E1000_WUFC_MC)
1782                 wol->wolopts |= WAKE_MCAST;
1783         if (adapter->wol & E1000_WUFC_BC)
1784                 wol->wolopts |= WAKE_BCAST;
1785         if (adapter->wol & E1000_WUFC_MAG)
1786                 wol->wolopts |= WAKE_MAGIC;
1787
1788         return;
1789 }
1790
1791 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1792 {
1793         struct igb_adapter *adapter = netdev_priv(netdev);
1794         struct e1000_hw *hw = &adapter->hw;
1795
1796         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1797                 return -EOPNOTSUPP;
1798
1799         if (igb_wol_exclusion(adapter, wol) ||
1800             !device_can_wakeup(&adapter->pdev->dev))
1801                 return wol->wolopts ? -EOPNOTSUPP : 0;
1802
1803         switch (hw->device_id) {
1804         default:
1805                 break;
1806         }
1807
1808         /* these settings will always override what we currently have */
1809         adapter->wol = 0;
1810
1811         if (wol->wolopts & WAKE_UCAST)
1812                 adapter->wol |= E1000_WUFC_EX;
1813         if (wol->wolopts & WAKE_MCAST)
1814                 adapter->wol |= E1000_WUFC_MC;
1815         if (wol->wolopts & WAKE_BCAST)
1816                 adapter->wol |= E1000_WUFC_BC;
1817         if (wol->wolopts & WAKE_MAGIC)
1818                 adapter->wol |= E1000_WUFC_MAG;
1819
1820         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1821
1822         return 0;
1823 }
1824
1825 /* toggle LED 4 times per second = 2 "blinks" per second */
1826 #define IGB_ID_INTERVAL         (HZ/4)
1827
1828 /* bit defines for adapter->led_status */
1829 #define IGB_LED_ON              0
1830
1831 static int igb_phys_id(struct net_device *netdev, u32 data)
1832 {
1833         struct igb_adapter *adapter = netdev_priv(netdev);
1834         struct e1000_hw *hw = &adapter->hw;
1835
1836         if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
1837                 data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
1838
1839         igb_blink_led(hw);
1840         msleep_interruptible(data * 1000);
1841
1842         igb_led_off(hw);
1843         clear_bit(IGB_LED_ON, &adapter->led_status);
1844         igb_cleanup_led(hw);
1845
1846         return 0;
1847 }
1848
1849 static int igb_set_coalesce(struct net_device *netdev,
1850                             struct ethtool_coalesce *ec)
1851 {
1852         struct igb_adapter *adapter = netdev_priv(netdev);
1853         struct e1000_hw *hw = &adapter->hw;
1854         int i;
1855
1856         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1857             ((ec->rx_coalesce_usecs > 3) &&
1858              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1859             (ec->rx_coalesce_usecs == 2))
1860                 return -EINVAL;
1861
1862         /* convert to rate of irq's per second */
1863         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3) {
1864                 adapter->itr_setting = ec->rx_coalesce_usecs;
1865                 adapter->itr = IGB_START_ITR;
1866         } else {
1867                 adapter->itr_setting = ec->rx_coalesce_usecs << 2;
1868                 adapter->itr = adapter->itr_setting;
1869         }
1870
1871         for (i = 0; i < adapter->num_rx_queues; i++)
1872                 wr32(adapter->rx_ring[i].itr_register, adapter->itr);
1873
1874         return 0;
1875 }
1876
1877 static int igb_get_coalesce(struct net_device *netdev,
1878                             struct ethtool_coalesce *ec)
1879 {
1880         struct igb_adapter *adapter = netdev_priv(netdev);
1881
1882         if (adapter->itr_setting <= 3)
1883                 ec->rx_coalesce_usecs = adapter->itr_setting;
1884         else
1885                 ec->rx_coalesce_usecs = adapter->itr_setting >> 2;
1886
1887         return 0;
1888 }
1889
1890
1891 static int igb_nway_reset(struct net_device *netdev)
1892 {
1893         struct igb_adapter *adapter = netdev_priv(netdev);
1894         if (netif_running(netdev))
1895                 igb_reinit_locked(adapter);
1896         return 0;
1897 }
1898
1899 static int igb_get_sset_count(struct net_device *netdev, int sset)
1900 {
1901         switch (sset) {
1902         case ETH_SS_STATS:
1903                 return IGB_STATS_LEN;
1904         case ETH_SS_TEST:
1905                 return IGB_TEST_LEN;
1906         default:
1907                 return -ENOTSUPP;
1908         }
1909 }
1910
1911 static void igb_get_ethtool_stats(struct net_device *netdev,
1912                                   struct ethtool_stats *stats, u64 *data)
1913 {
1914         struct igb_adapter *adapter = netdev_priv(netdev);
1915         u64 *queue_stat;
1916         int stat_count = sizeof(struct igb_queue_stats) / sizeof(u64);
1917         int j;
1918         int i;
1919
1920         igb_update_stats(adapter);
1921         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
1922                 char *p = (char *)adapter+igb_gstrings_stats[i].stat_offset;
1923                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
1924                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1925         }
1926         for (j = 0; j < adapter->num_tx_queues; j++) {
1927                 int k;
1928                 queue_stat = (u64 *)&adapter->tx_ring[j].tx_stats;
1929                 for (k = 0; k < stat_count; k++)
1930                         data[i + k] = queue_stat[k];
1931                 i += k;
1932         }
1933         for (j = 0; j < adapter->num_rx_queues; j++) {
1934                 int k;
1935                 queue_stat = (u64 *)&adapter->rx_ring[j].rx_stats;
1936                 for (k = 0; k < stat_count; k++)
1937                         data[i + k] = queue_stat[k];
1938                 i += k;
1939         }
1940 }
1941
1942 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
1943 {
1944         struct igb_adapter *adapter = netdev_priv(netdev);
1945         u8 *p = data;
1946         int i;
1947
1948         switch (stringset) {
1949         case ETH_SS_TEST:
1950                 memcpy(data, *igb_gstrings_test,
1951                         IGB_TEST_LEN*ETH_GSTRING_LEN);
1952                 break;
1953         case ETH_SS_STATS:
1954                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
1955                         memcpy(p, igb_gstrings_stats[i].stat_string,
1956                                ETH_GSTRING_LEN);
1957                         p += ETH_GSTRING_LEN;
1958                 }
1959                 for (i = 0; i < adapter->num_tx_queues; i++) {
1960                         sprintf(p, "tx_queue_%u_packets", i);
1961                         p += ETH_GSTRING_LEN;
1962                         sprintf(p, "tx_queue_%u_bytes", i);
1963                         p += ETH_GSTRING_LEN;
1964                 }
1965                 for (i = 0; i < adapter->num_rx_queues; i++) {
1966                         sprintf(p, "rx_queue_%u_packets", i);
1967                         p += ETH_GSTRING_LEN;
1968                         sprintf(p, "rx_queue_%u_bytes", i);
1969                         p += ETH_GSTRING_LEN;
1970                 }
1971 /*              BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
1972                 break;
1973         }
1974 }
1975
1976 static struct ethtool_ops igb_ethtool_ops = {
1977         .get_settings           = igb_get_settings,
1978         .set_settings           = igb_set_settings,
1979         .get_drvinfo            = igb_get_drvinfo,
1980         .get_regs_len           = igb_get_regs_len,
1981         .get_regs               = igb_get_regs,
1982         .get_wol                = igb_get_wol,
1983         .set_wol                = igb_set_wol,
1984         .get_msglevel           = igb_get_msglevel,
1985         .set_msglevel           = igb_set_msglevel,
1986         .nway_reset             = igb_nway_reset,
1987         .get_link               = ethtool_op_get_link,
1988         .get_eeprom_len         = igb_get_eeprom_len,
1989         .get_eeprom             = igb_get_eeprom,
1990         .set_eeprom             = igb_set_eeprom,
1991         .get_ringparam          = igb_get_ringparam,
1992         .set_ringparam          = igb_set_ringparam,
1993         .get_pauseparam         = igb_get_pauseparam,
1994         .set_pauseparam         = igb_set_pauseparam,
1995         .get_rx_csum            = igb_get_rx_csum,
1996         .set_rx_csum            = igb_set_rx_csum,
1997         .get_tx_csum            = igb_get_tx_csum,
1998         .set_tx_csum            = igb_set_tx_csum,
1999         .get_sg                 = ethtool_op_get_sg,
2000         .set_sg                 = ethtool_op_set_sg,
2001         .get_tso                = ethtool_op_get_tso,
2002         .set_tso                = igb_set_tso,
2003         .self_test              = igb_diag_test,
2004         .get_strings            = igb_get_strings,
2005         .phys_id                = igb_phys_id,
2006         .get_sset_count         = igb_get_sset_count,
2007         .get_ethtool_stats      = igb_get_ethtool_stats,
2008         .get_coalesce           = igb_get_coalesce,
2009         .set_coalesce           = igb_set_coalesce,
2010 };
2011
2012 void igb_set_ethtool_ops(struct net_device *netdev)
2013 {
2014         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2015 }