2 * Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
4 * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
6 * Based on code from Jack Kelliher (kelliher@xmission.com)
7 * Copyright (C) 2002 & pcHDTV, inc.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * This driver needs two external firmware files. Please copy
27 * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
28 * /usr/lib/hotplug/firmware/ or /lib/firmware/
29 * (depending on configuration of firmware hotplug).
31 #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
32 #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
34 #include <linux/kernel.h>
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/init.h>
38 #include <linux/delay.h>
39 #include <linux/string.h>
40 #include <linux/slab.h>
41 #include <asm/byteorder.h>
43 #include "dvb_frontend.h"
48 #define dprintk(args...) \
50 if (debug) printk(KERN_DEBUG "or51132: " args); \
56 struct i2c_adapter* i2c;
57 struct dvb_frontend_ops ops;
59 /* Configuration settings */
60 const struct or51132_config* config;
62 struct dvb_frontend frontend;
64 /* Demodulator private data */
65 fe_modulation_t current_modulation;
67 /* Tuner private data */
68 u32 current_frequency;
71 static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
80 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
81 printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
88 static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
97 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
98 printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
105 static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
107 struct or51132_state* state = fe->demodulator_priv;
108 static u8 run_buf[] = {0x7F,0x01};
109 static u8 get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00};
112 u32 firmwareAsize, firmwareBsize;
115 dprintk("Firmware is %Zd bytes\n",fw->size);
117 /* Get size of firmware A and B */
118 firmwareAsize = le32_to_cpu(*((u32*)fw->data));
119 dprintk("FirmwareA is %i bytes\n",firmwareAsize);
120 firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
121 dprintk("FirmwareB is %i bytes\n",firmwareBsize);
123 /* Upload firmware */
124 if ((ret = i2c_writebytes(state,state->config->demod_address,
125 &fw->data[8],firmwareAsize))) {
126 printk(KERN_WARNING "or51132: load_firmware error 1\n");
130 if ((ret = i2c_writebytes(state,state->config->demod_address,
131 &fw->data[8+firmwareAsize],firmwareBsize))) {
132 printk(KERN_WARNING "or51132: load_firmware error 2\n");
137 if ((ret = i2c_writebytes(state,state->config->demod_address,
139 printk(KERN_WARNING "or51132: load_firmware error 3\n");
143 /* Wait at least 5 msec */
144 msleep(20); /* 10ms */
146 if ((ret = i2c_writebytes(state,state->config->demod_address,
148 printk(KERN_WARNING "or51132: load_firmware error 4\n");
152 /* 50ms for operation to begin */
155 /* Read back ucode version to besure we loaded correctly and are really up and running */
156 /* Get uCode version */
161 msleep(20); /* 20ms */
162 if ((ret = i2c_writebytes(state,state->config->demod_address,
164 printk(KERN_WARNING "or51132: load_firmware error a\n");
172 msleep(20); /* 20ms */
173 if ((ret = i2c_writebytes(state,state->config->demod_address,
175 printk(KERN_WARNING "or51132: load_firmware error b\n");
183 msleep(20); /* 20ms */
184 if ((ret = i2c_writebytes(state,state->config->demod_address,
186 printk(KERN_WARNING "or51132: load_firmware error c\n");
191 msleep(20); /* 20ms */
192 get_ver_buf[4] = i+1;
193 if ((ret = i2c_readbytes(state,state->config->demod_address,
196 "or51132: load_firmware error d - %d\n",i);
202 "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
203 rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
204 rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
205 rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
206 rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
212 msleep(20); /* 20ms */
213 if ((ret = i2c_writebytes(state,state->config->demod_address,
215 printk(KERN_WARNING "or51132: load_firmware error e\n");
221 static int or51132_init(struct dvb_frontend* fe)
226 static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
232 static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
238 static int or51132_sleep(struct dvb_frontend* fe)
243 static int or51132_setmode(struct dvb_frontend* fe)
245 struct or51132_state* state = fe->demodulator_priv;
246 unsigned char cmd_buf[4];
248 dprintk("setmode %d\n",(int)state->current_modulation);
249 /* set operation mode in Receiver 1 register; */
252 switch (state->current_modulation) {
256 /* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
260 /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
264 printk("setmode:Modulation set to unsupported value\n");
267 if (i2c_writebytes(state,state->config->demod_address,
269 printk(KERN_WARNING "or51132: set_mode error 1\n");
272 dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);
274 /* Set operation mode in Receiver 6 register */
276 switch (state->current_modulation) {
278 /* REC MODE Normal Carrier Lock */
280 /* Channel MODE Auto QAM64/256 */
284 /* REC MODE Normal Carrier Lock */
286 /* Channel MODE QAM256 */
290 /* REC MODE Normal Carrier Lock */
292 /* Channel MODE QAM64 */
296 /* REC MODE inv IF spectrum, Normal */
298 /* Channel MODE ATSC/VSB8 */
302 printk("setmode: Modulation set to unsupported value\n");
305 msleep(20); /* 20ms */
306 if (i2c_writebytes(state,state->config->demod_address,
308 printk(KERN_WARNING "or51132: set_mode error 2\n");
311 dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);
316 static int or51132_set_parameters(struct dvb_frontend* fe,
317 struct dvb_frontend_parameters *param)
321 struct or51132_state* state = fe->demodulator_priv;
322 const struct firmware *fw;
324 /* Change only if we are actually changing the modulation */
325 if (state->current_modulation != param->u.vsb.modulation) {
326 switch(param->u.vsb.modulation) {
328 dprintk("set_parameters VSB MODE\n");
329 printk("or51132: Waiting for firmware upload(%s)...\n",
330 OR51132_VSB_FIRMWARE);
331 ret = request_firmware(&fw, OR51132_VSB_FIRMWARE,
334 printk(KERN_WARNING "or51132: No firmware up"
335 "loaded(timeout or file not found?)\n");
338 /* Set non-punctured clock for VSB */
339 state->config->set_ts_params(fe, 0);
344 dprintk("set_parameters QAM MODE\n");
345 printk("or51132: Waiting for firmware upload(%s)...\n",
346 OR51132_QAM_FIRMWARE);
347 ret = request_firmware(&fw, OR51132_QAM_FIRMWARE,
350 printk(KERN_WARNING "or51132: No firmware up"
351 "loaded(timeout or file not found?)\n");
354 /* Set punctured clock for QAM */
355 state->config->set_ts_params(fe, 1);
358 printk("or51132:Modulation type(%d) UNSUPPORTED\n",
359 param->u.vsb.modulation);
362 ret = or51132_load_firmware(fe, fw);
363 release_firmware(fw);
365 printk(KERN_WARNING "or51132: Writing firmware to "
369 printk("or51132: Firmware upload complete.\n");
371 state->current_modulation = param->u.vsb.modulation;
375 dvb_pll_configure(state->config->pll_desc, buf,
376 param->frequency, 0);
377 dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
378 "0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
379 if (i2c_writebytes(state, state->config->pll_address ,buf, 4))
380 printk(KERN_WARNING "or51132: set_parameters error "
381 "writing to tuner\n");
383 /* Set to current mode */
386 /* Update current frequency */
387 state->current_frequency = param->frequency;
391 static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
393 struct or51132_state* state = fe->demodulator_priv;
394 unsigned char rec_buf[2];
395 unsigned char snd_buf[2];
398 /* Receiver Status */
401 msleep(30); /* 30ms */
402 if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
403 printk(KERN_WARNING "or51132: read_status write error\n");
406 msleep(30); /* 30ms */
407 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
408 printk(KERN_WARNING "or51132: read_status read error\n");
411 dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
413 if (rec_buf[1] & 0x01) { /* Receiver Lock */
414 *status |= FE_HAS_SIGNAL;
415 *status |= FE_HAS_CARRIER;
416 *status |= FE_HAS_VITERBI;
417 *status |= FE_HAS_SYNC;
418 *status |= FE_HAS_LOCK;
423 /* log10-1 table at .5 increments from 1 to 100.5 */
424 static unsigned int i100x20log10[] = {
425 0, 352, 602, 795, 954, 1088, 1204, 1306, 1397, 1480,
426 1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
427 2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
428 2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
429 2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
430 2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
431 2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
432 3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
433 3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
434 3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
435 3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
436 3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
437 3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
438 3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
439 3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
440 3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
441 3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
442 3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
443 3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
444 3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
447 static unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};
449 static unsigned int i20Log10(unsigned short val)
451 unsigned int rntval = 100;
452 unsigned int tmp = val;
453 unsigned int exp = 1;
455 while(tmp > 100) {tmp /= 100; exp++;}
457 val = (2 * val)/denom[exp];
458 if (exp > 1) rntval = 2000*exp;
460 rntval += i100x20log10[val];
464 static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
466 struct or51132_state* state = fe->demodulator_priv;
467 unsigned char rec_buf[2];
468 unsigned char snd_buf[2];
475 snd_buf[1]=0x02; /* SNR after Equalizer */
476 msleep(30); /* 30ms */
477 if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
478 printk(KERN_WARNING "or51132: read_status write error\n");
481 msleep(30); /* 30ms */
482 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
483 printk(KERN_WARNING "or51132: read_status read error\n");
486 snr_equ = rec_buf[0] | (rec_buf[1] << 8);
487 dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
489 /* Receiver Status */
492 msleep(30); /* 30ms */
493 if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
494 printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
497 msleep(30); /* 30ms */
498 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
499 printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
502 dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
503 rcvr_stat = rec_buf[1];
504 usK = (rcvr_stat & 0x10) ? 3 : 0;
506 /* The value reported back from the frontend will be FFFF=100% 0000=0% */
507 signal_strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
508 if (signal_strength > 0xffff)
511 *strength = signal_strength;
512 dprintk("read_signal_strength %i\n",*strength);
517 static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
519 struct or51132_state* state = fe->demodulator_priv;
520 unsigned char rec_buf[2];
521 unsigned char snd_buf[2];
525 snd_buf[1]=0x02; /* SNR after Equalizer */
526 msleep(30); /* 30ms */
527 if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
528 printk(KERN_WARNING "or51132: read_snr write error\n");
531 msleep(30); /* 30ms */
532 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
533 printk(KERN_WARNING "or51132: read_snr dvr read error\n");
536 snr_equ = rec_buf[0] | (rec_buf[1] << 8);
537 dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
539 *snr = 0xFFFF - snr_equ;
540 dprintk("read_snr %i\n",*snr);
545 static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
547 fe_tune_settings->min_delay_ms = 500;
548 fe_tune_settings->step_size = 0;
549 fe_tune_settings->max_drift = 0;
554 static void or51132_release(struct dvb_frontend* fe)
556 struct or51132_state* state = fe->demodulator_priv;
560 static struct dvb_frontend_ops or51132_ops;
562 struct dvb_frontend* or51132_attach(const struct or51132_config* config,
563 struct i2c_adapter* i2c)
565 struct or51132_state* state = NULL;
567 /* Allocate memory for the internal state */
568 state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
572 /* Setup the state */
573 state->config = config;
575 memcpy(&state->ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
576 state->current_frequency = -1;
577 state->current_modulation = -1;
579 /* Create dvb_frontend */
580 state->frontend.ops = &state->ops;
581 state->frontend.demodulator_priv = state;
582 return &state->frontend;
589 static struct dvb_frontend_ops or51132_ops = {
592 .name = "Oren OR51132 VSB/QAM Frontend",
594 .frequency_min = 44000000,
595 .frequency_max = 958000000,
596 .frequency_stepsize = 166666,
597 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
598 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
599 FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
603 .release = or51132_release,
605 .init = or51132_init,
606 .sleep = or51132_sleep,
608 .set_frontend = or51132_set_parameters,
609 .get_tune_settings = or51132_get_tune_settings,
611 .read_status = or51132_read_status,
612 .read_ber = or51132_read_ber,
613 .read_signal_strength = or51132_read_signal_strength,
614 .read_snr = or51132_read_snr,
615 .read_ucblocks = or51132_read_ucblocks,
618 module_param(debug, int, 0644);
619 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
621 MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
622 MODULE_AUTHOR("Kirk Lapray");
623 MODULE_LICENSE("GPL");
625 EXPORT_SYMBOL(or51132_attach);