2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
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13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
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22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
36 Paul Lin 2002-08-01 created
37 John Chang 2004-08-20 RT2561/2661 use scatter-gather scheme
38 Jan Lee 2006-09-15 RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
40 #include "../rt_config.h"
42 #include <linux/bitrev.h>
44 UCHAR BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
45 ULONG BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
46 0x00000010, 0x00000020, 0x00000040, 0x00000080,
47 0x00000100, 0x00000200, 0x00000400, 0x00000800,
48 0x00001000, 0x00002000, 0x00004000, 0x00008000,
49 0x00010000, 0x00020000, 0x00040000, 0x00080000,
50 0x00100000, 0x00200000, 0x00400000, 0x00800000,
51 0x01000000, 0x02000000, 0x04000000, 0x08000000,
52 0x10000000, 0x20000000, 0x40000000, 0x80000000};
54 char* CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
56 const unsigned short ccitt_16Table[] = {
57 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
58 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
59 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
60 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
61 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
62 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
63 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
64 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
65 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
66 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
67 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
68 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
69 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
70 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
71 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
72 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
73 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
74 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
75 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
76 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
77 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
78 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
79 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
80 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
81 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
82 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
83 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
84 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
85 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
86 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
87 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
88 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
90 #define ByteCRC16(v, crc) \
91 (unsigned short)((crc << 8) ^ ccitt_16Table[((crc >> 8) ^ (v)) & 255])
94 // BBP register initialization set
96 REG_PAIR BBPRegTable[] = {
97 {BBP_R65, 0x2C}, // fix rssi issue
98 {BBP_R66, 0x38}, // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
100 {BBP_R70, 0xa}, // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
105 {BBP_R84, 0x99}, // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
106 {BBP_R86, 0x00}, // middle range issue, Rory @2008-01-28
107 {BBP_R91, 0x04}, // middle range issue, Rory @2008-01-28
108 {BBP_R92, 0x00}, // middle range issue, Rory @2008-01-28
109 {BBP_R103, 0x00}, // near range high-power issue, requested from Gary @2008-0528
110 {BBP_R105, 0x05}, // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
112 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
115 // RF register initialization set
119 // ASIC register initialization sets
122 RTMP_REG_PAIR MACRegTable[] = {
123 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
124 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
125 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
126 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
127 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
128 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
130 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
131 #endif // HW_BEACON_OFFSET //
133 {LEGACY_BASIC_RATE, 0x0000013f}, // Basic rate set bitmap
134 {HT_BASIC_RATE, 0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
135 {MAC_SYS_CTRL, 0x00}, // 0x1004, , default Disable RX
136 {RX_FILTR_CFG, 0x17f97}, //0x1400 , RX filter control,
137 {BKOFF_SLOT_CFG, 0x209}, // default set short slot time, CC_DELAY_TIME should be 2
138 {TX_SW_CFG0, 0x0}, // Gary,2008-05-21 for CWC test
139 {TX_SW_CFG1, 0x80606}, // Gary,2006-08-23
140 {TX_LINK_CFG, 0x1020}, // Gary,2006-08-23
141 {TX_TIMEOUT_CFG, 0x000a2090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
142 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, // 0x3018, MAX frame length. Max PSDU = 16kbytes.
143 {LED_CFG, 0x7f031e46}, // Gary, 2006-08-23
144 {PBF_MAX_PCNT, 0x1F3FBF9F}, //0x1F3f7f9f}, //Jan, 2006/04/20
145 {TX_RTY_CFG, 0x47d01f0f}, // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
146 {AUTO_RSP_CFG, 0x00000013}, // Initial Auto_Responder, because QA will turn off Auto-Responder
147 {CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
148 {OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
149 {GF20_PROT_CFG, 0x01744004}, // set 19:18 --> Short NAV for MIMO PS
150 {GF40_PROT_CFG, 0x03F44084},
151 {MM20_PROT_CFG, 0x01744004},
152 {MM40_PROT_CFG, 0x03F54084},
153 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, //Extension channel backoff.
154 {TX_RTS_CFG, 0x00092b20},
155 {EXP_ACK_TIME, 0x002400ca}, // default value
156 {TXOP_HLDR_ET, 0x00000002},
158 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
159 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
160 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
161 will always lost. So we change the SIFS of CCK from 10us to 16us. */
162 {XIFS_TIME_CFG, 0x33a41010},
163 {PWR_PIN_CFG, 0x00000003}, // patch for 2880-E
167 #ifdef CONFIG_STA_SUPPORT
168 RTMP_REG_PAIR STAMACRegTable[] = {
169 {WMM_AIFSN_CFG, 0x00002273},
170 {WMM_CWMIN_CFG, 0x00002344},
171 {WMM_CWMAX_CFG, 0x000034aa},
173 #endif // CONFIG_STA_SUPPORT //
175 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
176 #ifdef CONFIG_STA_SUPPORT
177 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
178 #endif // CONFIG_STA_SUPPORT //
181 // New 8k byte firmware size for RT3071/RT3072
182 #define FIRMWAREIMAGE_MAX_LENGTH 0x2000
183 #define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(UCHAR))
184 #define FIRMWARE_MAJOR_VERSION 0
186 #define FIRMWAREIMAGEV1_LENGTH 0x1000
187 #define FIRMWAREIMAGEV2_LENGTH 0x1000
189 #define FIRMWARE_MINOR_VERSION 2
193 ========================================================================
196 Allocate RTMP_ADAPTER data block and do some initialization
199 Adapter Pointer to our adapter
209 ========================================================================
211 NDIS_STATUS RTMPAllocAdapterBlock(
213 OUT PRTMP_ADAPTER *ppAdapter)
218 UCHAR *pBeaconBuf = NULL;
220 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
226 // Allocate RTMP_ADAPTER memory block
227 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
228 if (pBeaconBuf == NULL)
230 Status = NDIS_STATUS_FAILURE;
231 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
235 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
236 if (Status != NDIS_STATUS_SUCCESS)
238 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
241 pAd->BeaconBuf = pBeaconBuf;
242 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
246 NdisAllocateSpinLock(&pAd->MgmtRingLock);
247 NdisAllocateSpinLock(&pAd->RxRingLock);
249 for (index =0 ; index < NUM_OF_TX_RING; index++)
251 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
252 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
253 pAd->DeQueueRunning[index] = FALSE;
256 NdisAllocateSpinLock(&pAd->irq_lock);
260 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
265 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
270 ========================================================================
273 Read initial Tx power per MCS and BW from EEPROM
276 Adapter Pointer to our adapter
285 ========================================================================
287 VOID RTMPReadTxPwrPerRate(
288 IN PRTMP_ADAPTER pAd)
290 ULONG data, Adata, Gdata;
291 USHORT i, value, value2;
292 INT Apwrdelta, Gpwrdelta;
294 BOOLEAN bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
297 // Get power delta for 20MHz and 40MHz.
299 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
300 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
304 if ((value2 & 0xff) != 0xff)
307 Gpwrdelta = (value2&0xf);
310 bGpwrdeltaMinus = FALSE;
312 bGpwrdeltaMinus = TRUE;
314 if ((value2 & 0xff00) != 0xff00)
316 if ((value2 & 0x8000))
317 Apwrdelta = ((value2&0xf00)>>8);
319 if ((value2 & 0x4000))
320 bApwrdeltaMinus = FALSE;
322 bApwrdeltaMinus = TRUE;
324 DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
327 // Get Txpower per MCS for 20MHz in 2.4G.
331 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
333 if (bApwrdeltaMinus == FALSE)
335 t1 = (value&0xf)+(Apwrdelta);
338 t2 = ((value&0xf0)>>4)+(Apwrdelta);
341 t3 = ((value&0xf00)>>8)+(Apwrdelta);
344 t4 = ((value&0xf000)>>12)+(Apwrdelta);
350 if ((value&0xf) > Apwrdelta)
351 t1 = (value&0xf)-(Apwrdelta);
354 if (((value&0xf0)>>4) > Apwrdelta)
355 t2 = ((value&0xf0)>>4)-(Apwrdelta);
358 if (((value&0xf00)>>8) > Apwrdelta)
359 t3 = ((value&0xf00)>>8)-(Apwrdelta);
362 if (((value&0xf000)>>12) > Apwrdelta)
363 t4 = ((value&0xf000)>>12)-(Apwrdelta);
367 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
368 if (bGpwrdeltaMinus == FALSE)
370 t1 = (value&0xf)+(Gpwrdelta);
373 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
376 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
379 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
385 if ((value&0xf) > Gpwrdelta)
386 t1 = (value&0xf)-(Gpwrdelta);
389 if (((value&0xf0)>>4) > Gpwrdelta)
390 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
393 if (((value&0xf00)>>8) > Gpwrdelta)
394 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
397 if (((value&0xf000)>>12) > Gpwrdelta)
398 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
402 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
404 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
405 if (bApwrdeltaMinus == FALSE)
407 t1 = (value&0xf)+(Apwrdelta);
410 t2 = ((value&0xf0)>>4)+(Apwrdelta);
413 t3 = ((value&0xf00)>>8)+(Apwrdelta);
416 t4 = ((value&0xf000)>>12)+(Apwrdelta);
422 if ((value&0xf) > Apwrdelta)
423 t1 = (value&0xf)-(Apwrdelta);
426 if (((value&0xf0)>>4) > Apwrdelta)
427 t2 = ((value&0xf0)>>4)-(Apwrdelta);
430 if (((value&0xf00)>>8) > Apwrdelta)
431 t3 = ((value&0xf00)>>8)-(Apwrdelta);
434 if (((value&0xf000)>>12) > Apwrdelta)
435 t4 = ((value&0xf000)>>12)-(Apwrdelta);
439 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
440 if (bGpwrdeltaMinus == FALSE)
442 t1 = (value&0xf)+(Gpwrdelta);
445 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
448 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
451 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
457 if ((value&0xf) > Gpwrdelta)
458 t1 = (value&0xf)-(Gpwrdelta);
461 if (((value&0xf0)>>4) > Gpwrdelta)
462 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
465 if (((value&0xf00)>>8) > Gpwrdelta)
466 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
469 if (((value&0xf000)>>12) > Gpwrdelta)
470 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
474 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
477 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
478 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
480 if (data != 0xffffffff)
481 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
482 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n", data, Adata, Gdata));
486 // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
491 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
492 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
500 // Get Txpower per MCS for 40MHz in 2.4G.
506 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
507 if (bGpwrdeltaMinus == FALSE)
509 t1 = (value&0xf)+(Gpwrdelta);
512 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
515 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
518 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
524 if ((value&0xf) > Gpwrdelta)
525 t1 = (value&0xf)-(Gpwrdelta);
528 if (((value&0xf0)>>4) > Gpwrdelta)
529 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
532 if (((value&0xf00)>>8) > Gpwrdelta)
533 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
536 if (((value&0xf000)>>12) > Gpwrdelta)
537 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
541 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
543 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
544 if (bGpwrdeltaMinus == FALSE)
546 t1 = (value&0xf)+(Gpwrdelta);
549 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
552 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
555 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
561 if ((value&0xf) > Gpwrdelta)
562 t1 = (value&0xf)-(Gpwrdelta);
565 if (((value&0xf0)>>4) > Gpwrdelta)
566 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
569 if (((value&0xf00)>>8) > Gpwrdelta)
570 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
573 if (((value&0xf000)>>12) > Gpwrdelta)
574 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
578 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
581 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
583 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
585 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
590 // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
595 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
596 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
604 // Get Txpower per MCS for 20MHz in 5G.
610 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
611 if (bApwrdeltaMinus == FALSE)
613 t1 = (value&0xf)+(Apwrdelta);
616 t2 = ((value&0xf0)>>4)+(Apwrdelta);
619 t3 = ((value&0xf00)>>8)+(Apwrdelta);
622 t4 = ((value&0xf000)>>12)+(Apwrdelta);
628 if ((value&0xf) > Apwrdelta)
629 t1 = (value&0xf)-(Apwrdelta);
632 if (((value&0xf0)>>4) > Apwrdelta)
633 t2 = ((value&0xf0)>>4)-(Apwrdelta);
636 if (((value&0xf00)>>8) > Apwrdelta)
637 t3 = ((value&0xf00)>>8)-(Apwrdelta);
640 if (((value&0xf000)>>12) > Apwrdelta)
641 t4 = ((value&0xf000)>>12)-(Apwrdelta);
645 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
647 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
648 if (bApwrdeltaMinus == FALSE)
650 t1 = (value&0xf)+(Apwrdelta);
653 t2 = ((value&0xf0)>>4)+(Apwrdelta);
656 t3 = ((value&0xf00)>>8)+(Apwrdelta);
659 t4 = ((value&0xf000)>>12)+(Apwrdelta);
665 if ((value&0xf) > Apwrdelta)
666 t1 = (value&0xf)-(Apwrdelta);
669 if (((value&0xf0)>>4) > Apwrdelta)
670 t2 = ((value&0xf0)>>4)-(Apwrdelta);
673 if (((value&0xf00)>>8) > Apwrdelta)
674 t3 = ((value&0xf00)>>8)-(Apwrdelta);
677 if (((value&0xf000)>>12) > Apwrdelta)
678 t4 = ((value&0xf000)>>12)-(Apwrdelta);
682 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
685 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
687 pAd->Tx20MPwrCfgABand[i] = Adata;
689 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
694 // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
699 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
700 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
708 // Get Txpower per MCS for 40MHz in 5G.
714 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
715 if (bApwrdeltaMinus == FALSE)
717 t1 = (value&0xf)+(Apwrdelta);
720 t2 = ((value&0xf0)>>4)+(Apwrdelta);
723 t3 = ((value&0xf00)>>8)+(Apwrdelta);
726 t4 = ((value&0xf000)>>12)+(Apwrdelta);
732 if ((value&0xf) > Apwrdelta)
733 t1 = (value&0xf)-(Apwrdelta);
736 if (((value&0xf0)>>4) > Apwrdelta)
737 t2 = ((value&0xf0)>>4)-(Apwrdelta);
740 if (((value&0xf00)>>8) > Apwrdelta)
741 t3 = ((value&0xf00)>>8)-(Apwrdelta);
744 if (((value&0xf000)>>12) > Apwrdelta)
745 t4 = ((value&0xf000)>>12)-(Apwrdelta);
749 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
751 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
752 if (bApwrdeltaMinus == FALSE)
754 t1 = (value&0xf)+(Apwrdelta);
757 t2 = ((value&0xf0)>>4)+(Apwrdelta);
760 t3 = ((value&0xf00)>>8)+(Apwrdelta);
763 t4 = ((value&0xf000)>>12)+(Apwrdelta);
769 if ((value&0xf) > Apwrdelta)
770 t1 = (value&0xf)-(Apwrdelta);
773 if (((value&0xf0)>>4) > Apwrdelta)
774 t2 = ((value&0xf0)>>4)-(Apwrdelta);
777 if (((value&0xf00)>>8) > Apwrdelta)
778 t3 = ((value&0xf00)>>8)-(Apwrdelta);
781 if (((value&0xf000)>>12) > Apwrdelta)
782 t4 = ((value&0xf000)>>12)-(Apwrdelta);
786 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
789 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
791 pAd->Tx40MPwrCfgABand[i+1] = Adata;
793 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
800 ========================================================================
803 Read initial channel power parameters from EEPROM
806 Adapter Pointer to our adapter
815 ========================================================================
817 VOID RTMPReadChannelPwr(
818 IN PRTMP_ADAPTER pAd)
821 EEPROM_TX_PWR_STRUC Power;
822 EEPROM_TX_PWR_STRUC Power2;
824 // Read Tx power value for all channels
825 // Value from 1 - 0x7f. Default value is 24.
826 // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
827 // : 5.5G 0xF9 (-7) ~ 0x0F (15)
829 // 0. 11b/g, ch1 - ch 14
830 for (i = 0; i < 7; i++)
832 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
833 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
834 pAd->TxPower[i * 2].Channel = i * 2 + 1;
835 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
837 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
838 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
840 pAd->TxPower[i * 2].Power = Power.field.Byte0;
842 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
843 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
845 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
847 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
848 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
850 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
852 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
853 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
855 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
858 // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
859 // 1.1 Fill up channel
861 for (i = 0; i < 4; i++)
863 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
864 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
865 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
867 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
868 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
869 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
871 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
872 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
873 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
877 for (i = 0; i < 6; i++)
879 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
880 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
882 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
883 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
885 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
886 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
888 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
889 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
891 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
892 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
895 // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
896 // 2.1 Fill up channel
898 for (i = 0; i < 5; i++)
900 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
901 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
902 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
904 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
905 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
906 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
908 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
909 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
910 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
912 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
913 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
914 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
917 for (i = 0; i < 8; i++)
919 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
920 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
922 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
923 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
925 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
926 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
928 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
929 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
931 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
932 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
935 // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
936 // 3.1 Fill up channel
937 choffset = 14 + 12 + 16;
938 for (i = 0; i < 2; i++)
940 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
941 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
942 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
944 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
945 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
946 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
948 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
949 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
950 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
952 pAd->TxPower[3 * 2 + choffset + 0].Channel = 165;
953 pAd->TxPower[3 * 2 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
954 pAd->TxPower[3 * 2 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
957 for (i = 0; i < 4; i++)
959 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
960 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
962 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
963 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
965 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
966 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
968 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
969 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
971 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
972 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
975 // 4. Print and Debug
976 choffset = 14 + 12 + 16 + 7;
980 // Init the 802.11j channel number for TX channel power
982 for (i = 0; i < 3; i++)
984 pAd->TxPower11J[i].Channel = 8 + i * 4;
985 pAd->TxPower11J[i].BW = BW_20;
988 for (i = 0; i < 4; i++)
990 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
991 pAd->TxPower11J[i + 3].BW = BW_20;
994 for (i = 0; i < 4; i++)
996 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
997 pAd->TxPower11J[i + 7].BW = BW_20;
1001 for (i = 0; i < 2; i++)
1003 pAd->TxPower11J[i + 11].Channel = 7 + i;
1004 pAd->TxPower11J[i + 11].BW = BW_10;
1006 pAd->TxPower11J[13].Channel = 11;
1007 pAd->TxPower11J[13].BW = BW_10;
1009 for (i = 0; i < 3; i++)
1011 pAd->TxPower11J[i + 14].Channel = 183 + i;
1012 pAd->TxPower11J[i + 14].BW= BW_10;
1015 for (i = 0; i < 3; i++)
1017 pAd->TxPower11J[i + 17].Channel = 187 + i;
1018 pAd->TxPower11J[i + 17].BW = BW_10;
1020 for (i = 0; i < 10; i++)
1022 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1023 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1025 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1026 pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1028 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1029 pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1031 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1032 pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1034 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1035 pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1041 ========================================================================
1043 Routine Description:
1044 Read the following from the registry
1045 1. All the parameters
1049 Adapter Pointer to our adapter
1050 WrapperConfigurationContext For use by NdisOpenConfiguration
1055 NDIS_STATUS_RESOURCES
1057 IRQL = PASSIVE_LEVEL
1061 ========================================================================
1063 NDIS_STATUS NICReadRegParameters(
1064 IN PRTMP_ADAPTER pAd,
1065 IN NDIS_HANDLE WrapperConfigurationContext
1068 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1069 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1077 ========================================================================
1079 Routine Description:
1080 Read initial parameters from EEPROM
1083 Adapter Pointer to our adapter
1088 IRQL = PASSIVE_LEVEL
1092 ========================================================================
1094 VOID NICReadEEPROMParameters(
1095 IN PRTMP_ADAPTER pAd,
1099 USHORT i, value, value2;
1101 EEPROM_TX_PWR_STRUC Power;
1102 EEPROM_VERSION_STRUC Version;
1103 EEPROM_ANTENNA_STRUC Antenna;
1104 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1106 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1108 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1109 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1110 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1112 if((data & 0x30) == 0)
1113 pAd->EEPROMAddressNum = 6; // 93C46
1114 else if((data & 0x30) == 0x10)
1115 pAd->EEPROMAddressNum = 8; // 93C66
1117 pAd->EEPROMAddressNum = 8; // 93C86
1118 DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1120 // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1121 // MAC address registers according to E2PROM setting
1122 if (mac_addr == NULL ||
1123 strlen(mac_addr) != 17 ||
1124 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
1125 mac_addr[11] != ':' || mac_addr[14] != ':')
1127 USHORT Addr01,Addr23,Addr45 ;
1129 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1130 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1131 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1133 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1134 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1135 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1136 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1137 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1138 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1140 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1149 for (j=0; j<MAC_ADDR_LEN; j++)
1151 AtoH(macptr, &pAd->PermanentAddress[j], 1);
1155 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1160 //more conveninet to test mbssid, so ap's bssid &0xf1
1161 if (pAd->PermanentAddress[0] == 0xff)
1162 pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1164 //if (pAd->PermanentAddress[5] == 0xff)
1165 // pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1167 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1168 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1169 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1170 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1171 if (pAd->bLocalAdminMAC == FALSE)
1175 COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1176 csr2.field.Byte0 = pAd->CurrentAddress[0];
1177 csr2.field.Byte1 = pAd->CurrentAddress[1];
1178 csr2.field.Byte2 = pAd->CurrentAddress[2];
1179 csr2.field.Byte3 = pAd->CurrentAddress[3];
1180 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1182 csr3.field.Byte4 = pAd->CurrentAddress[4];
1183 csr3.field.Byte5 = pAd->CurrentAddress[5];
1184 csr3.field.U2MeMask = 0xff;
1185 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1186 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1187 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1188 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1189 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1193 // if not return early. cause fail at emulation.
1194 // Init the channel number for TX channel power
1195 RTMPReadChannelPwr(pAd);
1197 // if E2PROM version mismatch with driver's expectation, then skip
1198 // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1199 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1200 pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1201 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1203 if (Version.field.Version > VALID_EEPROM_VERSION)
1205 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1206 /*pAd->SystemErrorBitmap |= 0x00000001;
1208 // hard-code default value when no proper E2PROM installed
1209 pAd->bAutoTxAgcA = FALSE;
1210 pAd->bAutoTxAgcG = FALSE;
1212 // Default the channel power
1213 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1214 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1216 // Default the channel power
1217 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1218 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1220 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1221 pAd->EEPROMDefaultValue[i] = 0xffff;
1225 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1226 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1227 pAd->EEPROMDefaultValue[0] = value;
1229 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1230 pAd->EEPROMDefaultValue[1] = value;
1232 RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1233 pAd->EEPROMDefaultValue[2] = value;
1235 for(i = 0; i < 8; i++)
1237 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1238 pAd->EEPROMDefaultValue[i+3] = value;
1241 // We have to parse NIC configuration 0 at here.
1242 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1243 // Therefore, we have to read TxAutoAgc control beforehand.
1244 // Read Tx AGC control bit
1245 Antenna.word = pAd->EEPROMDefaultValue[0];
1246 if (Antenna.word == 0xFFFF)
1249 Antenna.field.RfIcType = RFIC_2820;
1250 Antenna.field.TxPath = 1;
1251 Antenna.field.RxPath = 2;
1252 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1255 // Choose the desired Tx&Rx stream.
1256 if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1257 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1259 if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1261 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1263 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1264 (pAd->CommonCfg.RxStream > 2))
1266 // only 2 Rx streams for RT2860 series
1267 pAd->CommonCfg.RxStream = 2;
1272 // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1278 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1282 #ifdef CONFIG_STA_SUPPORT
1283 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1285 NicConfig2.word = 0;
1286 if ((NicConfig2.word & 0x00ff) == 0xff)
1288 NicConfig2.word &= 0xff00;
1291 if ((NicConfig2.word >> 8) == 0xff)
1293 NicConfig2.word &= 0x00ff;
1296 #endif // CONFIG_STA_SUPPORT //
1298 if (NicConfig2.field.DynamicTxAgcControl == 1)
1299 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1301 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1303 DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1305 // Save the antenna for future use
1306 pAd->Antenna.word = Antenna.word;
1309 // Reset PhyMode if we don't support 802.11a
1310 // Only RFIC_2850 & RFIC_2750 support 802.11a
1312 if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1314 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1315 (pAd->CommonCfg.PhyMode == PHY_11A))
1316 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1317 #ifdef DOT11_N_SUPPORT
1318 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
1319 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
1320 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
1321 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1322 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1323 #endif // DOT11_N_SUPPORT //
1326 // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1329 /* these are tempature reference value (0x00 ~ 0xFE)
1330 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1331 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1332 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1333 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1334 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1335 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1336 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1337 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1338 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1339 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1340 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
1341 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1342 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1343 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1344 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1345 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1346 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1347 pAd->TxAgcStepG = Power.field.Byte1;
1348 pAd->TxAgcCompensateG = 0;
1349 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1350 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
1352 // Disable TxAgc if the based value is not right
1353 if (pAd->TssiRefG == 0xff)
1354 pAd->bAutoTxAgcG = FALSE;
1356 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1357 pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1359 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1360 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1364 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1365 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1366 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1367 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1368 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1369 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1370 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1371 pAd->TssiRefA = Power.field.Byte0;
1372 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1373 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1374 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1375 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1376 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1377 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1378 pAd->TxAgcStepA = Power.field.Byte1;
1379 pAd->TxAgcCompensateA = 0;
1380 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1381 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
1383 // Disable TxAgc if the based value is not right
1384 if (pAd->TssiRefA == 0xff)
1385 pAd->bAutoTxAgcA = FALSE;
1387 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1388 pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1390 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1391 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1393 pAd->BbpRssiToDbmDelta = 0x0;
1395 // Read frequency offset setting for RF
1396 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1397 if ((value & 0x00FF) != 0x00FF)
1398 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1400 pAd->RfFreqOffset = 0;
1401 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1403 //CountryRegion byte offset (38h)
1404 value = pAd->EEPROMDefaultValue[2] >> 8; // 2.4G band
1405 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; // 5G band
1407 if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1409 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1410 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1411 TmpPhy = pAd->CommonCfg.PhyMode;
1412 pAd->CommonCfg.PhyMode = 0xff;
1413 RTMPSetPhyMode(pAd, TmpPhy);
1414 #ifdef DOT11_N_SUPPORT
1416 #endif // DOT11_N_SUPPORT //
1420 // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1421 // The valid value are (-10 ~ 10)
1423 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1424 pAd->BGRssiOffset0 = value & 0x00ff;
1425 pAd->BGRssiOffset1 = (value >> 8);
1426 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1427 pAd->BGRssiOffset2 = value & 0x00ff;
1428 pAd->ALNAGain1 = (value >> 8);
1429 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1430 pAd->BLNAGain = value & 0x00ff;
1431 pAd->ALNAGain0 = (value >> 8);
1433 // Validate 11b/g RSSI_0 offset.
1434 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1435 pAd->BGRssiOffset0 = 0;
1437 // Validate 11b/g RSSI_1 offset.
1438 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1439 pAd->BGRssiOffset1 = 0;
1441 // Validate 11b/g RSSI_2 offset.
1442 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1443 pAd->BGRssiOffset2 = 0;
1445 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1446 pAd->ARssiOffset0 = value & 0x00ff;
1447 pAd->ARssiOffset1 = (value >> 8);
1448 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1449 pAd->ARssiOffset2 = value & 0x00ff;
1450 pAd->ALNAGain2 = (value >> 8);
1452 if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1453 pAd->ALNAGain1 = pAd->ALNAGain0;
1454 if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1455 pAd->ALNAGain2 = pAd->ALNAGain0;
1457 // Validate 11a RSSI_0 offset.
1458 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1459 pAd->ARssiOffset0 = 0;
1461 // Validate 11a RSSI_1 offset.
1462 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1463 pAd->ARssiOffset1 = 0;
1465 //Validate 11a RSSI_2 offset.
1466 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1467 pAd->ARssiOffset2 = 0;
1472 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1473 pAd->LedCntl.word = (value&0xff00) >> 8;
1474 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1476 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1478 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1481 RTMPReadTxPwrPerRate(pAd);
1484 //pAd->CommonCfg.DefineMaxTxPwr = RTMP_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR);
1485 RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1486 #endif // SINGLE_SKU //
1488 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1492 ========================================================================
1494 Routine Description:
1495 Set default value from EEPROM
1498 Adapter Pointer to our adapter
1503 IRQL = PASSIVE_LEVEL
1507 ========================================================================
1509 VOID NICInitAsicFromEEPROM(
1510 IN PRTMP_ADAPTER pAd)
1512 #ifdef CONFIG_STA_SUPPORT
1515 #endif // CONFIG_STA_SUPPORT //
1517 EEPROM_ANTENNA_STRUC Antenna;
1518 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1521 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1522 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1524 UCHAR BbpRegIdx, BbpValue;
1526 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1528 BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1529 BbpValue = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1530 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1534 Antenna.word = pAd->Antenna.word;
1535 pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1536 pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1538 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1541 // Save the antenna for future use
1542 pAd->NicConfig2.word = NicConfig2.word;
1545 // Send LED Setting to MCU.
1547 if (pAd->LedCntl.word == 0xFF)
1549 pAd->LedCntl.word = 0x01;
1555 AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1556 AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1557 AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1558 pAd->LedIndicatorStregth = 0xFF;
1559 RTMPSetSignalLED(pAd, -100); // Force signal strength Led to be turned off, before link up
1561 #ifdef CONFIG_STA_SUPPORT
1562 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1564 // Read Hardware controlled Radio state enable bit
1565 if (NicConfig2.field.HardwareRadioControl == 1)
1567 pAd->StaCfg.bHardwareRadio = TRUE;
1569 // Read GPIO pin2 as Hardware controlled radio state
1570 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1571 if ((data & 0x04) == 0)
1573 pAd->StaCfg.bHwRadio = FALSE;
1574 pAd->StaCfg.bRadio = FALSE;
1575 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1579 pAd->StaCfg.bHardwareRadio = FALSE;
1581 if (pAd->StaCfg.bRadio == FALSE)
1583 RTMPSetLED(pAd, LED_RADIO_OFF);
1587 RTMPSetLED(pAd, LED_RADIO_ON);
1588 AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1589 AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1590 // 2-1. wait command ok.
1591 AsicCheckCommanOk(pAd, PowerWakeCID);
1594 #endif // CONFIG_STA_SUPPORT //
1596 // Turn off patching for cardbus controller
1597 if (NicConfig2.field.CardbusAcceleration == 1)
1601 if (NicConfig2.field.DynamicTxAgcControl == 1)
1602 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1604 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1606 // Since BBP has been progamed, to make sure BBP setting will be
1607 // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1609 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1611 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1613 if(pAd->Antenna.field.RxPath == 3)
1617 else if(pAd->Antenna.field.RxPath == 2)
1621 else if(pAd->Antenna.field.RxPath == 1)
1625 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1627 #ifdef CONFIG_STA_SUPPORT
1628 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1630 // Handle the difference when 1T
1631 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1632 if(pAd->Antenna.field.TxPath == 1)
1636 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1638 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1640 #endif // CONFIG_STA_SUPPORT //
1641 DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1642 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1646 ========================================================================
1648 Routine Description:
1649 Initialize NIC hardware
1652 Adapter Pointer to our adapter
1657 IRQL = PASSIVE_LEVEL
1661 ========================================================================
1663 NDIS_STATUS NICInitializeAdapter(
1664 IN PRTMP_ADAPTER pAd,
1665 IN BOOLEAN bHardReset)
1667 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1668 WPDMA_GLO_CFG_STRUC GloCfg;
1670 DELAY_INT_CFG_STRUC IntCfg;
1672 AC_TXOP_CSR0_STRUC csr0;
1674 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1676 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1681 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1682 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1685 RTMPusecDelay(1000);
1688 DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1689 GloCfg.word &= 0xff0;
1690 GloCfg.field.EnTXWriteBackDDONE =1;
1691 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1693 // Record HW Beacon offset
1694 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1695 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1696 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1697 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1698 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1699 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1700 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1701 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1704 // write all shared Ring's base address into ASIC
1707 // asic simulation sequence put this ahead before loading firmware.
1708 // pbf hardware reset
1709 RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f); // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1710 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1711 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1713 // Initialze ASIC for TX & Rx operation
1714 if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1718 NICLoadFirmware(pAd);
1721 return NDIS_STATUS_FAILURE;
1725 // Write AC_BK base address register
1726 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1727 RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1728 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1730 // Write AC_BE base address register
1731 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1732 RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1733 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1735 // Write AC_VI base address register
1736 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1737 RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1738 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1740 // Write AC_VO base address register
1741 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1742 RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1743 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1745 // Write HCCA base address register
1746 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1747 RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1748 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1750 // Write MGMT_BASE_CSR register
1751 Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1752 RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1753 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1755 // Write RX_BASE_CSR register
1756 Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1757 RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1758 DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1760 // Init RX Ring index pointer
1761 pAd->RxRing.RxSwReadIdx = 0;
1762 pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1763 RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1765 // Init TX rings index pointer
1767 for (i=0; i<NUM_OF_TX_RING; i++)
1769 pAd->TxRing[i].TxSwFreeIdx = 0;
1770 pAd->TxRing[i].TxCpuIdx = 0;
1771 RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) , pAd->TxRing[i].TxCpuIdx);
1775 // init MGMT ring index pointer
1776 pAd->MgmtRing.TxSwFreeIdx = 0;
1777 pAd->MgmtRing.TxCpuIdx = 0;
1778 RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX, pAd->MgmtRing.TxCpuIdx);
1781 // set each Ring's SIZE into ASIC. Descriptor Size is fixed by design.
1784 // Write TX_RING_CSR0 register
1785 Value = TX_RING_SIZE;
1786 RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1787 RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1788 RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1789 RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1790 RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1791 Value = MGMT_RING_SIZE;
1792 RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1794 // Write RX_RING_CSR register
1795 Value = RX_RING_SIZE;
1796 RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1801 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1802 if (pAd->CommonCfg.PhyMode == PHY_11B)
1804 csr0.field.Ac0Txop = 192; // AC_VI: 192*32us ~= 6ms
1805 csr0.field.Ac1Txop = 96; // AC_VO: 96*32us ~= 3ms
1809 csr0.field.Ac0Txop = 96; // AC_VI: 96*32us ~= 3ms
1810 csr0.field.Ac1Txop = 48; // AC_VO: 48*32us ~= 1.5ms
1812 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1815 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1819 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1820 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1823 RTMPusecDelay(1000);
1827 GloCfg.word &= 0xff0;
1828 GloCfg.field.EnTXWriteBackDDONE =1;
1829 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1832 RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1837 // Status = NICLoadFirmware(pAd);
1839 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1844 ========================================================================
1846 Routine Description:
1850 Adapter Pointer to our adapter
1855 IRQL = PASSIVE_LEVEL
1859 ========================================================================
1861 NDIS_STATUS NICInitializeAsic(
1862 IN PRTMP_ADAPTER pAd,
1863 IN BOOLEAN bHardReset)
1867 UINT32 MacCsr12 = 0, Counter = 0;
1871 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1873 if (bHardReset == TRUE)
1875 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1878 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1880 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1881 // Initialize MAC register to default value
1882 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1884 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1888 #ifdef CONFIG_STA_SUPPORT
1889 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1891 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1893 RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1896 #endif // CONFIG_STA_SUPPORT //
1900 // Before program BBP, we need to wait BBP/RF get wake up.
1905 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1907 if ((MacCsr12 & 0x03) == 0) // if BB.RF is stable
1910 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
1911 RTMPusecDelay(1000);
1912 } while (Index++ < 100);
1914 // The commands to firmware should be after these commands, these commands will init firmware
1915 // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1916 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1917 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1918 RTMPusecDelay(1000);
1920 // Read BBP register, make sure BBP is up and running before write new data
1924 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1925 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1926 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1927 //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1929 if ((R0 == 0xff) || (R0 == 0x00))
1930 return NDIS_STATUS_FAILURE;
1932 // Initialize BBP register to default value
1933 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1935 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1938 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1939 if ((pAd->MACVersion&0xffff) != 0x0101)
1940 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1943 if (pAd->MACVersion == 0x28600100)
1945 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1946 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1949 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1951 // enlarge MAX_LEN_CFG
1953 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1956 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1960 // Add radio off control
1961 #ifdef CONFIG_STA_SUPPORT
1962 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1964 if (pAd->StaCfg.bRadio == FALSE)
1966 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1967 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1968 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1971 #endif // CONFIG_STA_SUPPORT //
1973 // Clear raw counters
1974 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1975 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1976 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1977 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1978 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1979 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1981 // ASIC will keep garbage value after boot
1982 // Clear all seared key table when initial
1983 // This routine can be ignored in radio-ON/OFF operation.
1986 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1988 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1991 // Clear all pairwise key table when initial
1992 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1994 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1999 // It isn't necessary to clear this space when not hard reset.
2000 if (bHardReset == TRUE)
2002 // clear all on-chip BEACON frame space
2003 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2005 for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2006 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2010 #ifdef CONFIG_STA_SUPPORT
2011 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2013 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2014 if ((pAd->MACVersion&0xffff) != 0x0101)
2015 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2017 #endif // CONFIG_STA_SUPPORT //
2019 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2020 return NDIS_STATUS_SUCCESS;
2024 VOID NICRestoreBBPValue(
2025 IN PRTMP_ADAPTER pAd)
2031 DBGPRINT(RT_DEBUG_TRACE, ("---> NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!! \n"));
2032 // Initialize BBP register to default value (rtmp_init.c)
2033 for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2035 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2037 // copy from (rtmp_init.c)
2038 if (pAd->MACVersion == 0x28600100)
2040 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2041 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2044 // copy from (connect.c LinkUp function)
2047 // Change to AP channel
2048 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2050 // Must using 40MHz.
2051 pAd->CommonCfg.BBPCurrentBW = BW_40;
2052 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2053 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2055 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2058 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2060 // RX : control channel at lower
2061 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2063 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2064 // Record BBPR3 setting, But don't keep R Antenna # information.
2065 pAd->StaCfg.BBPR3 = Value;
2067 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2069 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2071 if (pAd->MACVersion == 0x28600100)
2073 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2074 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2075 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2076 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2079 DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2081 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2083 // Must using 40MHz.
2084 pAd->CommonCfg.BBPCurrentBW = BW_40;
2085 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2086 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2088 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2091 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2093 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2095 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2097 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2099 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2100 // Record BBPR3 setting, But don't keep R Antenna # information.
2101 pAd->StaCfg.BBPR3 = Value;
2103 if (pAd->MACVersion == 0x28600100)
2105 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2106 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2107 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2108 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2111 DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2115 pAd->CommonCfg.BBPCurrentBW = BW_20;
2116 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2117 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2119 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2121 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2123 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2125 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2127 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2129 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2130 // Record BBPR3 setting, But don't keep R Antenna # information.
2131 pAd->StaCfg.BBPR3 = Value;
2133 if (pAd->MACVersion == 0x28600100)
2135 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2136 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2137 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2138 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2141 DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2145 DBGPRINT(RT_DEBUG_TRACE, ("<--- NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!! \n"));
2149 ========================================================================
2151 Routine Description:
2155 Adapter Pointer to our adapter
2160 IRQL = PASSIVE_LEVEL
2163 Reset NIC to initial state AS IS system boot up time.
2165 ========================================================================
2168 IN PRTMP_ADAPTER pAd)
2171 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2173 // Disable Rx, register value supposed will remain after reset
2174 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2175 Value &= (0xfffffff3);
2176 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2178 // Issue reset and clear from reset state
2179 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2180 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2182 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2186 ========================================================================
2188 Routine Description:
2189 Check ASIC registers and find any reason the system might hang
2192 Adapter Pointer to our adapter
2197 IRQL = DISPATCH_LEVEL
2199 ========================================================================
2201 BOOLEAN NICCheckForHang(
2202 IN PRTMP_ADAPTER pAd)
2207 VOID NICUpdateFifoStaCounters(
2208 IN PRTMP_ADAPTER pAd)
2210 TX_STA_FIFO_STRUC StaFifo;
2211 MAC_TABLE_ENTRY *pEntry;
2213 UCHAR pid = 0, wcid = 0;
2219 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2221 if (StaFifo.field.bValid == 0)
2224 wcid = (UCHAR)StaFifo.field.wcid;
2227 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2228 if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2234 /* PID store Tx MCS Rate */
2235 pid = (UCHAR)StaFifo.field.PidType;
2237 pEntry = &pAd->MacTab.Content[wcid];
2239 pEntry->DebugFIFOCount++;
2241 #ifdef DOT11_N_SUPPORT
2242 if (StaFifo.field.TxBF) // 3*3
2243 pEntry->TxBFCount++;
2244 #endif // DOT11_N_SUPPORT //
2246 #ifdef UAPSD_AP_SUPPORT
2247 UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2248 #endif // UAPSD_AP_SUPPORT //
2250 if (!StaFifo.field.TxSuccess)
2252 pEntry->FIFOCount++;
2253 pEntry->OneSecTxFailCount++;
2255 if (pEntry->FIFOCount >= 1)
2257 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2259 SendRefreshBAR(pAd, pEntry);
2260 pEntry->NoBADataCountDown = 64;
2262 #ifdef DOT11_N_SUPPORT
2263 pEntry->NoBADataCountDown = 64;
2264 #endif // DOT11_N_SUPPORT //
2266 if(pEntry->PsMode == PWR_ACTIVE)
2268 #ifdef DOT11_N_SUPPORT
2270 for (tid=0; tid<NUM_OF_TID; tid++)
2272 BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, FALSE);
2274 #endif // DOT11_N_SUPPORT //
2276 // Update the continuous transmission counter except PS mode
2277 pEntry->ContinueTxFailCnt++;
2281 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2282 // this tx error happened due to sta just go to sleep.
2283 pEntry->FIFOCount = 0;
2284 pEntry->ContinueTxFailCnt = 0;
2287 //pEntry->FIFOCount = 0;
2289 //pEntry->bSendBAR = TRUE;
2293 #ifdef DOT11_N_SUPPORT
2294 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2296 pEntry->NoBADataCountDown--;
2297 if (pEntry->NoBADataCountDown==0)
2299 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2302 #endif // DOT11_N_SUPPORT //
2303 pEntry->FIFOCount = 0;
2304 pEntry->OneSecTxNoRetryOkCount++;
2305 // update NoDataIdleCount when sucessful send packet to STA.
2306 pEntry->NoDataIdleCount = 0;
2307 pEntry->ContinueTxFailCnt = 0;
2310 succMCS = StaFifo.field.SuccessRate & 0x7F;
2312 reTry = pid - succMCS;
2314 if (StaFifo.field.TxSuccess)
2316 pEntry->TXMCSExpected[pid]++;
2319 pEntry->TXMCSSuccessful[pid]++;
2323 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2328 pEntry->TXMCSFailed[pid]++;
2333 if ((pid >= 12) && succMCS <=7)
2337 pEntry->OneSecTxRetryOkCount += reTry;
2341 // ASIC store 16 stack
2342 } while ( i < (2*TX_RING_SIZE) );
2347 ========================================================================
2349 Routine Description:
2350 Read statistical counters from hardware registers and record them
2351 in software variables for later on query
2354 pAd Pointer to our adapter
2359 IRQL = DISPATCH_LEVEL
2361 ========================================================================
2363 VOID NICUpdateRawCounters(
2364 IN PRTMP_ADAPTER pAd)
2367 RX_STA_CNT0_STRUC RxStaCnt0;
2368 RX_STA_CNT1_STRUC RxStaCnt1;
2369 RX_STA_CNT2_STRUC RxStaCnt2;
2370 TX_STA_CNT0_STRUC TxStaCnt0;
2371 TX_STA_CNT1_STRUC StaTx1;
2372 TX_STA_CNT2_STRUC StaTx2;
2373 TX_AGG_CNT_STRUC TxAggCnt;
2374 TX_AGG_CNT0_STRUC TxAggCnt0;
2375 TX_AGG_CNT1_STRUC TxAggCnt1;
2376 TX_AGG_CNT2_STRUC TxAggCnt2;
2377 TX_AGG_CNT3_STRUC TxAggCnt3;
2378 TX_AGG_CNT4_STRUC TxAggCnt4;
2379 TX_AGG_CNT5_STRUC TxAggCnt5;
2380 TX_AGG_CNT6_STRUC TxAggCnt6;
2381 TX_AGG_CNT7_STRUC TxAggCnt7;
2383 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2384 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2387 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2388 // Update RX PLCP error counter
2389 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2390 // Update False CCA counter
2391 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2394 // Update FCS counters
2395 OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2396 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2397 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2398 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2400 // Add FCS error count to private counters
2401 pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2402 OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2403 pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2404 if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2405 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2407 // Update Duplicate Rcv check
2408 pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2409 pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2410 // Update RX Overflow counter
2411 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2413 if (!pAd->bUpdateBcnCntDone)
2415 // Update BEACON sent count
2416 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2417 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2418 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2419 pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2420 pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2421 pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2422 pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2423 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2424 pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2425 pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2429 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2430 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2431 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2432 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2433 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2434 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2435 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2436 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2437 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2438 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2439 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2440 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2441 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2443 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2444 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2445 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2446 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2448 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2449 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2450 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2451 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2453 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2454 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2455 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2456 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2458 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2459 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2461 // Calculate the transmitted A-MPDU count
2462 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2463 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2465 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2466 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2468 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2469 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2471 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2472 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2474 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2475 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2477 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2478 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2480 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2481 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2483 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2484 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2489 RtmpDiagStruct *pDiag;
2490 COUNTER_RALINK *pRalinkCounters;
2491 UCHAR ArrayCurIdx, i;
2493 pDiag = &pAd->DiagStruct;
2494 pRalinkCounters = &pAd->RalinkCounters;
2495 ArrayCurIdx = pDiag->ArrayCurIdx;
2497 if (pDiag->inited == 0)
2499 NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2500 pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2506 pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2507 pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2508 pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2509 pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2510 pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2511 pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2512 pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2513 pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2514 pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2515 pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2516 pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2517 pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2518 pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2519 pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2520 pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2521 pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2522 pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2523 pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2524 pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2526 pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2528 INC_RING_INDEX(pDiag->ArrayCurIdx, DIAGNOSE_TIME);
2529 ArrayCurIdx = pDiag->ArrayCurIdx;
2530 for (i =0; i < 9; i++)
2532 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2533 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2534 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2535 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2537 pDiag->TxDataCnt[ArrayCurIdx] = 0;
2538 pDiag->TxFailCnt[ArrayCurIdx] = 0;
2539 pDiag->RxDataCnt[ArrayCurIdx] = 0;
2540 pDiag->RxCrcErrCnt[ArrayCurIdx] = 0;
2541 for (i = 9; i < 24; i++) // 3*3
2543 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2544 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2545 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2548 if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2549 INC_RING_INDEX(pDiag->ArrayStartIdx, DIAGNOSE_TIME);
2553 #endif // DBG_DIAGNOSE //
2560 ========================================================================
2562 Routine Description:
2563 Reset NIC from error
2566 Adapter Pointer to our adapter
2571 IRQL = PASSIVE_LEVEL
2574 Reset NIC from error state
2576 ========================================================================
2578 VOID NICResetFromError(
2579 IN PRTMP_ADAPTER pAd)
2581 // Reset BBP (according to alex, reset ASIC will force reset BBP
2582 // Therefore, skip the reset BBP
2583 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2585 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2586 // Remove ASIC from reset state
2587 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2589 NICInitializeAdapter(pAd, FALSE);
2590 NICInitAsicFromEEPROM(pAd);
2592 // Switch to current channel, since during reset process, the connection should remains on.
2593 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2594 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2598 ========================================================================
2600 Routine Description:
2601 erase 8051 firmware image in MAC ASIC
2604 Adapter Pointer to our adapter
2606 IRQL = PASSIVE_LEVEL
2608 ========================================================================
2610 VOID NICEraseFirmware(
2611 IN PRTMP_ADAPTER pAd)
2615 for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2616 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2618 }/* End of NICEraseFirmware */
2621 ========================================================================
2623 Routine Description:
2624 Load 8051 firmware RT2561.BIN file into MAC ASIC
2627 Adapter Pointer to our adapter
2630 NDIS_STATUS_SUCCESS firmware image load ok
2631 NDIS_STATUS_FAILURE image not found
2633 IRQL = PASSIVE_LEVEL
2635 ========================================================================
2637 NDIS_STATUS NICLoadFirmware(
2638 IN PRTMP_ADAPTER pAd)
2640 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2641 PUCHAR pFirmwareImage;
2642 ULONG FileLength, Index;
2646 pFirmwareImage = FirmwareImage;
2647 FileLength = sizeof(FirmwareImage);
2648 RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2650 /* check if MCU is ready */
2654 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2659 RTMPusecDelay(1000);
2660 } while (Index++ < 1000);
2664 Status = NDIS_STATUS_FAILURE;
2665 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2668 DBGPRINT(RT_DEBUG_TRACE,
2669 ("<=== %s (status=%d)\n", __func__, Status));
2671 } /* End of NICLoadFirmware */
2675 ========================================================================
2677 Routine Description:
2678 Load Tx rate switching parameters
2681 Adapter Pointer to our adapter
2684 NDIS_STATUS_SUCCESS firmware image load ok
2685 NDIS_STATUS_FAILURE image not found
2687 IRQL = PASSIVE_LEVEL
2690 1. (B0: Valid Item number) (B1:Initial item from zero)
2691 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
2693 ========================================================================
2695 NDIS_STATUS NICLoadRateSwitchingParams(
2696 IN PRTMP_ADAPTER pAd)
2698 return NDIS_STATUS_SUCCESS;
2702 ========================================================================
2704 Routine Description:
2705 if pSrc1 all zero with length Length, return 0.
2706 If not all zero, return 1
2715 IRQL = DISPATCH_LEVEL
2719 ========================================================================
2721 ULONG RTMPNotAllZero(
2728 pMem1 = (PUCHAR) pSrc1;
2730 for (Index = 0; Index < Length; Index++)
2732 if (pMem1[Index] != 0x0)
2738 if (Index == Length)
2749 ========================================================================
2751 Routine Description:
2752 Compare two memory block
2755 pSrc1 Pointer to first memory address
2756 pSrc2 Pointer to second memory address
2760 1: pSrc1 memory is larger
2761 2: pSrc2 memory is larger
2763 IRQL = DISPATCH_LEVEL
2767 ========================================================================
2769 ULONG RTMPCompareMemory(
2778 pMem1 = (PUCHAR) pSrc1;
2779 pMem2 = (PUCHAR) pSrc2;
2781 for (Index = 0; Index < Length; Index++)
2783 if (pMem1[Index] > pMem2[Index])
2785 else if (pMem1[Index] < pMem2[Index])
2794 ========================================================================
2796 Routine Description:
2797 Zero out memory block
2800 pSrc1 Pointer to memory address
2806 IRQL = PASSIVE_LEVEL
2807 IRQL = DISPATCH_LEVEL
2811 ========================================================================
2813 VOID RTMPZeroMemory(
2820 pMem = (PUCHAR) pSrc;
2822 for (Index = 0; Index < Length; Index++)
2828 VOID RTMPFillMemory(
2836 pMem = (PUCHAR) pSrc;
2838 for (Index = 0; Index < Length; Index++)
2845 ========================================================================
2847 Routine Description:
2848 Copy data from memory block 1 to memory block 2
2851 pDest Pointer to destination memory address
2852 pSrc Pointer to source memory address
2858 IRQL = PASSIVE_LEVEL
2859 IRQL = DISPATCH_LEVEL
2863 ========================================================================
2865 VOID RTMPMoveMemory(
2874 ASSERT((Length==0) || (pDest && pSrc));
2876 pMem1 = (PUCHAR) pDest;
2877 pMem2 = (PUCHAR) pSrc;
2879 for (Index = 0; Index < Length; Index++)
2881 pMem1[Index] = pMem2[Index];
2886 ========================================================================
2888 Routine Description:
2889 Initialize port configuration structure
2892 Adapter Pointer to our adapter
2897 IRQL = PASSIVE_LEVEL
2901 ========================================================================
2904 IN PRTMP_ADAPTER pAd)
2906 UINT key_index, bss_index;
2908 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2911 // part I. intialize common configuration
2914 for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2916 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2918 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2919 pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2923 pAd->Antenna.word = 0;
2924 pAd->CommonCfg.BBPCurrentBW = BW_20;
2926 pAd->LedCntl.word = 0;
2927 pAd->LedIndicatorStregth = 0;
2928 pAd->RLnkCtrlOffset = 0;
2929 pAd->HostLnkCtrlOffset = 0;
2930 pAd->CheckDmaBusyCount = 0;
2932 pAd->bAutoTxAgcA = FALSE; // Default is OFF
2933 pAd->bAutoTxAgcG = FALSE; // Default is OFF
2934 pAd->RfIcType = RFIC_2820;
2936 // Init timer for reset complete event
2937 pAd->CommonCfg.CentralChannel = 1;
2938 pAd->bForcePrintTX = FALSE;
2939 pAd->bForcePrintRX = FALSE;
2940 pAd->bStaFifoTest = FALSE;
2941 pAd->bProtectionTest = FALSE;
2942 pAd->bHCCATest = FALSE;
2943 pAd->bGenOneHCCA = FALSE;
2944 pAd->CommonCfg.Dsifs = 10; // in units of usec
2945 pAd->CommonCfg.TxPower = 100; //mW
2946 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2947 pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2948 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2949 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2950 pAd->CommonCfg.RtsThreshold = 2347;
2951 pAd->CommonCfg.FragmentThreshold = 2346;
2952 pAd->CommonCfg.UseBGProtection = 0; // 0: AUTO
2953 pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2954 pAd->CommonCfg.PhyMode = 0xff; // unknown
2955 pAd->CommonCfg.BandState = UNKNOWN_BAND;
2956 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2957 pAd->CommonCfg.RadarDetect.CSCount = 0;
2958 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2959 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2960 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2961 pAd->CommonCfg.bAPSDCapable = FALSE;
2962 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2963 pAd->CommonCfg.TriggerTimerCount = 0;
2964 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2965 pAd->CommonCfg.bCountryFlag = FALSE;
2966 pAd->CommonCfg.TxStream = 0;
2967 pAd->CommonCfg.RxStream = 0;
2969 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2971 #ifdef DOT11_N_SUPPORT
2972 NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2973 pAd->HTCEnable = FALSE;
2974 pAd->bBroadComHT = FALSE;
2975 pAd->CommonCfg.bRdg = FALSE;
2977 #ifdef DOT11N_DRAFT3
2978 pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell; // Unit : TU. 5~1000
2979 pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell; // Unit : TU. 10~1000
2980 pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval; // Unit : Second
2981 pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel; // Unit : TU. 200~10000
2982 pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
2983 pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
2984 pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold; // Unit : percentage
2985 pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
2986 #endif // DOT11N_DRAFT3 //
2988 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2989 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2990 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2991 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2992 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2993 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2994 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2996 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2997 BATableInit(pAd, &pAd->BATable);
2999 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3000 pAd->CommonCfg.bHTProtect = 1;
3001 pAd->CommonCfg.bMIMOPSEnable = TRUE;
3002 pAd->CommonCfg.bBADecline = FALSE;
3003 pAd->CommonCfg.bDisableReordering = FALSE;
3005 pAd->CommonCfg.TxBASize = 7;
3007 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3008 #endif // DOT11_N_SUPPORT //
3010 //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3011 //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3012 //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3013 //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3014 pAd->CommonCfg.TxRate = RATE_6;
3016 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3017 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3018 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3020 pAd->CommonCfg.BeaconPeriod = 100; // in mSec
3023 // part II. intialize STA specific configuration
3025 #ifdef CONFIG_STA_SUPPORT
3026 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3028 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3029 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3030 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3031 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3033 pAd->StaCfg.Psm = PWR_ACTIVE;
3035 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3036 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3037 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3038 pAd->StaCfg.bMixCipher = FALSE;
3039 pAd->StaCfg.DefaultKeyId = 0;
3041 // 802.1x port control
3042 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3043 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3044 pAd->StaCfg.LastMicErrorTime = 0;
3045 pAd->StaCfg.MicErrCnt = 0;
3046 pAd->StaCfg.bBlockAssoc = FALSE;
3047 pAd->StaCfg.WpaState = SS_NOTUSE;
3049 pAd->CommonCfg.NdisRadioStateOff = FALSE; // New to support microsoft disable radio with OID command
3051 pAd->StaCfg.RssiTrigger = 0;
3052 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3053 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3054 pAd->StaCfg.AtimWin = 0;
3055 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3056 pAd->StaCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3057 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3058 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3059 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3061 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3062 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3065 #ifdef EXT_BUILD_CHANNEL_LIST
3066 pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
3067 #endif // EXT_BUILD_CHANNEL_LIST //
3068 #endif // CONFIG_STA_SUPPORT //
3070 // global variables mXXXX used in MAC protocol state machines
3071 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3072 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3073 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3075 // PHY specification
3076 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; // default PHY mode
3077 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); // CCK use LONG preamble
3079 #ifdef CONFIG_STA_SUPPORT
3080 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3082 // user desired power mode
3083 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3084 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3085 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3088 // CCX v1.0 releated init value
3089 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3090 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3091 pAd->StaCfg.bCkipOn = FALSE;
3092 #endif // LEAP_SUPPORT //
3094 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3095 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3098 pAd->StaCfg.ScanCnt = 0;
3100 // CCX 2.0 control flag init
3101 pAd->StaCfg.CCXEnable = FALSE;
3102 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3103 pAd->StaCfg.CCXQosECWMin = 4;
3104 pAd->StaCfg.CCXQosECWMax = 10;
3106 pAd->StaCfg.bHwRadio = TRUE; // Default Hardware Radio status is On
3107 pAd->StaCfg.bSwRadio = TRUE; // Default Software Radio status is On
3108 pAd->StaCfg.bRadio = TRUE; // bHwRadio && bSwRadio
3109 pAd->StaCfg.bHardwareRadio = FALSE; // Default is OFF
3110 pAd->StaCfg.bShowHiddenSSID = FALSE; // Default no show
3112 // Nitro mode control
3113 pAd->StaCfg.bAutoReconnect = TRUE;
3115 // Save the init time as last scan time, the system should do scan after 2 seconds.
3116 // This patch is for driver wake up from standby mode, system will do scan right away.
3117 pAd->StaCfg.LastScanTime = 0;
3118 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3119 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3120 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3121 #ifdef WPA_SUPPLICANT_SUPPORT
3122 pAd->StaCfg.IEEE8021X = FALSE;
3123 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3124 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3125 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3126 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3127 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3128 #endif // WPA_SUPPLICANT_SUPPORT //
3131 #endif // CONFIG_STA_SUPPORT //
3133 // Default for extra information is not valid
3134 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3136 // Default Config change flag
3137 pAd->bConfigChanged = FALSE;
3140 // part III. AP configurations
3147 // dynamic BBP R66:sensibity tuning to overcome background noise
3148 pAd->BbpTuning.bEnable = TRUE;
3149 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3150 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3151 pAd->BbpTuning.R66Delta = 4;
3152 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3155 // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3156 // if not initial this value, the default value will be 0.
3158 pAd->BbpTuning.R66CurrentValue = 0x38;
3160 pAd->Bbp94 = BBPR94_DEFAULT;
3161 pAd->BbpForCCK = FALSE;
3163 // initialize MAC table and allocate spin lock
3164 NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3165 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3166 NdisAllocateSpinLock(&pAd->MacTabLock);
3168 pAd->CommonCfg.bWiFiTest = FALSE;
3169 pAd->bPCIclkOff = FALSE;
3171 RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3172 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3175 // IRQL = PASSIVE_LEVEL
3178 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals
3179 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits
3180 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits
3185 // FUNCTION: AtoH(char *, UCHAR *, int)
3187 // PURPOSE: Converts ascii string to network order hex
3190 // src - pointer to input ascii string
3191 // dest - pointer to output hex
3192 // destlen - size of dest
3196 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3197 // into upper nibble and 2nd ascii byte of pair into lower nibble.
3199 // IRQL = PASSIVE_LEVEL
3201 void AtoH(char * src, UCHAR * dest, int destlen)
3207 destTemp = (PUCHAR) dest;
3211 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.
3212 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.
3217 VOID RTMPPatchMacBbpBug(
3218 IN PRTMP_ADAPTER pAd)
3222 // Initialize BBP register to default value
3223 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3225 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3228 // Initialize RF register to default value
3229 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3230 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3232 // Re-init BBP register from EEPROM value
3233 NICInitAsicFromEEPROM(pAd);
3237 ========================================================================
3239 Routine Description:
3243 pAd Pointer to our adapter
3244 pTimer Timer structure
3245 pTimerFunc Function to execute when timer expired
3246 Repeat Ture for period timer
3253 ========================================================================
3256 IN PRTMP_ADAPTER pAd,
3257 IN PRALINK_TIMER_STRUCT pTimer,
3258 IN PVOID pTimerFunc,
3263 // Set Valid to TRUE for later used.
3264 // It will crash if we cancel a timer or set a timer
3265 // that we haven't initialize before.
3267 pTimer->Valid = TRUE;
3269 pTimer->PeriodicType = Repeat;
3270 pTimer->State = FALSE;
3271 pTimer->cookie = (ULONG) pData;
3274 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (PVOID) pTimer);
3278 ========================================================================
3280 Routine Description:
3284 pTimer Timer structure
3285 Value Timer value in milliseconds
3291 To use this routine, must call RTMPInitTimer before.
3293 ========================================================================
3296 IN PRALINK_TIMER_STRUCT pTimer,
3301 pTimer->TimerValue = Value;
3302 pTimer->State = FALSE;
3303 if (pTimer->PeriodicType == TRUE)
3305 pTimer->Repeat = TRUE;
3306 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3310 pTimer->Repeat = FALSE;
3311 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3316 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3322 ========================================================================
3324 Routine Description:
3328 pTimer Timer structure
3329 Value Timer value in milliseconds
3335 To use this routine, must call RTMPInitTimer before.
3337 ========================================================================
3340 IN PRALINK_TIMER_STRUCT pTimer,
3347 pTimer->TimerValue = Value;
3348 pTimer->State = FALSE;
3349 if (pTimer->PeriodicType == TRUE)
3351 RTMPCancelTimer(pTimer, &Cancel);
3352 RTMPSetTimer(pTimer, Value);
3356 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3361 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3366 ========================================================================
3368 Routine Description:
3369 Cancel timer objects
3372 Adapter Pointer to our adapter
3377 IRQL = PASSIVE_LEVEL
3378 IRQL = DISPATCH_LEVEL
3381 1.) To use this routine, must call RTMPInitTimer before.
3382 2.) Reset NIC to initial state AS IS system boot up time.
3384 ========================================================================
3386 VOID RTMPCancelTimer(
3387 IN PRALINK_TIMER_STRUCT pTimer,
3388 OUT BOOLEAN *pCancelled)
3392 if (pTimer->State == FALSE)
3393 pTimer->Repeat = FALSE;
3394 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3396 if (*pCancelled == TRUE)
3397 pTimer->State = TRUE;
3403 // NdisMCancelTimer just canced the timer and not mean release the timer.
3404 // And don't set the "Valid" to False. So that we can use this timer again.
3406 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3411 ========================================================================
3413 Routine Description:
3417 pAd Pointer to our adapter
3423 IRQL = PASSIVE_LEVEL
3424 IRQL = DISPATCH_LEVEL
3428 ========================================================================
3431 IN PRTMP_ADAPTER pAd,
3438 LowByte = pAd->LedCntl.field.LedMode&0x7f;
3443 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3444 pAd->LedIndicatorStregth = 0;
3447 if (pAd->CommonCfg.Channel > 14)
3451 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3455 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3458 LowByte = 0; // Driver sets MAC register and MAC controls LED
3461 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3465 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3467 case LED_ON_SITE_SURVEY:
3469 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3473 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3476 DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3481 // Keep LED status for LED SiteSurvey mode.
3482 // After SiteSurvey, we will set the LED mode to previous status.
3484 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3485 pAd->LedStatus = Status;
3487 DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3491 ========================================================================
3493 Routine Description:
3494 Set LED Signal Stregth
3497 pAd Pointer to our adapter
3503 IRQL = PASSIVE_LEVEL
3506 Can be run on any IRQL level.
3508 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3515 ========================================================================
3517 VOID RTMPSetSignalLED(
3518 IN PRTMP_ADAPTER pAd,
3519 IN NDIS_802_11_RSSI Dbm)
3524 // if not Signal Stregth, then do nothing.
3526 if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3533 else if (Dbm <= -81)
3535 else if (Dbm <= -71)
3537 else if (Dbm <= -67)
3539 else if (Dbm <= -57)
3545 // Update Signal Stregth to firmware if changed.
3547 if (pAd->LedIndicatorStregth != nLed)
3549 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3550 pAd->LedIndicatorStregth = nLed;
3555 ========================================================================
3557 Routine Description:
3561 pAd Pointer to our adapter
3566 IRQL <= DISPATCH_LEVEL
3569 Before Enable RX, make sure you have enabled Interrupt.
3570 ========================================================================
3572 VOID RTMPEnableRxTx(
3573 IN PRTMP_ADAPTER pAd)
3575 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3578 RT28XXDMAEnable(pAd);
3580 // enable RX of MAC block
3581 if (pAd->OpMode == OPMODE_AP)
3583 UINT32 rx_filter_flag = APNORMAL;
3586 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); // enable RX of DMA block
3590 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL); // Staion not drop control frame will fail WiFi Certification.
3593 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3594 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));